media: rockchip: when cif triggers a reset, redefine the timer after reset

Signed-off-by: Zefa Chen <zefa.chen@rock-chips.com>
Change-Id: I3dd12ba2d5f1a6d5a4f77e70b756aba9eaaea98f
This commit is contained in:
Zefa Chen
2021-09-24 11:04:33 +08:00
committed by Tao Huang
parent 8ad9944539
commit 53b650ce43

View File

@@ -5497,7 +5497,7 @@ void rkcif_reset_work(struct work_struct *work)
ret = rkcif_do_reset_work(dev, reset_work->reset_src);
if (ret)
v4l2_info(&dev->v4l2_dev, "do reset work failed!\n");
timer->is_running = false;
timer->has_been_init = false;
}
@@ -5578,7 +5578,7 @@ static void rkcif_init_reset_work(struct rkcif_timer *timer)
timer->run_cnt, timer->reset_src);
spin_lock_irqsave(&timer->timer_lock, flags);
timer->is_running = false;
timer->is_running = true;
timer->is_triggered = false;
timer->csi2_err_cnt_odd = 0;
timer->csi2_err_cnt_even = 0;