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clkmsr: axg: delete hard code which added during bringup [1/1]

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PD#SWPL-5356

Problem:
when cat clkmsr node in sysfs, i2c bus does not work

Solution:
delete hard code

Verify:
verify on axg s400

Change-Id: Ib01f251f4b77685db5a57df395f1c1a75620c07b
Signed-off-by: Jian Hu <jian.hu@amlogic.com>
This commit is contained in:
Jian Hu
2019-03-04 20:01:08 +08:00
committed by Luke Go
parent cde4b9e5dd
commit 540a2c94f7
1 changed files with 3 additions and 39 deletions
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42
drivers/amlogic/clk/clk_measure.c
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@@ -50,10 +50,6 @@ static DEFINE_SPINLOCK(clk_measure_lock);
#define CLKMSR_DEVICE_NAME "clkmsr"
unsigned int clk_msr_index = 0xff;
#define AUDIO_FLAG BIT(16)
#define HHI_GEN_CLK_CNTL 0x8a
#define AO_RTI_PIN_MUX_REG1 0x18
unsigned int audio_index;
struct meson_clkmsr_data {
const char * const *clk_table;
@@ -164,36 +160,6 @@ static unsigned int meson_clk_util_ring_msr(unsigned int clk_mux)
}
static unsigned int axg_clk_util_clk_msr(unsigned int clk_mux)
{
unsigned int clk_val;
if (clk_mux&AUDIO_FLAG) {
/*for audio*/
/*set gen_clk_out: cts_msr_clk*/
aml_write_hiubus(HHI_GEN_CLK_CNTL, 0xc800);
/*msr_clk_mux_sel*/
writel_relaxed(((clk_mux&0xff)<<20)|(1<<19), msr_clk_reg0);
/*pinmux for GEN_CLK_EE*/
aml_write_aobus(AO_RTI_PIN_MUX_REG1, 0x402230);
audio_index = clk_mux;
} else {
/*clear gen_clk_out: cts_msr_clk*/
aml_write_hiubus(HHI_GEN_CLK_CNTL, 0x0);
/*measure clk*/
clk_val = gxbb_clk_util_clk_msr(clk_mux);
/*for audio*/
/*set gen_clk_out: cts_msr_clk*/
aml_write_hiubus(HHI_GEN_CLK_CNTL, 0xc800);
/*msr_clk_mux_sel*/
writel_relaxed(((audio_index&0xff)<<20)|(1<<19), msr_clk_reg0);
/*pinmux for GEN_CLK_EE*/
aml_write_aobus(AO_RTI_PIN_MUX_REG1, 0x402230);
return clk_val;
}
return 0;
}
int m8b_clk_measure(struct seq_file *s, void *what, unsigned int index)
{
static const char * const clk_table[] = {
@@ -603,11 +569,11 @@ int axg_clk_measure(struct seq_file *s, void *what, unsigned int index)
if (index == 0xff) {
for (i = 0; i < len; i++)
seq_printf(s, "[%2d][%10d]%s\n",
i, axg_clk_util_clk_msr(i),
i, gxbb_clk_util_clk_msr(i),
clk_table[i]);
return 0;
}
seq_printf(s, "[%10d]%s\n", axg_clk_util_clk_msr(index),
seq_printf(s, "[%10d]%s\n", gxbb_clk_util_clk_msr(index),
clk_table[index]);
clk_msr_index = 0xff;
return 0;
@@ -1218,10 +1184,8 @@ int meson_clk_measure(unsigned int clk_mux)
case MESON_CPU_MAJOR_ID_TXLX:
case MESON_CPU_MAJOR_ID_G12A:
case MESON_CPU_MAJOR_ID_G12B:
clk_val = gxbb_clk_util_clk_msr(clk_mux);
break;
case MESON_CPU_MAJOR_ID_AXG:
clk_val = axg_clk_util_clk_msr(clk_mux);
clk_val = gxbb_clk_util_clk_msr(clk_mux);
break;
default:
pr_info("Unsupported chip clk measure\n");