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media: i2c: ov08d10: add delay to fix probability reg write failed

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1. add delay in setting to fix probability reg write failed
2. remove duplicate global register setting.

Signed-off-by: Wang Panzhenzhuan <randy.wang@rock-chips.com>
Change-Id: I8381c9b03480de4119abe225e1ef561a51dec59b
This commit is contained in:
Wang Panzhenzhuan
2024-06-25 09:10:58 +08:00
committed by Tao Huang
parent 75dfde714b
commit 54233dfbc5
1 changed files with 17 additions and 139 deletions
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156
drivers/media/i2c/ov08d10.c
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@@ -5,6 +5,9 @@
* Copyright (C) 2024 Rockchip Electronics Co., Ltd.
*
* V0.0X01.0X00 init version.
* V0.0X01.0X01
* 1. add delays in setting to fix probability reg write failed.
* 2. remove duplicate global register setting.
*/
//#define DEBUG
#include <linux/clk.h>
@@ -34,7 +37,7 @@
#include <linux/of_graph.h>
#include "otp_eeprom.h"
#define DRIVER_VERSION KERNEL_VERSION(0, 0x01, 0x00)
#define DRIVER_VERSION KERNEL_VERSION(0, 0x01, 0x01)
#ifndef V4L2_CID_DIGITAL_GAIN
#define V4L2_CID_DIGITAL_GAIN V4L2_CID_GAIN
@@ -80,6 +83,7 @@
#define OV08D10_UPDATE_REG 0x01
#define REG_NULL 0xFF
#define DELAY_MS 0xFE /* Array delay token */
#define OF_CAMERA_PINCTRL_STATE_DEFAULT "rockchip,camera_default"
#define OF_CAMERA_PINCTRL_STATE_SLEEP "rockchip,camera_sleep"
@@ -171,144 +175,9 @@ struct ov08d10 {
* bayer pattern = BGGR
*/
static const struct regval ov08d10_global_regs_2lane[] = {
{0xfd,0x00},
{0x20,0x0e},
{0x20,0x0b},
{0xfd,0x00},
{0x11,0x2a},
{0x14,0x43},
{0x1e,0x23},
{0x16,0x82},
{0x21,0x00},
{0xfd,0x01},
{0x12,0x00},
{0x02,0x00},
{0x03,0x12},
{0x04,0x50},
{0x05,0x00},
{0x06,0xd0},
{0x07,0x05},
{0x21,0x02},
{0x24,0x30},
{0x33,0x03},
{0x01,0x03},
{0x19,0x10},
{0x42,0x55},
{0x43,0x00},
{0x47,0x07},
{0x48,0x08},
{0x4c,0x38},
{0xb2,0x7e},
{0xb3,0x7b},
{0xbd,0x08},
{0xd2,0x47},
{0xd3,0x10},
{0xd4,0x0d},
{0xd5,0x08},
{0xd6,0x07},
{0xb1,0x00},
{0xb4,0x00},
{0xb7,0x0a},
{0xbc,0x44},
{0xbf,0x42},
{0xc1,0x10},
{0xc3,0x24},
{0xc8,0x03},
{0xc9,0xf8},
{0xe1,0x33},
{0xe2,0xbb},
{0x51,0x0c},
{0x52,0x0a},
{0x57,0x8c},
{0x59,0x09},
{0x5a,0x08},
{0x5e,0x10},
{0x60,0x02},
{0x6d,0x5c},
{0x76,0x16},
{0x7c,0x11},
{0x90,0x28},
{0x91,0x16},
{0x92,0x1c},
{0x93,0x24},
{0x95,0x48},
{0x9c,0x06},
{0xca,0x0c},
{0xce,0x0d},
{0xfd,0x01},
{0xc0,0x00},
{0xdd,0x18},
{0xde,0x19},
{0xdf,0x32},
{0xe0,0x70},
{0xfd,0x01},
{0xc2,0x05},
{0xd7,0x88},
{0xd8,0x77},
{0xd9,0x66},
{0xfd,0x07},
{0x00,0xf8},
{0x01,0x2b},
{0x05,0x40},
{0x08,0x06},
{0x09,0x11},
{0x28,0x6f},
{0x2a,0x20},
{0x2b,0x05},
{0x5e,0x10},
{0x52,0x00},
{0x53,0x80},
{0x54,0x00},
{0x55,0x80},
{0x56,0x00},
{0x57,0x80},
{0x58,0x00},
{0x59,0x80},
{0x5c,0x3f},
{0xfd,0x02},
{0x9a,0x30},
{0xa8,0x02},
{0xfd,0x02},
{0xa0,0x00},
{0xa1,0x08},
{0xa2,0x09},
{0xa3,0x90},
{0xa4,0x00},
{0xa5,0x08},
{0xa6,0x0c},
{0xa7,0xc0},
{0xfd,0x05},
{0x04,0x40},
{0x07,0x00},
{0x0D,0x01},
{0x0F,0x01},
{0x10,0x00},
{0x11,0x00},
{0x12,0x0C},
{0x13,0xCF},
{0x14,0x00},
{0x15,0x00},
{0x18,0x00},
{0x19,0x00},
{0xfd,0x00},
{0x24,0x01},
{0xc0,0x16},
{0xc1,0x08},
{0xc2,0x30},
{0x8e,0x0c},
{0x8f,0xc0},
{0x90,0x09},
{0x91,0x90},
{0xb7,0x02},
{0xfd,0x00},
{0x20,0x0f},
{0xe7,0x03},
{0xe7,0x00},
{0xfd,0x01},
{REG_NULL, 0x00},
};
/*
* Xclk 24Mhz
* max_framerate 15fps
@@ -317,6 +186,7 @@ static const struct regval ov08d10_global_regs_2lane[] = {
static const struct regval ov08d10_3264x2448_regs_2lane[] = {
{0xfd,0x00},
{0x20,0x0e},
{DELAY_MS, 3}, //Delay 3ms
{0x20,0x0b},
{0xfd,0x00},
{0x11,0x2a},
@@ -506,11 +376,19 @@ static int ov08d10_write_array(struct i2c_client *client,
const struct regval *regs)
{
u32 i = 0;
int ret = 0;
int delay_ms, ret = 0;
for (i = 0; ret == 0 && regs[i].addr != REG_NULL; i++)
for (i = 0; ret == 0 && regs[i].addr != REG_NULL; i++) {
if (regs[i].addr == DELAY_MS) {
delay_ms = regs[i].val;
dev_info(&client->dev, "delay(%d) ms !\n", delay_ms);
usleep_range(1000 * delay_ms, 1000 * delay_ms + 100);
continue;
}
ret = ov08d10_write_reg(client, regs[i].addr, regs[i].val);
if (ret)
dev_err(&client->dev, "%s failed !\n", __func__);
}
return ret;
}