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osd: add osd blend bypass function [1/1]

Browse Source 
PD#SWPL-9525

Problem:
dv certification need osd blend bypass

Solution:
add osd blend bypass function

Verify:
verified in sm1

Change-Id: Iabf5f8e41329a9220b1f9e5ccd7e0b0ab0dd7a3f
Signed-off-by: Pengcheng Chen <pengcheng.chen@amlogic.com>
This commit is contained in:
Pengcheng Chen
2019-05-31 15:06:18 +08:00
committed by Chris KIM
parent 095894031a
commit 5531691c6d
3 changed files with 61 additions and 7 deletions
Download Patch File Download Diff File Expand all files Collapse all files

30
drivers/amlogic/media/osd/osd_fb.c
View File

@@ -3354,6 +3354,33 @@ static ssize_t store_osd_hold_line(
return count;
}
static ssize_t show_osd_blend_bypass(
struct device *device, struct device_attribute *attr,
char *buf)
{
int blend_bypass;
blend_bypass = osd_get_blend_bypass();
return snprintf(buf, PAGE_SIZE, "0x%x\n", blend_bypass);
}
static ssize_t store_osd_blend_bypass(
struct device *device, struct device_attribute *attr,
const char *buf, size_t count)
{
struct fb_info *fb_info = dev_get_drvdata(device);
int blend_bypass;
int ret = 0;
ret = kstrtoint(buf, 0, &blend_bypass);
if (ret < 0)
return -EINVAL;
osd_set_blend_bypass(fb_info->node, blend_bypass);
return count;
}
static inline int str2lower(char *str)
{
@@ -3569,7 +3596,8 @@ static struct device_attribute osd_attrs[] = {
show_osd_line_n_rdma, store_osd_line_n_rdma),
__ATTR(osd_hold_line, 0644,
show_osd_hold_line, store_osd_hold_line),
__ATTR(osd_blend_bypass, 0644,
show_osd_blend_bypass, store_osd_blend_bypass),
};
static struct device_attribute osd_attrs_viu2[] = {

36
drivers/amlogic/media/osd/osd_hw.c
View File

@@ -2391,6 +2391,26 @@ u32 osd_get_line_n_rdma(void)
return osd_hw.line_n_rdma;
}
void osd_set_blend_bypass(int index, u32 blend_bypass)
{
if (blend_bypass != osd_hw.blend_bypass) {
osd_hw.blend_bypass = blend_bypass;
if (blend_bypass) {
VSYNCOSD_WR_MPEG_REG_BITS
(hw_osd_reg_array[index].osd_mali_unpack_ctrl,
0x0, 28, 1);
VSYNCOSD_WR_MPEG_REG_BITS
(VIU_OSD_BLEND_CTRL,
0x1, 26, 1);
}
}
}
u32 osd_get_blend_bypass(void)
{
return osd_hw.blend_bypass;
}
void osd_set_color_key_hw(u32 index, u32 color_index, u32 colorkey)
{
u8 r = 0, g = 0, b = 0, a = (colorkey & 0xff000000) >> 24;
@@ -6673,10 +6693,13 @@ static void osd_set_freescale(u32 index,
osd_log_err("error osd index=%d\n", index);
return;
}
osd_hw.free_scale_enable[index] = 0x10001;
osd_hw.free_scale[index].h_enable = 1;
osd_hw.free_scale[index].v_enable = 1;
osd_hw.free_scale_mode[index] = 1;
if (!(osd_hw.osd_display_debug &&
!osd_hw.free_scale_enable[index])) {
osd_hw.free_scale_enable[index] = 0x10001;
osd_hw.free_scale[index].h_enable = 1;
osd_hw.free_scale[index].v_enable = 1;
osd_hw.free_scale_mode[index] = 1;
}
output_index = get_output_device_id(index);
if (index == OSD1) {
@@ -8030,7 +8053,8 @@ static void set_blend_reg(struct layer_blend_reg_s *blend_reg)
/* osd0 scale position before osd blend */
if (osd_hw.osd_meson_dev.osd0_sc_independ)
VSYNCOSD_WR_MPEG_REG(VPP_OSD_SCALE_CTRL, 0x01);
if (osd_hw.blend_bypass)
blend_reg->din0_byp_blend = 1;
/* osd blend ctrl */
VSYNCOSD_WR_MPEG_REG(VIU_OSD_BLEND_CTRL,
4 << 29|
@@ -8299,7 +8323,7 @@ static int osd_setting_order(u32 output_index)
osd_hw.reg[DISP_FREESCALE_ENABLE]
.update_func(i);
}
if (osd_hw.premult_en[i])
if (osd_hw.premult_en[i] && !osd_hw.blend_bypass)
VSYNCOSD_WR_MPEG_REG_BITS(
osd_reg->osd_mali_unpack_ctrl, 0x1, 28, 1);
else

2
drivers/amlogic/media/osd/osd_hw.h
View File

@@ -225,4 +225,6 @@ void osd_set_line_n_rdma(u32 line_n_rdma);
u32 get_output_device_id(u32 index);
void osd_set_hold_line(u32 index, int hold_line);
u32 osd_get_hold_line(u32 index);
void osd_set_blend_bypass(int index, u32 blend_bypass);
u32 osd_get_blend_bypass(void);
#endif