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rockchip: clk: covert dsb() to dsb(sy)

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This commit is contained in:
Huang, Tao
2014-12-10 19:23:04 +08:00
parent 35140154b1
commit 5624f0b836
3 changed files with 14 additions and 14 deletions
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24
drivers/clk/rockchip/clk-pll.c
View File

@@ -487,12 +487,12 @@ static int _pll_clk_set_rate_3188(struct pll_clk_set *clk_set,
cru_writel(_RK3188_PLL_MODE_SLOW_SET(pll->mode_shift), pll->mode_offset);
//pll power down
cru_writel((0x1 << (16+1)) | (0x1<<1), pll->reg + RK3188_PLL_CON(3));
dsb();
dsb();
dsb();
dsb();
dsb();
dsb();
dsb(sy);
dsb(sy);
dsb(sy);
dsb(sy);
dsb(sy);
dsb(sy);
cru_writel(clk_set->pllcon0, pll->reg + RK3188_PLL_CON(0));
cru_writel(clk_set->pllcon1, pll->reg + RK3188_PLL_CON(1));
@@ -697,12 +697,12 @@ CHANGE_APLL:
/* PLL power down */
cru_writel((0x1 << (16+1)) | (0x1<<1), pll->reg + RK3188_PLL_CON(3));
dsb();
dsb();
dsb();
dsb();
dsb();
dsb();
dsb(sy);
dsb(sy);
dsb(sy);
dsb(sy);
dsb(sy);
dsb(sy);
cru_writel(ps->pllcon0, pll->reg + RK3188_PLL_CON(0));
cru_writel(ps->pllcon1, pll->reg + RK3188_PLL_CON(1));

2
drivers/clk/rockchip/clk.c
View File

@@ -36,7 +36,7 @@ u32 cru_readl(u32 offset)
void cru_writel(u32 val, u32 offset)
{
writel(val, rk_cru_base + (offset));
dsb();
dsb(sy);
}
u32 grf_readl(u32 offset)

2
include/linux/rockchip/cru.h
View File

@@ -121,7 +121,7 @@ static inline void rk3288_cru_set_soft_reset(u32 idx, bool on)
void __iomem *reg = RK_CRU_VIRT + RK3288_CRU_SOFTRSTS_CON(idx >> 4);
u32 val = on ? 0x10001U << (idx & 0xf) : 0x10000U << (idx & 0xf);
writel_relaxed(val, reg);
dsb();
dsb(sy);
}
#define RK3036_CRU_MODE_CON 0x0040