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deinterlace: pq: adjust pulldown setting for tl1 [1/1]

Browse Source 
PD#SWPL-3182

Problem:
1.VLSI(Feijun) fine-tune pulldown setting for TL1, G12A/B;
2.fine tune combing_glbmot_radprat by VLSI(yanling.liu);

Solution:
finetune setting.

Verify:
tl1

Change-Id: Ie65cec8b216752600dfd54ee6be5302150282774
Signed-off-by: Jihong Sui <jihong.sui@amlogic.com>
This commit is contained in:
Jihong Sui
2018-12-18 21:56:38 +08:00
committed by Luan Yuan
parent 309d50fbfc
commit 582e8e84eb
4 changed files with 32 additions and 14 deletions
Download Patch File Download Diff File Expand all files Collapse all files

12
drivers/amlogic/media/deinterlace/deinterlace.c
View File

@@ -4968,10 +4968,10 @@ de_post_process(void *arg, unsigned int zoom_start_x_lines,
/*it means use previous field for MC*/
/*else not pulldown,mcdi_mcpreflag is 2*/
/*it means use forward & previous field for MC*/
if (is_meson_txhd_cpu())
if (cpu_after_eq(MESON_CPU_MAJOR_ID_TXHD))
mc_pre_flag = 2;
} else {
if (is_meson_txhd_cpu())
if (cpu_after_eq(MESON_CPU_MAJOR_ID_TXHD))
mc_pre_flag = 1;
post_blend_mode = 1;
}
@@ -5008,8 +5008,7 @@ de_post_process(void *arg, unsigned int zoom_start_x_lines,
di_post_stru.di_mcvecrd_mif.canvas_num =
di_buf->di_buf_dup_p[2]->mcvec_canvas_idx;
mc_pre_flag = is_meson_txl_cpu()?0:(overturn?1:0);
if (is_meson_txlx_cpu() || is_meson_gxlx_cpu() ||
is_meson_txhd_cpu())
if (cpu_after_eq(MESON_CPU_MAJOR_ID_TXLX))
invert_mv = true;
else if (!overturn)
di_post_stru.di_buf2_mif.canvas0_addr0 =
@@ -5021,10 +5020,10 @@ de_post_process(void *arg, unsigned int zoom_start_x_lines,
/*it means use previous field for MC*/
/*else not pulldown,mcdi_mcpreflag is 2*/
/*it means use forward & previous field for MC*/
if (is_meson_txhd_cpu())
if (cpu_after_eq(MESON_CPU_MAJOR_ID_TXHD))
mc_pre_flag = 2;
} else {
if (is_meson_txhd_cpu())
if (cpu_after_eq(MESON_CPU_MAJOR_ID_TXHD))
mc_pre_flag = 1;
post_blend_mode = 1;
}
@@ -7523,6 +7522,7 @@ static void set_di_flag(void)
pldn_dly1 = 2;
}
mtn_int_combing_glbmot();
}
static const struct reserved_mem_ops rmem_di_ops = {

25
drivers/amlogic/media/deinterlace/deinterlace_hw.c
View File

@@ -2722,11 +2722,22 @@ void di_post_switch_buffer(
DI_VSYNC_WR_MPEG_REG_BITS(MCDI_MC_CRTL,
di_mcvecrd_mif->vecrd_offset, 12, 3);
if (di_mcvecrd_mif->blend_en) {
DI_VSYNC_WR_MPEG_REG_BITS(MCDI_MC_CRTL,
mcen_mode, 0, 2);
DI_VSYNC_WR_MPEG_REG_BITS(MCDI_MC_CRTL, 1, 11, 1);
DI_VSYNC_WR_MPEG_REG_BITS(MCDI_MC_CRTL,
3, 18, 2);
if (blend_mode == 1) {
DI_VSYNC_WR_MPEG_REG_BITS(MCDI_MC_CRTL,
mcen_mode, 0, 2);
DI_VSYNC_WR_MPEG_REG_BITS(MCDI_MC_CRTL,
0, 11, 1);
DI_VSYNC_WR_MPEG_REG_BITS(MCDI_MC_CRTL,
2, 18, 2);
} else {
DI_VSYNC_WR_MPEG_REG_BITS(MCDI_MC_CRTL,
mcen_mode, 0, 2);
DI_VSYNC_WR_MPEG_REG_BITS(MCDI_MC_CRTL,
1, 11, 1);
DI_VSYNC_WR_MPEG_REG_BITS(MCDI_MC_CRTL,
3, 18, 2);
}
} else {
DI_VSYNC_WR_MPEG_REG_BITS(MCDI_MC_CRTL,
0, 0, 2);
@@ -3174,7 +3185,7 @@ void di_post_read_reverse_irq(bool reverse, unsigned char mc_pre_flag,
DI_VSYNC_WR_MPEG_REG_BITS(MCDI_MCVECRD_X, 1, 30, 1);
DI_VSYNC_WR_MPEG_REG_BITS(MCDI_MCVECRD_Y, 1, 30, 1);
if (cpu_after_eq(MESON_CPU_MAJOR_ID_TXL)) {
if (cpu_after_eq(MESON_CPU_MAJOR_ID_TXLX)) {
if (is_meson_txlx_cpu()) {
DI_VSYNC_WR_MPEG_REG_BITS(MCDI_MC_CRTL,
pre_flag, 8, 2);
flag_val = (pre_flag != 2) ? 0 : 1;
@@ -3218,7 +3229,7 @@ void di_post_read_reverse_irq(bool reverse, unsigned char mc_pre_flag,
DI_VSYNC_WR_MPEG_REG_BITS(MCDI_MCVECRD_X, 0, 30, 1);
DI_VSYNC_WR_MPEG_REG_BITS(MCDI_MCVECRD_Y, 0, 30, 1);
if (cpu_after_eq(MESON_CPU_MAJOR_ID_TXL)) {
if (cpu_after_eq(MESON_CPU_MAJOR_ID_TXLX)) {
if (is_meson_txlx_cpu()) {
DI_VSYNC_WR_MPEG_REG_BITS(MCDI_MC_CRTL,
pre_flag, 8, 2);
flag_val = (pre_flag != 2) ? 0 : 1;

7
drivers/amlogic/media/deinterlace/deinterlace_mtn.c
View File

@@ -295,7 +295,12 @@ struct combing_status_s *adpative_combing_config(unsigned int width,
cmb_param.prog_flag = prog;
return &cmb_status;
}
void mtn_int_combing_glbmot(void)
{
if (is_meson_tl1_cpu()) {/*from VLSI yanling.liu*/
combing_glbmot_radprat[0] = 30;
}
}
void adpative_combing_exit(void)
{
}

2
drivers/amlogic/media/deinterlace/deinterlace_mtn.h
View File

@@ -44,4 +44,6 @@ int adaptive_combing_fixing(
unsigned int field_diff, unsigned int frame_diff,
int bit_mode);
void adpative_combing_exit(void);
extern void mtn_int_combing_glbmot(void);
#endif