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serial: 8250_dw: new baud rate and clk solution

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baud rate <=1500000, except 1152000, use 24MHz
baud rate > 1500000, and 1152000 use pll

Change-Id: I9f52fcafdf8cc3d32be78f8408ab75873ffff680
Signed-off-by: Huibin Hong <huibin.hong@rock-chips.com>
This commit is contained in:
Huibin Hong
2019-01-14 16:02:21 +08:00
committed by Tao Huang
parent f453308641
commit 584044d78b
1 changed files with 8 additions and 9 deletions
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17
drivers/tty/serial/8250/8250_dw.c
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@@ -313,7 +313,7 @@ static void dw8250_set_termios(struct uart_port *p, struct ktermios *termios,
struct dw8250_data *d = p->private_data;
long rate;
#ifdef CONFIG_ARCH_ROCKCHIP
unsigned int div, rate_temp, diff;
unsigned int rate_temp, diff;
#endif
int ret;
@@ -322,15 +322,14 @@ static void dw8250_set_termios(struct uart_port *p, struct ktermios *termios,
clk_disable_unprepare(d->clk);
#ifdef CONFIG_ARCH_ROCKCHIP
if ((baud * 16) <= 4000000) {
/*
* Make sure uart sclk is high enough
*/
div = 4000000 / baud / 16;
rate = baud * 16 * div;
} else {
if (baud <= 115200)
rate = 24000000;
else if (baud == 230400)
rate = baud * 16 * 2;
else if (baud == 1152000)
rate = baud * 16 * 2;
else
rate = baud * 16;
}
ret = clk_set_rate(d->clk, rate);
rate_temp = clk_get_rate(d->clk);