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clk: add clkmsr for g12b
PD#165090: add clkmsr for g12b Change-Id: I320b0759b5f3f57e8683ec5732f6660df1f0e052 Signed-off-by: Qiufang Dai <qiufang.dai@amlogic.com>
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@@ -928,6 +928,153 @@ int g12_ring_measure(struct seq_file *s, void *what, unsigned int index)
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return 0;
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}
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int g12b_clk_measure(struct seq_file *s, void *what, unsigned int index)
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{
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static const char * const clk_table[] = {
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[126] = "mipi_csi_phy1_clk_out",
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[125] = "mipi_csi_phy0_clk_out",
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[124] = "cts_gdc_core_clk",
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[123] = "cts_gdc_axi_clk",
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[122] = "mod_audio_pdm_dclk_o ",
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[121] = "audio_spdifin_mst_clk ",
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[120] = "audio_spdifout_mst_clk ",
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[119] = "audio_spdifout_b_mst_clk ",
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[118] = "audio_pdm_sysclk ",
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[117] = "audio_resample_clk ",
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[116] = "audio_tdmin_a_sclk ",
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[115] = "audio_tdmin_b_sclk ",
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[114] = "audio_tdmin_c_sclk ",
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[113] = "audio_tdmin_lb_sclk ",
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[112] = "audio_tdmout_a_sclk ",
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[111] = "audio_tdmout_b_sclk ",
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[110] = "audio_tdmout_c_sclk ",
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[109] = "c_alocker_out_clk ",
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[108] = "c_alocker_in_clk ",
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[107] = "au_dac_clk_g128x ",
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[106] = "ephy_test_clk ",
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[105] = "am_ring_osc_clk_out_ee[9] ",
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[104] = "am_ring_osc_clk_out_ee[8] ",
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[103] = "am_ring_osc_clk_out_ee[7] ",
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[102] = "am_ring_osc_clk_out_ee[6] ",
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[101] = "am_ring_osc_clk_out_ee[5] ",
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[100] = "am_ring_osc_clk_out_ee[4] ",
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[99] = "am_ring_osc_clk_out_ee[3] ",
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[98] = "cts_ts_clk ",
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[97] = "cts_vpu_clkb_tmp ",
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[96] = "cts_vpu_clkb ",
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[95] = "eth_phy_plltxclk ",
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[94] = "eth_phy_rxclk ",
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[93] = "1'b0 ",
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[92] = "1'b0 ",
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[91] = "1'b0 ",
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[90] = "cts_hdmitx_sys_clk ",
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[89] = "HDMI_CLK_TODIG ",
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[88] = "1'b0 ",
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[87] = "1'b0 ",
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[86] = "1'b0 ",
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[85] = "1'b0 ",
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[84] = "co_tx_clk ",
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[83] = "co_rx_clk ",
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[82] = "cts_ge2d_clk ",
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[81] = "cts_vapbclk ",
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[80] = "rng_ring_osc_clk[3] ",
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[79] = "rng_ring_osc_clk[2] ",
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[78] = "rng_ring_osc_clk[1] ",
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[77] = "rng_ring_osc_clk[0] ",
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[76] = "1'b0 ",
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[75] = "cts_hevcf_clk ",
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[74] = "1'b0 ",
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[73] = "cts_pwm_C_clk ",
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[72] = "cts_pwm_D_clk ",
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[71] = "cts_pwm_E_clk ",
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[70] = "cts_pwm_F_clk ",
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[69] = "cts_hdcp22_skpclk ",
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[68] = "cts_hdcp22_esmclk ",
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[67] = "cts_dsi_phy_clk ",
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[66] = "cts_vid_lock_clk ",
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[65] = "cts_spicc_0_clk ",
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[64] = "cts_spicc_1_clk ",
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[63] = "cts_dsi_meas_clk ",
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[62] = "cts_hevcb_clk ",
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[61] = "gpio_clk_msr ",
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[60] = "1'b0 ",
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[59] = "cts_hcodec_clk ",
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[58] = "cts_wave420l_bclk ",
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[57] = "cts_wave420l_cclk ",
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[56] = "cts_wave420l_aclk ",
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[55] = "vid_pll_div_clk_out ",
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[54] = "cts_vpu_clkc ",
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[53] = "cts_sd_emmc_clk_A ",
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[52] = "cts_sd_emmc_clk_B ",
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[51] = "cts_sd_emmc_clk_C ",
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[50] = "mp3_clk_out ",
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[49] = "mp2_clk_out ",
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[48] = "mp1_clk_out ",
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[47] = "ddr_dpll_pt_clk ",
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[46] = "cts_vpu_clk ",
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[45] = "cts_pwm_A_clk ",
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[44] = "cts_pwm_B_clk ",
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[43] = "fclk_div5 ",
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[42] = "mp0_clk_out ",
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[41] = "mac_eth_rx_clk_rmii ",
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[40] = "1'b0 ",
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[39] = "cts_bt656_clk0 ",
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[38] = "cts_vdin_meas_clk ",
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[37] = "cts_cdac_clk_c ",
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[36] = "cts_hdmi_tx_pixel_clk ",
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[35] = "cts_mali_clk ",
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[34] = "eth_mppll_50m_ckout ",
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[33] = "sys_cpu_ring_osc_clk[1] ",
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[32] = "cts_vdec_clk ",
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[31] = "mpll_clk_test_out ",
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[30] = "pcie_clk_inn ",
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[29] = "pcie_clk_inp ",
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[28] = "cts_sar_adc_clk ",
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[27] = "co_clkin_to_mac ",
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[26] = "sc_clk_int ",
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[25] = "cts_eth_clk_rmii ",
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[24] = "cts_eth_clk125Mhz ",
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[23] = "mpll_clk_50m ",
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[22] = "mac_eth_phy_ref_clk ",
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[21] = "lcd_an_clk_ph3 ",
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[20] = "rtc_osc_clk_out ",
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[19] = "lcd_an_clk_ph2 ",
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[18] = "sys_cpu_clk_div16 ",
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[17] = "sys_pll_div16 ",
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[16] = "cts_FEC_CLK_2 ",
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[15] = "cts_FEC_CLK_1 ",
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[14] = "cts_FEC_CLK_0 ",
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[13] = "mod_tcon_clko ",
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[12] = "hifi_pll_clk ",
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[11] = "mac_eth_tx_clk ",
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[10] = "cts_vdac_clk ",
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[9] = "cts_encl_clk ",
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[8] = "cts_encp_clk ",
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[7] = "clk81 ",
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[6] = "cts_enci_clk ",
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[5] = "1'b0 ",
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[4] = "gp0_pll_clk ",
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[3] = "sys_cpu_ring_osc_clk[0] ",
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[2] = "am_ring_osc_clk_out_ee[2]",
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[1] = "am_ring_osc_clk_out_ee[1]",
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[0] = "am_ring_osc_clk_out_ee[0]",
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};
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int i;
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int len = sizeof(clk_table)/sizeof(char *);
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if (index == 0xff) {
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for (i = 0; i < len; i++)
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seq_printf(s, "[%2d][%10d]%s\n",
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i, gxbb_clk_util_clk_msr(i),
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clk_table[i]);
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return 0;
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}
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seq_printf(s, "[%10d]%s\n", gxbb_clk_util_clk_msr(index),
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clk_table[index]);
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clk_msr_index = 0xff;
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return 0;
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}
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int meson_clk_measure(unsigned int clk_mux)
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{
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int clk_val;
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@@ -940,6 +1087,7 @@ int meson_clk_measure(unsigned int clk_mux)
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case MESON_CPU_MAJOR_ID_GXM:
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case MESON_CPU_MAJOR_ID_TXLX:
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case MESON_CPU_MAJOR_ID_G12A:
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case MESON_CPU_MAJOR_ID_G12B:
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clk_val = gxbb_clk_util_clk_msr(clk_mux);
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break;
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case MESON_CPU_MAJOR_ID_AXG:
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@@ -969,6 +1117,8 @@ static int dump_clk(struct seq_file *s, void *what)
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txlx_clk_measure(s, what, clk_msr_index);
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else if (get_cpu_type() == MESON_CPU_MAJOR_ID_G12A)
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g12a_clk_measure(s, what, clk_msr_index);
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else if (get_cpu_type() == MESON_CPU_MAJOR_ID_G12B)
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g12b_clk_measure(s, what, clk_msr_index);
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return 0;
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}
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