shinys000114/linux
1
0
Fork 0
mirror of https://github.com/hardkernel/linux.git synced 2026-06-07 03:15:31 +09:00
Code Issues Packages Projects Releases Wiki Activity

dts: cvbsout: add clk path config in dts

Browse Source 
PD#169489: add clk path config in dts

Change-Id: Id1ee72c9acf4030bff2e9f1c05e1420fdbe52131
Signed-off-by: Nian Jing <nian.jing@amlogic.com>
This commit is contained in:
Nian Jing
2018-07-03 19:44:10 +08:00
committed by Yixun Lan
parent 1346a36b3f
commit 590761c98f
15 changed files with 44 additions and 0 deletions
Download Patch File Download Diff File Expand all files Collapse all files

1
arch/arm64/boot/dts/amlogic/g12a_pxp.dts
View File

@@ -142,6 +142,7 @@
"venci_0_gate",
"venci_1_gate",
"vdac_clk_gate";
clk_path = <0>;
/* performance: reg_address, reg_value */
/* g12a */

6
arch/arm64/boot/dts/amlogic/g12a_s905d2_skt.dts
View File

@@ -154,6 +154,12 @@
"venci_0_gate",
"venci_1_gate",
"vdac_clk_gate";
/* clk path */
/* 0:vid_pll vid2_clk */
/* 1:gp0_pll vid2_clk */
/* 2:vid_pll vid1_clk */
/* 3:gp0_pll vid1_clk */
clk_path = <0>;
/* performance: reg_address, reg_value */
/* g12a */

1
arch/arm64/boot/dts/amlogic/g12a_s905d2_skt_buildroot.dts
View File

@@ -155,6 +155,7 @@
"venci_0_gate",
"venci_1_gate",
"vdac_clk_gate";
clk_path = <0>;
/* performance: reg_address, reg_value */
/* g12a */

6
arch/arm64/boot/dts/amlogic/g12a_s905d2_u200.dts
View File

@@ -167,6 +167,12 @@
"venci_0_gate",
"venci_1_gate",
"vdac_clk_gate";
/* clk path */
/* 0:vid_pll vid2_clk */
/* 1:gp0_pll vid2_clk */
/* 2:vid_pll vid1_clk */
/* 3:gp0_pll vid1_clk */
clk_path = <0>;
/* performance: reg_address, reg_value */
/* g12a */

1
arch/arm64/boot/dts/amlogic/g12a_s905d2_u200_buildroot.dts
View File

@@ -166,6 +166,7 @@
"venci_0_gate",
"venci_1_gate",
"vdac_clk_gate";
clk_path = <0>;
/* performance: reg_address, reg_value */
/* g12a */

1
arch/arm64/boot/dts/amlogic/g12a_s905d2_u200_drm_buildroot.dts
View File

@@ -167,6 +167,7 @@
"venci_0_gate",
"venci_1_gate",
"vdac_clk_gate";
clk_path = <0>;
/* performance: reg_address, reg_value */
/* g12a */

1
arch/arm64/boot/dts/amlogic/g12a_s905d2_u220.dts
View File

@@ -154,6 +154,7 @@
"venci_0_gate",
"venci_1_gate",
"vdac_clk_gate";
clk_path = <0>;
/* performance: reg_address, reg_value */
/* g12a */

1
arch/arm64/boot/dts/amlogic/g12a_s905x2_u211.dts
View File

@@ -186,6 +186,7 @@
"venci_0_gate",
"venci_1_gate",
"vdac_clk_gate";
clk_path = <0>;
/* performance: reg_address, reg_value */
/* g12a */

1
arch/arm64/boot/dts/amlogic/g12a_s905x2_u211_512m.dts
View File

@@ -186,6 +186,7 @@
"venci_0_gate",
"venci_1_gate",
"vdac_clk_gate";
clk_path = <0>;
/* performance: reg_address, reg_value */
/* g12a */

1
arch/arm64/boot/dts/amlogic/g12a_s905x2_u211_buildroot.dts
View File

@@ -185,6 +185,7 @@
"venci_0_gate",
"venci_1_gate",
"vdac_clk_gate";
clk_path = <0>;
/* performance: reg_address, reg_value */
/* g12a */

1
arch/arm64/boot/dts/amlogic/g12a_s905y2_u221.dts
View File

@@ -154,6 +154,7 @@
"venci_0_gate",
"venci_1_gate",
"vdac_clk_gate";
clk_path = <0>;
/* performance: reg_address, reg_value */
/* g12a */

1
arch/arm64/boot/dts/amlogic/g12b_a311d_skt.dts
View File

@@ -176,6 +176,7 @@
"venci_0_gate",
"venci_1_gate",
"vdac_clk_gate";
clk_path = <0>;
/* performance: reg_address, reg_value */
/* g12b */

6
arch/arm64/boot/dts/amlogic/g12b_a311d_w400.dts
View File

@@ -150,6 +150,12 @@
"venci_0_gate",
"venci_1_gate",
"vdac_clk_gate";
/* clk path */
/* 0:vid_pll vid2_clk */
/* 1:gp0_pll vid2_clk */
/* 2:vid_pll vid1_clk */
/* 3:gp0_pll vid1_clk */
clk_path = <0>;
/* performance: reg_address, reg_value */
/* g12b */

1
arch/arm64/boot/dts/amlogic/g12b_pxp.dts
View File

@@ -142,6 +142,7 @@
"venci_0_gate",
"venci_1_gate",
"vdac_clk_gate";
clk_path = <0>;
/* performance: reg_address, reg_value */
/* g12b */

15
drivers/amlogic/media/vout/cvbs/cvbs_out.c
View File

@@ -1326,6 +1326,21 @@ static void cvbsout_get_config(struct device *dev)
}
}
/*clk path*/
/*0:vid_pll vid2_clk*/
/*1:gp0_pll vid2_clk*/
/*2:vid_pll vid1_clk*/
/*3:gp0_pll vid1_clk*/
ret = of_property_read_u32(dev->of_node, "clk_path", &val);
if (ret)
cvbs_log_info("clk_path config null\n");
else if (val > 3)
cvbs_log_err("error: invalid clk_path\n");
else {
cvbs_clk_path = val;
cvbs_log_info("clk path:%d\n", cvbs_clk_path);
}
/* vdac config */
ret = of_property_read_u32(dev->of_node, "vdac_config", &val);
if (ret)