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ARM64: dts: marvell: armada-cp110: Add apb_pclk clock for the uart nodes

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This extra clock is needed to access the registers of the UARTs used on
CP110 component of the Armada 7K/8K SoCs.

Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
This commit is contained in:
Gregory CLEMENT
2018-03-01 14:18:19 +01:00
parent 41d63e45ec
commit 597667d889
1 changed files with 12 additions and 4 deletions
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16
arch/arm64/boot/dts/marvell/armada-cp110.dtsi
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@@ -303,7 +303,9 @@
reg-shift = <2>;
interrupts = <ICU_GRP_NSR 122 IRQ_TYPE_LEVEL_HIGH>;
reg-io-width = <1>;
clocks = <&CP110_LABEL(clk) 1 21>;
clock-names = "baudclk", "apb_pclk";
clocks = <&CP110_LABEL(clk) 1 21>,
<&CP110_LABEL(clk) 1 17>;
status = "disabled";
};
@@ -313,7 +315,9 @@
reg-shift = <2>;
interrupts = <ICU_GRP_NSR 123 IRQ_TYPE_LEVEL_HIGH>;
reg-io-width = <1>;
clocks = <&CP110_LABEL(clk) 1 21>;
clock-names = "baudclk", "apb_pclk";
clocks = <&CP110_LABEL(clk) 1 21>,
<&CP110_LABEL(clk) 1 17>;
status = "disabled";
};
@@ -323,7 +327,9 @@
reg-shift = <2>;
interrupts = <ICU_GRP_NSR 124 IRQ_TYPE_LEVEL_HIGH>;
reg-io-width = <1>;
clocks = <&CP110_LABEL(clk) 1 21>;
clock-names = "baudclk", "apb_pclk";
clocks = <&CP110_LABEL(clk) 1 21>,
<&CP110_LABEL(clk) 1 17>;
status = "disabled";
};
@@ -333,7 +339,9 @@
reg-shift = <2>;
interrupts = <ICU_GRP_NSR 125 IRQ_TYPE_LEVEL_HIGH>;
reg-io-width = <1>;
clocks = <&CP110_LABEL(clk) 1 21>;
clock-names = "baudclk", "apb_pclk";
clocks = <&CP110_LABEL(clk) 1 21>,
<&CP110_LABEL(clk) 1 17>;
status = "disabled";
};