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video: rockchip: mpp: rkvdec2: fix vdec IP stuck issue

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Platform: RV1126B

Err log:
mpp_rkvdec2 22140100.rkvdec: session 94 task 47772 timeout 1 abort 0 force_deq0
mpp_rkvdec2 22140100.rkvdec: resetting...
mpp_rkvdec2 22140100.rkvdec: reset timeout
mpp_rkvdec2 22140100.rkvdec: reset done
mpp_rkvdec2 22140100.rkvdec: resend task 47773
mpp_rkvdec2 22140100.rkvdec: resend task 47774

Err case:
When the zap mmu is issued, it causes the mmu to issue an additional
table fetch command. The data returned by this additional table fetch
command happens to fall during the clock-off period of the reset,
resulting in an incomplete final bus.

Solution:
The software should not zap the MMU while the hardware is operating.
Instead, the 1126B can rely on its built-in hardware MMU zap
functionality.

Change-Id: I1d7df42305edf910c1f39686832f856ccc26bc6d
Signed-off-by: Hongjin Li <vic.hong@rock-chips.com>
This commit is contained in:
Hongjin Li
2025-04-25 17:06:33 +08:00
parent f736a39fb8
commit 59b5ac2a0f
2 changed files with 9 additions and 1 deletions
Download Patch File Download Diff File Expand all files Collapse all files

8
drivers/video/rockchip/mpp/mpp_rkvdec2_link.c
View File

@@ -80,6 +80,7 @@ struct rkvdec_link_info rkvdec_link_v2_hw_info = {
.irq_base = 0x00,
.next_addr_base = 0x1c,
.err_mask = 0xf0,
.en_sw_iommu_zap = 1,
};
/* vdpu34x link hw info for rk356x */
@@ -142,6 +143,7 @@ struct rkvdec_link_info rkvdec_link_rk356x_hw_info = {
.irq_base = 0x00,
.next_addr_base = 0x1c,
.err_mask = 0xf0,
.en_sw_iommu_zap = 1,
};
/* vdpu382 link hw info */
@@ -204,6 +206,7 @@ struct rkvdec_link_info rkvdec_link_vdpu382_hw_info = {
.irq_base = 0x00,
.next_addr_base = 0x1c,
.err_mask = 0xf0,
.en_sw_iommu_zap = 1,
};
/* vdpu383 link hw info */
@@ -264,6 +267,7 @@ struct rkvdec_link_info rkvdec_link_vdpu383_hw_info = {
.en_base = 0x40,
.ip_en_base = 0x58,
.ip_en_val = 0x01000000,
.en_sw_iommu_zap = 1,
};
/* vdpu384a link hw info */
@@ -509,7 +513,9 @@ static int rkvdec2_link_enqueue(struct rkvdec_link_dev *link_dec,
/* start config before all registers are set */
wmb();
mpp_iommu_flush_tlb(link_dec->mpp->iommu_info);
/* After rv1126b, hw can execute zap. */
if (link_info->en_sw_iommu_zap)
mpp_iommu_flush_tlb(link_dec->mpp->iommu_info);
mpp_task_run_begin(mpp_task, timing_en, MPP_WORK_TIMEOUT_DELAY);
link_dec->task_running++;

2
drivers/video/rockchip/mpp/mpp_rkvdec2_link.h
View File

@@ -137,6 +137,8 @@ struct rkvdec_link_info {
u32 en_base;
u32 ip_en_base;
u32 ip_en_val;
u32 en_sw_iommu_zap;
};
struct rkvdec_link_dev {