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mtd: add new ATO slc nand support
PD#170048: mtd: add new ATO slc nand support add a ATO slc nand: AFND2G08U3A Change-Id: I0263682231008c862c9f3f77d02ef7512de3a46f Signed-off-by: Yi Zeng <yi.zeng@amlogic.com>
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@@ -275,6 +275,19 @@ struct aml_nand_flash_dev aml_nand_flash_ids[] = {
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0,
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(NAND_TIMING_MODE5 | NAND_ECC_BCH8_MODE)},
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{"ATO NAND AFND2G08U3A 2Gb",
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{NAND_MFR_HYNIX, 0xda, 0x90, 0x95, 0x46, 0xad},
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2048,
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256,
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0x20000,
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64,
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1,
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20,
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15,
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0,
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0,
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(NAND_TIMING_MODE5 | NAND_ECC_BCH8_MODE)},
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{"A revision NAND 1GiB sF1G-A",
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{NAND_MFR_AMD, 0xf1, 0x80, 0x1d, 0x01, 0xf1},
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2048,
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@@ -309,7 +309,8 @@ int aml_nand_scan_shipped_bbt(struct mtd_info *mtd)
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}
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if (aml_chip->mfr_type == NAND_MFR_DOSILICON ||
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aml_chip->mfr_type == NAND_MFR_ATO) {
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aml_chip->mfr_type == NAND_MFR_ATO ||
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aml_chip->mfr_type == NAND_MFR_HYNIX) {
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if (col0_oob != 0xFF) {
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pr_info("factory Bad blk:%llx blk=%d chip=%d\n",
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(uint64_t)addr, start_blk, i);
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@@ -381,31 +382,6 @@ int aml_nand_scan_shipped_bbt(struct mtd_info *mtd)
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break;
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}
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}
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if (aml_chip->mfr_type == NAND_MFR_HYNIX) {
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if (col0_oob != 0xFF) {
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pr_info("factory Bad blk:%llx blk=%d chip=%d\n",
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(uint64_t)addr, start_blk, i);
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aml_chip->nand_bbt_info->nand_bbt[bad_blk_cnt++] =
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start_blk|0x8000;
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aml_chip->block_status[start_blk] = NAND_FACTORY_BAD;
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/* if plane 0 is bad block,just set plane 1 to bad */
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if ((start_blk % 2) == 0) {
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start_blk += 1;
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aml_chip->nand_bbt_info->nand_bbt[bad_blk_cnt++] =
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start_blk|0x8000;
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aml_chip->block_status[start_blk] = NAND_FACTORY_BAD;
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pr_info(" pl0 is bad block,just set plane 1 to bad:\n");
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} else {
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aml_chip->nand_bbt_info->nand_bbt[bad_blk_cnt++] =
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(start_blk - 1)|0x8000;
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aml_chip->block_status[start_blk - 1] =
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NAND_FACTORY_BAD;
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pr_info(" pl1 is bad block,just set plane 0 to bad:\n");
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}
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break;
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}
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}
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}
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}
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/* } */
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