arm64: dts: rockchip: modify gpll freq to 1188M for rk1808

set gpll 1188M is better for cif 27M\37.125M\74.25M

Change-Id: I05003333980da535b9f20f021c38a2dbcedf74f6
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
This commit is contained in:
Elaine Zhang
2018-10-11 09:37:15 +08:00
committed by Tao Huang
parent c7e655d568
commit 5b3e79f430

View File

@@ -349,7 +349,7 @@
<&cru HSCLK_BUS_PRE>, <&cru MSCLK_BUS_PRE>,
<&cru LSCLK_BUS_PRE>;
assigned-clock-rates =
<1200000000>, <1000000000>,
<1188000000>, <1000000000>,
<200000000>, <816000000>,
<200000000>, <100000000>,
<300000000>, <200000000>,