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serial: 8250: Disable UART_IER_RLSI and UART_IER_RDI for dma receive
For rockchip serial, received data available and character timeout interrupts are both enabled by IER[0]. Then when there is data in the FIFO, received data available interrupt will occurd frequently. So we must disable it, but which may disable the character timeout interrput. Then it is useful to add a timer to report the data received in dma buffer every 10 microsecond. Change-Id: I1cf9dee495453d3530ab66c95a4e4cfef46b7795 Signed-off-by: Huibin Hong <huibin.hong@rock-chips.com>
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@@ -1563,9 +1563,17 @@ int serial8250_handle_irq(struct uart_port *port, unsigned int iir)
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DEBUG_INTR("status = %x...", status);
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if (status & (UART_LSR_DR | UART_LSR_BI)) {
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if (up->dma)
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dma_err = up->dma->rx_dma(up, iir);
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if (up->dma) {
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/*
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* The RDI must be masked, or interrupt
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* would occur all the time.
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*/
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up->ier &= ~(UART_IER_RLSI | UART_IER_RDI);
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up->port.read_status_mask &= ~UART_LSR_DR;
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serial_port_out(port, UART_IER, up->ier);
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dma_err = up->dma->rx_dma(up, iir);
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}
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if (!up->dma || dma_err)
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status = serial8250_rx_chars(up, status);
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}
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@@ -2355,6 +2363,9 @@ serial8250_do_set_termios(struct uart_port *port, struct ktermios *termios,
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serial8250_set_divisor(port, baud, quot, frac);
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if (up->dma)
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up->fcr = UART_FCR_ENABLE_FIFO | UART_FCR_T_TRIG_11;
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/*
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* LCR DLAB must be set to enable 64-byte FIFO mode. If the FCR
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* is written without DLAB set, this mode will be disabled.
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