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arm64: dts: rockchip: rk3588: Add hdptx hdmi phy1 node

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Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
Change-Id: Ibbdf50fd1bc65d529fbbaa99db95d971abdcbdc8
This commit is contained in:
Algea Cao
2021-11-16 15:21:21 +08:00
committed by Tao Huang
parent 3fc0de144c
commit 5d5fd11a6b
1 changed files with 21 additions and 2 deletions
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23
arch/arm64/boot/dts/rockchip/rk3588.dtsi
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@@ -348,14 +348,16 @@
<&cru CLK_HDMIHDP1>,
<&cru CLK_HDMITX1_EARC>,
<&cru CLK_HDMITX1_REF>;
clock-names = "iahb", "hpd", "earc", "ref";
clock-names = "pclk", "hpd", "earc", "ref";
resets = <&cru SRST_HDMITX1_REF>, <&cru SRST_HDMIHDP1>;
reset-names = "ref", "hdp";
power-domains = <&power RK3588_PD_VO1>;
pinctrl-names = "default";
pinctrl-0 = <&hdmim2_tx1_cec &hdmim0_tx1_hpd &hdmim1_tx1_scl &hdmim1_tx1_sda>;
reg-io-width = <4>;
rockchip,grf = <&sys_grf>;
rockchip,vo1_grf = <&vo1_grf>;
phys = <&hdptxphy1>;
phys = <&hdptxphy_hdmi1>;
phy-names = "hdmi";
#sound-dai-cells = <0>;
status = "disabled";
@@ -670,6 +672,23 @@
status = "disabled";
};
hdptxphy_hdmi1: hdmiphy@fed70000 {
compatible = "rockchip,rk3588-hdptx-phy-hdmi";
reg = <0x0 0xfed70000 0x0 0x2000>;
clocks = <&cru CLK_USB2PHY_HDPTXRXPHY_REF>, <&cru PCLK_HDPTX1>;
clock-names = "ref", "apb";
resets = <&cru SRST_HDPTX1>, <&cru SRST_P_HDPTX1>,
<&cru SRST_HDPTX1_INIT>, <&cru SRST_HDPTX1_CMN>,
<&cru SRST_HDPTX1_LANE>, <&cru SRST_HDPTX1_ROPLL>,
<&cru SRST_HDPTX1_LCPLL>;
reset-names = "phy", "apb", "init", "cmn", "lane", "ropll",
"lcpll";
rockchip,grf = <&hdptxphy1_grf>;
#phy-cells = <0>;
status = "disabled";
};
usbdp_phy1: phy@fed90000 {
compatible = "rockchip,rk3588-usbdp-phy";
reg = <0x0 0xfed90000 0x0 0x10000>;