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arm64: dts: rockchip: px30: add rgb node

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Signed-off-by: Guochun Huang <hero.huang@rock-chips.com>
Change-Id: I5a3f4a63279412a5f23588d8a057726caf3ccb6e
This commit is contained in:
Guochun Huang
2022-07-20 16:37:38 +08:00
committed by Tao Huang
parent fc219e8866
commit 5e39108372
2 changed files with 150 additions and 139 deletions
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230
arch/arm64/boot/dts/rockchip/px30.dtsi
View File

@@ -790,6 +790,35 @@
};
};
};
rgb: rgb {
compatible = "rockchip,px30-rgb";
pinctrl-names = "default", "sleep";
pinctrl-0 = <&lcdc_m0_rgb_pins>;
pinctrl-1 = <&lcdc_m0_sleep_pins>;
status = "disabled";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
#address-cells = <1>;
#size-cells = <0>;
rgb_in_vopb: endpoint@0 {
reg = <0>;
remote-endpoint = <&vopb_out_rgb>;
};
rgb_in_vopl: endpoint@1 {
reg = <1>;
remote-endpoint = <&vopl_out_rgb>;
};
};
};
};
};
core_grf: syscon@ff148000 {
@@ -1638,6 +1667,11 @@
reg = <1>;
remote-endpoint = <&lvds_vopb_in>;
};
vopb_out_rgb: endpoint@2 {
reg = <2>;
remote-endpoint = <&rgb_in_vopb>;
};
};
};
@@ -1679,6 +1713,11 @@
reg = <1>;
remote-endpoint = <&lvds_vopl_in>;
};
vopl_out_rgb: endpoint@2 {
reg = <2>;
remote-endpoint = <&rgb_in_vopl>;
};
};
};
@@ -2805,143 +2844,68 @@
};
lcdc {
lcdc_rgb_dclk_pin: lcdc-rgb-dclk-pin {
lcdc_m0_rgb_pins: lcdc-m0-rgb-pins {
rockchip,pins =
<3 RK_PA0 1 &pcfg_pull_none_12ma>;
<3 RK_PA0 1 &pcfg_pull_none_8ma>, /* LCDC_DCLK */
<3 RK_PA1 1 &pcfg_pull_none_8ma>, /* LCDC_HSYNC */
<3 RK_PA2 1 &pcfg_pull_none_8ma>, /* LCDC_VSYNC */
<3 RK_PA3 1 &pcfg_pull_none_8ma>, /* LCDC_DEN */
<3 RK_PA4 1 &pcfg_pull_none_8ma>, /* LCDC_D0 */
<3 RK_PA5 1 &pcfg_pull_none_8ma>, /* LCDC_D1 */
<3 RK_PA6 1 &pcfg_pull_none_8ma>, /* LCDC_D2 */
<3 RK_PA7 1 &pcfg_pull_none_8ma>, /* LCDC_D3 */
<3 RK_PB0 1 &pcfg_pull_none_8ma>, /* LCDC_D4 */
<3 RK_PB1 1 &pcfg_pull_none_8ma>, /* LCDC_D5 */
<3 RK_PB2 1 &pcfg_pull_none_8ma>, /* LCDC_D6 */
<3 RK_PB3 1 &pcfg_pull_none_8ma>, /* LCDC_D7 */
<3 RK_PB4 1 &pcfg_pull_none_8ma>, /* LCDC_D8 */
<3 RK_PB5 1 &pcfg_pull_none_8ma>, /* LCDC_D9 */
<3 RK_PB6 1 &pcfg_pull_none_8ma>, /* LCDC_D10 */
<3 RK_PB7 1 &pcfg_pull_none_8ma>, /* LCDC_D11 */
<3 RK_PC0 1 &pcfg_pull_none_8ma>, /* LCDC_D12 */
<3 RK_PC1 1 &pcfg_pull_none_8ma>, /* LCDC_D13 */
<3 RK_PC2 1 &pcfg_pull_none_8ma>, /* LCDC_D14 */
<3 RK_PC3 1 &pcfg_pull_none_8ma>, /* LCDC_D15 */
<3 RK_PC4 1 &pcfg_pull_none_8ma>, /* LCDC_D16 */
<3 RK_PC5 1 &pcfg_pull_none_8ma>, /* LCDC_D17 */
<3 RK_PC6 1 &pcfg_pull_none_8ma>, /* LCDC_D18 */
<3 RK_PC7 1 &pcfg_pull_none_8ma>, /* LCDC_D19 */
<3 RK_PD0 1 &pcfg_pull_none_8ma>, /* LCDC_D20 */
<3 RK_PD1 1 &pcfg_pull_none_8ma>, /* LCDC_D21 */
<3 RK_PD2 1 &pcfg_pull_none_8ma>, /* LCDC_D22 */
<3 RK_PD3 1 &pcfg_pull_none_8ma>; /* LCDC_D23 */
};
lcdc_rgb_m0_hsync_pin: lcdc-rgb-m0-hsync-pin {
lcdc_m0_sleep_pins: lcdc-m0-sleep-pins {
rockchip,pins =
<3 RK_PA1 1 &pcfg_pull_none_12ma>;
};
lcdc_rgb_m0_vsync_pin: lcdc-rgb-m0-vsync-pin {
rockchip,pins =
<3 RK_PA2 1 &pcfg_pull_none_12ma>;
};
lcdc_rgb_m0_den_pin: lcdc-rgb-m0-den-pin {
rockchip,pins =
<3 RK_PA3 1 &pcfg_pull_none_12ma>;
};
lcdc_rgb888_m0_data_pins: lcdc-rgb888-m0-data-pins {
rockchip,pins =
<3 RK_PA7 1 &pcfg_pull_none_8ma>, /* lcdc_d3 */
<3 RK_PA6 1 &pcfg_pull_none_8ma>, /* lcdc_d2 */
<3 RK_PA5 1 &pcfg_pull_none_8ma>, /* lcdc_d1 */
<3 RK_PA4 1 &pcfg_pull_none_8ma>, /* lcdc_d0 */
<3 RK_PB3 1 &pcfg_pull_none_8ma>, /* lcdc_d7 */
<3 RK_PB2 1 &pcfg_pull_none_8ma>, /* lcdc_d6 */
<3 RK_PB1 1 &pcfg_pull_none_8ma>, /* lcdc_d5 */
<3 RK_PB0 1 &pcfg_pull_none_8ma>, /* lcdc_d4 */
<3 RK_PB7 1 &pcfg_pull_none_8ma>, /* lcdc_d11 */
<3 RK_PB6 1 &pcfg_pull_none_8ma>, /* lcdc_d10 */
<3 RK_PB5 1 &pcfg_pull_none_8ma>, /* lcdc_d9 */
<3 RK_PB4 1 &pcfg_pull_none_8ma>, /* lcdc_d8 */
<3 RK_PC3 1 &pcfg_pull_none_8ma>, /* lcdc_d15 */
<3 RK_PC2 1 &pcfg_pull_none_8ma>, /* lcdc_d14 */
<3 RK_PC1 1 &pcfg_pull_none_8ma>, /* lcdc_d13 */
<3 RK_PC0 1 &pcfg_pull_none_8ma>, /* lcdc_d12 */
<3 RK_PC7 1 &pcfg_pull_none_8ma>, /* lcdc_d19 */
<3 RK_PC6 1 &pcfg_pull_none_8ma>, /* lcdc_d18 */
<3 RK_PC5 1 &pcfg_pull_none_8ma>, /* lcdc_d17 */
<3 RK_PC4 1 &pcfg_pull_none_8ma>, /* lcdc_d16 */
<3 RK_PD3 1 &pcfg_pull_none_8ma>, /* lcdc_d23 */
<3 RK_PD2 1 &pcfg_pull_none_8ma>, /* lcdc_d22 */
<3 RK_PD1 1 &pcfg_pull_none_8ma>, /* lcdc_d21 */
<3 RK_PD0 1 &pcfg_pull_none_8ma>; /* lcdc_d20 */
};
lcdc_rgb666_m0_data_pins: lcdc-rgb666-m0-data-pins {
rockchip,pins =
<3 RK_PA7 1 &pcfg_pull_none_8ma>, /* lcdc_d3 */
<3 RK_PA6 1 &pcfg_pull_none_8ma>, /* lcdc_d2 */
<3 RK_PA5 1 &pcfg_pull_none_8ma>, /* lcdc_d1 */
<3 RK_PA4 1 &pcfg_pull_none_8ma>, /* lcdc_d0 */
<3 RK_PB3 1 &pcfg_pull_none_8ma>, /* lcdc_d7 */
<3 RK_PB2 1 &pcfg_pull_none_8ma>, /* lcdc_d6 */
<3 RK_PB1 1 &pcfg_pull_none_8ma>, /* lcdc_d5 */
<3 RK_PB0 1 &pcfg_pull_none_8ma>, /* lcdc_d4 */
<3 RK_PB7 1 &pcfg_pull_none_8ma>, /* lcdc_d11 */
<3 RK_PB6 1 &pcfg_pull_none_8ma>, /* lcdc_d10 */
<3 RK_PB5 1 &pcfg_pull_none_8ma>, /* lcdc_d9 */
<3 RK_PB4 1 &pcfg_pull_none_8ma>, /* lcdc_d8 */
<3 RK_PC3 1 &pcfg_pull_none_8ma>, /* lcdc_d15 */
<3 RK_PC2 1 &pcfg_pull_none_8ma>, /* lcdc_d14 */
<3 RK_PC1 1 &pcfg_pull_none_8ma>, /* lcdc_d13 */
<3 RK_PC0 1 &pcfg_pull_none_8ma>, /* lcdc_d12 */
<3 RK_PC5 1 &pcfg_pull_none_8ma>, /* lcdc_d17 */
<3 RK_PC4 1 &pcfg_pull_none_8ma>; /* lcdc_d16 */
};
lcdc_rgb565_m0_data_pins: lcdc-rgb565-m0-data-pins {
rockchip,pins =
<3 RK_PA7 1 &pcfg_pull_none_8ma>, /* lcdc_d3 */
<3 RK_PA6 1 &pcfg_pull_none_8ma>, /* lcdc_d2 */
<3 RK_PA5 1 &pcfg_pull_none_8ma>, /* lcdc_d1 */
<3 RK_PA4 1 &pcfg_pull_none_8ma>, /* lcdc_d0 */
<3 RK_PB3 1 &pcfg_pull_none_8ma>, /* lcdc_d7 */
<3 RK_PB2 1 &pcfg_pull_none_8ma>, /* lcdc_d6 */
<3 RK_PB1 1 &pcfg_pull_none_8ma>, /* lcdc_d5 */
<3 RK_PB0 1 &pcfg_pull_none_8ma>, /* lcdc_d4 */
<3 RK_PB7 1 &pcfg_pull_none_8ma>, /* lcdc_d11 */
<3 RK_PB6 1 &pcfg_pull_none_8ma>, /* lcdc_d10 */
<3 RK_PB5 1 &pcfg_pull_none_8ma>, /* lcdc_d9 */
<3 RK_PB4 1 &pcfg_pull_none_8ma>, /* lcdc_d8 */
<3 RK_PC3 1 &pcfg_pull_none_8ma>, /* lcdc_d15 */
<3 RK_PC2 1 &pcfg_pull_none_8ma>, /* lcdc_d14 */
<3 RK_PC1 1 &pcfg_pull_none_8ma>, /* lcdc_d13 */
<3 RK_PC0 1 &pcfg_pull_none_8ma>; /* lcdc_d12 */
};
lcdc_rgb888_m1_data_pins: lcdc-rgb888-m1-data-pins {
rockchip,pins =
<3 RK_PA6 1 &pcfg_pull_none_8ma>, /* lcdc_d2 */
<3 RK_PA4 1 &pcfg_pull_none_8ma>, /* lcdc_d0 */
<3 RK_PB3 1 &pcfg_pull_none_8ma>, /* lcdc_d7 */
<3 RK_PB2 1 &pcfg_pull_none_8ma>, /* lcdc_d6 */
<3 RK_PB5 1 &pcfg_pull_none_8ma>, /* lcdc_d9 */
<3 RK_PC3 1 &pcfg_pull_none_8ma>, /* lcdc_d15 */
<3 RK_PC2 1 &pcfg_pull_none_8ma>, /* lcdc_d14 */
<3 RK_PC1 1 &pcfg_pull_none_8ma>, /* lcdc_d13 */
<3 RK_PC0 1 &pcfg_pull_none_8ma>, /* lcdc_d12 */
<3 RK_PC7 1 &pcfg_pull_none_8ma>, /* lcdc_d19 */
<3 RK_PC6 1 &pcfg_pull_none_8ma>, /* lcdc_d18 */
<3 RK_PC5 1 &pcfg_pull_none_8ma>, /* lcdc_d17 */
<3 RK_PC4 1 &pcfg_pull_none_8ma>, /* lcdc_d16 */
<3 RK_PD3 1 &pcfg_pull_none_8ma>, /* lcdc_d23 */
<3 RK_PD2 1 &pcfg_pull_none_8ma>, /* lcdc_d22 */
<3 RK_PD1 1 &pcfg_pull_none_8ma>, /* lcdc_d21 */
<3 RK_PD0 1 &pcfg_pull_none_8ma>; /* lcdc_d20 */
};
lcdc_rgb666_m1_data_pins: lcdc-rgb666-m1-data-pins {
rockchip,pins =
<3 RK_PA6 1 &pcfg_pull_none_8ma>, /* lcdc_d2 */
<3 RK_PA4 1 &pcfg_pull_none_8ma>, /* lcdc_d0 */
<3 RK_PB3 1 &pcfg_pull_none_8ma>, /* lcdc_d7 */
<3 RK_PB2 1 &pcfg_pull_none_8ma>, /* lcdc_d6 */
<3 RK_PB5 1 &pcfg_pull_none_8ma>, /* lcdc_d9 */
<3 RK_PC3 1 &pcfg_pull_none_8ma>, /* lcdc_d15 */
<3 RK_PC2 1 &pcfg_pull_none_8ma>, /* lcdc_d14 */
<3 RK_PC1 1 &pcfg_pull_none_8ma>, /* lcdc_d13 */
<3 RK_PC0 1 &pcfg_pull_none_8ma>, /* lcdc_d12 */
<3 RK_PC5 1 &pcfg_pull_none_8ma>, /* lcdc_d17 */
<3 RK_PC4 1 &pcfg_pull_none_8ma>; /* lcdc_d16 */
};
lcdc_rgb565_m1_data_pins: lcdc-rgb565-m1-data-pins {
rockchip,pins =
<3 RK_PA6 1 &pcfg_pull_none_8ma>, /* lcdc_d2 */
<3 RK_PA4 1 &pcfg_pull_none_8ma>, /* lcdc_d0 */
<3 RK_PB3 1 &pcfg_pull_none_8ma>, /* lcdc_d7 */
<3 RK_PB2 1 &pcfg_pull_none_8ma>, /* lcdc_d6 */
<3 RK_PB5 1 &pcfg_pull_none_8ma>, /* lcdc_d9 */
<3 RK_PC3 1 &pcfg_pull_none_8ma>, /* lcdc_d15 */
<3 RK_PC2 1 &pcfg_pull_none_8ma>, /* lcdc_d14 */
<3 RK_PC1 1 &pcfg_pull_none_8ma>, /* lcdc_d13 */
<3 RK_PC0 1 &pcfg_pull_none_8ma>; /* lcdc_d12 */
<3 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_DCLK */
<3 RK_PA1 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_HSYNC */
<3 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_VSYNC */
<3 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_DEN */
<3 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D0 */
<3 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D1 */
<3 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D2 */
<3 RK_PA7 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D3 */
<3 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D4 */
<3 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D5 */
<3 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D6 */
<3 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D7 */
<3 RK_PB4 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D8 */
<3 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D9 */
<3 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D10 */
<3 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D11 */
<3 RK_PC0 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D12 */
<3 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D13 */
<3 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D14 */
<3 RK_PC3 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D15 */
<3 RK_PC4 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D16 */
<3 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D17 */
<3 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D18 */
<3 RK_PC7 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D19 */
<3 RK_PD0 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D20 */
<3 RK_PD1 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D21 */
<3 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D22 */
<3 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>; /* LCDC_D23 */
};
};

59
arch/arm64/boot/dts/rockchip/rk3326.dtsi
View File

@@ -5,11 +5,58 @@
#include "px30.dtsi"
&display_subsystem {
ports = <&vopb_out>;
&rgb {
phys = <&video_phy>;
phy-names = "phy";
pinctrl-names = "default", "sleep";
pinctrl-0 = <&lcdc_m1_rgb_pins>;
pinctrl-1 = <&lcdc_m1_sleep_pins>;
};
/delete-node/ &dsi_in_vopl;
/delete-node/ &lvds_vopl_in;
/delete-node/ &vopl;
/delete-node/ &vopl_mmu;
&pinctrl {
lcdc {
lcdc_m1_rgb_pins: lcdc-m1-rgb-pins {
rockchip,pins =
<3 RK_PA0 1 &pcfg_pull_none_8ma>, /* LCDC_DCLK */
<3 RK_PA4 1 &pcfg_pull_none_8ma>, /* LCDC_D0 */
<3 RK_PA6 1 &pcfg_pull_none_8ma>, /* LCDC_D2 */
<3 RK_PB2 1 &pcfg_pull_none_8ma>, /* LCDC_D6 */
<3 RK_PB3 1 &pcfg_pull_none_8ma>, /* LCDC_D7 */
<3 RK_PB5 1 &pcfg_pull_none_8ma>, /* LCDC_D9 */
<3 RK_PC0 1 &pcfg_pull_none_8ma>, /* LCDC_D12 */
<3 RK_PC1 1 &pcfg_pull_none_8ma>, /* LCDC_D13 */
<3 RK_PC2 1 &pcfg_pull_none_8ma>, /* LCDC_D14 */
<3 RK_PC3 1 &pcfg_pull_none_8ma>, /* LCDC_D15 */
<3 RK_PC4 1 &pcfg_pull_none_8ma>, /* LCDC_D16 */
<3 RK_PC5 1 &pcfg_pull_none_8ma>, /* LCDC_D17 */
<3 RK_PC6 1 &pcfg_pull_none_8ma>, /* LCDC_D18 */
<3 RK_PC7 1 &pcfg_pull_none_8ma>, /* LCDC_D19 */
<3 RK_PD0 1 &pcfg_pull_none_8ma>, /* LCDC_D20 */
<3 RK_PD1 1 &pcfg_pull_none_8ma>, /* LCDC_D21 */
<3 RK_PD2 1 &pcfg_pull_none_8ma>, /* LCDC_D22 */
<3 RK_PD3 1 &pcfg_pull_none_8ma>; /* LCDC_D23 */
};
lcdc_m1_sleep_pins: lcdc-m1-sleep-pins {
rockchip,pins =
<3 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_DCLK */
<3 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D0 */
<3 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D2 */
<3 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D6 */
<3 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D7 */
<3 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D9 */
<3 RK_PC0 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D12 */
<3 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D13 */
<3 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D14 */
<3 RK_PC3 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D15 */
<3 RK_PC4 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D16 */
<3 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D17 */
<3 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D18 */
<3 RK_PC7 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D19 */
<3 RK_PD0 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D20 */
<3 RK_PD1 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D21 */
<3 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D22 */
<3 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>; /* LCDC_D23 */
};
};
};