shinys000114/linux
1
0
Fork 0
mirror of https://github.com/hardkernel/linux.git synced 2026-06-09 04:10:18 +09:00
Code Issues Packages Projects Releases Wiki Activity

arm64: dts: rockchip: Add pwm nodes for rk3308b

Browse Source 
Change-Id: I4dd43c44e35af1ac40754fc47bb4a4d602b45c73
Signed-off-by: David Wu <david.wu@rock-chips.com>
This commit is contained in:
David Wu
2018-08-31 19:18:33 +08:00
committed by Tao Huang
parent 4d3d65c13d
commit 5eab040d77
1 changed files with 88 additions and 0 deletions
Download Patch File Download Diff File Expand all files Collapse all files

88
arch/arm64/boot/dts/rockchip/rk3308.dtsi
View File

@@ -603,6 +603,94 @@
status = "disabled";
};
pwm8: pwm@ff160000 {
compatible = "rockchip,rk3308-pwm", "rockchip,rk3328-pwm";
reg = <0x0 0xff160000 0x0 0x10>;
#pwm-cells = <3>;
pinctrl-names = "active";
pinctrl-0 = <&pwm8_pin>;
clocks = <&cru SCLK_PWM2>, <&cru PCLK_PWM2>;
clock-names = "pwm", "pclk";
status = "disabled";
};
pwm9: pwm@ff160010 {
compatible = "rockchip,rk3308-pwm", "rockchip,rk3328-pwm";
reg = <0x0 0xff160010 0x0 0x10>;
#pwm-cells = <3>;
pinctrl-names = "active";
pinctrl-0 = <&pwm9_pin>;
clocks = <&cru SCLK_PWM2>, <&cru PCLK_PWM2>;
clock-names = "pwm", "pclk";
status = "disabled";
};
pwm10: pwm@ff160020 {
compatible = "rockchip,rk3308-pwm", "rockchip,rk3328-pwm";
reg = <0x0 0xff160020 0x0 0x10>;
#pwm-cells = <3>;
pinctrl-names = "active";
pinctrl-0 = <&pwm10_pin>;
clocks = <&cru SCLK_PWM2>, <&cru PCLK_PWM2>;
clock-names = "pwm", "pclk";
status = "disabled";
};
pwm11: pwm@ff160030 {
compatible = "rockchip,rk3308-pwm", "rockchip,rk3328-pwm";
reg = <0x0 0xff160030 0x0 0x10>;
#pwm-cells = <3>;
pinctrl-names = "active";
pinctrl-0 = <&pwm11_pin>;
clocks = <&cru SCLK_PWM2>, <&cru PCLK_PWM2>;
clock-names = "pwm", "pclk";
status = "disabled";
};
pwm4: pwm@ff170000 {
compatible = "rockchip,rk3308-pwm", "rockchip,rk3328-pwm";
reg = <0x0 0xff170000 0x0 0x10>;
#pwm-cells = <3>;
pinctrl-names = "active";
pinctrl-0 = <&pwm4_pin>;
clocks = <&cru SCLK_PWM1>, <&cru PCLK_PWM1>;
clock-names = "pwm", "pclk";
status = "disabled";
};
pwm5: pwm@ff170010 {
compatible = "rockchip,rk3308-pwm", "rockchip,rk3328-pwm";
reg = <0x0 0xff170010 0x0 0x10>;
#pwm-cells = <3>;
pinctrl-names = "active";
pinctrl-0 = <&pwm5_pin>;
clocks = <&cru SCLK_PWM1>, <&cru PCLK_PWM1>;
clock-names = "pwm", "pclk";
status = "disabled";
};
pwm6: pwm@ff170020 {
compatible = "rockchip,rk3308-pwm", "rockchip,rk3328-pwm";
reg = <0x0 0xff170020 0x0 0x10>;
#pwm-cells = <3>;
pinctrl-names = "active";
pinctrl-0 = <&pwm6_pin>;
clocks = <&cru SCLK_PWM1>, <&cru PCLK_PWM1>;
clock-names = "pwm", "pclk";
status = "disabled";
};
pwm7: pwm@ff170030 {
compatible = "rockchip,rk3308-pwm", "rockchip,rk3328-pwm";
reg = <0x0 0xff170030 0x0 0x10>;
#pwm-cells = <3>;
pinctrl-names = "active";
pinctrl-0 = <&pwm7_pin>;
clocks = <&cru SCLK_PWM1>, <&cru PCLK_PWM1>;
clock-names = "pwm", "pclk";
status = "disabled";
};
pwm0: pwm@ff180000 {
compatible = "rockchip,rk3308-pwm", "rockchip,rk3328-pwm";
reg = <0x0 0xff180000 0x0 0x10>;