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ASoC: codecs: rv1106_codec: fix and optimize ADC enabling VREF
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com> Change-Id: Ieb34e125972faef68f0bef23c4819aeaf6127ee7
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@@ -1370,13 +1370,6 @@ static int rv1106_codec_adc_enable(struct rv1106_codec_priv *rv1106)
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R(lr, ACODEC_ADC_R_SINGLE_END));
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}
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regmap_update_bits(rv1106->regmap,
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ACODEC_ADC_ANA_CTL3,
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L(lr, ACODEC_MIC_L_MSK) |
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R(lr, ACODEC_MIC_R_MSK),
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L(lr, ACODEC_MIC_L_EN) |
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R(lr, ACODEC_MIC_R_EN));
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/* vendor step 2 */
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regmap_update_bits(rv1106->regmap, ACODEC_ADC_ANA_CTL1,
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L(lr, ACODEC_ADC_L_MIC_MSK) |
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@@ -1386,8 +1379,8 @@ static int rv1106_codec_adc_enable(struct rv1106_codec_priv *rv1106)
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/* vendor step 3 */
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regmap_update_bits(rv1106->regmap, ACODEC_ADC_ANA_CTL0,
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ACODEC_ADC_CUR_SRC_MSK,
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ACODEC_ADC_CUR_SRC_EN);
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ACODEC_ADC_IBIAS_MSK,
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ACODEC_ADC_IBIAS_EN);
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/* vendor step 4*/
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regmap_update_bits(rv1106->regmap, ACODEC_ADC_ANA_CTL1,
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@@ -1395,6 +1388,8 @@ static int rv1106_codec_adc_enable(struct rv1106_codec_priv *rv1106)
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R(lr, ACODEC_ADC_R_REF_VOL_BUF_MSK),
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L(lr, ACODEC_ADC_L_REF_VOL_BUF_EN) |
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R(lr, ACODEC_ADC_R_REF_VOL_BUF_EN));
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/* waiting VREF be stable */
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msleep(100);
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/* vendor step 5 */
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regmap_update_bits(rv1106->regmap, ACODEC_ADC_ANA_CTL3,
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@@ -1511,8 +1506,8 @@ static int rv1106_codec_adc_disable(struct rv1106_codec_priv *rv1106)
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/* vendor step 7 */
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regmap_update_bits(rv1106->regmap, ACODEC_ADC_ANA_CTL0,
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ACODEC_ADC_CUR_SRC_MSK,
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ACODEC_ADC_CUR_SRC_DIS);
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ACODEC_ADC_IBIAS_MSK,
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ACODEC_ADC_IBIAS_DIS);
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/* vendor step 8 */
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regmap_update_bits(rv1106->regmap, ACODEC_ADC_ANA_CTL6,
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@@ -265,9 +265,9 @@
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#define ACODEC_ADC_REF_VOL_MSK (0x1 << 5)
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#define ACODEC_ADC_REF_VOL_EN (0x1 << 5)
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#define ACODEC_ADC_REF_VOL_DIS (0x0 << 5)
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#define ACODEC_ADC_CUR_SRC_MSK (0x1 << 4)
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#define ACODEC_ADC_CUR_SRC_EN (0x1 << 4)
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#define ACODEC_ADC_CUR_SRC_DIS (0x0 << 4)
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#define ACODEC_ADC_IBIAS_MSK (0x1 << 4)
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#define ACODEC_ADC_IBIAS_EN (0x1 << 4)
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#define ACODEC_ADC_IBIAS_DIS (0x0 << 4)
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#define ACODEC_MICBIAS_SFT 3
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#define ACODEC_MICBIAS_MSK (0x1 << 3)
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#define ACODEC_MICBIAS_WORK (0x1 << 3)
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