mirror of
https://github.com/hardkernel/linux.git
synced 2026-04-01 02:33:01 +09:00
Merge 5.15.10 into android13-5.15
Changes in 5.15.10 nfc: fix segfault in nfc_genl_dump_devices_done hwmon: (corsair-psu) fix plain integer used as NULL pointer RDMA: Fix use-after-free in rxe_queue_cleanup RDMA/mlx5: Fix releasing unallocated memory in dereg MR flow mtd: rawnand: Fix nand_erase_op delay mtd: rawnand: Fix nand_choose_best_timings() on unsupported interface inet: use #ifdef CONFIG_SOCK_RX_QUEUE_MAPPING consistently dt-bindings: media: nxp,imx7-mipi-csi2: Drop bad if/then schema clk: qcom: sm6125-gcc: Swap ops of ice and apps on sdcc1 perf bpf_skel: Do not use typedef to avoid error on old clang netfs: Fix lockdep warning from taking sb_writers whilst holding mmap_lock RDMA/irdma: Fix a user-after-free in add_pble_prm RDMA/irdma: Fix a potential memory allocation issue in 'irdma_prm_add_pble_mem()' RDMA/irdma: Report correct WC errors RDMA/irdma: Don't arm the CQ more than two times if no CE for this CQ ice: fix FDIR init missing when reset VF vmxnet3: fix minimum vectors alloc issue i2c: virtio: fix completion handling drm/msm: Fix null ptr access msm_ioctl_gem_submit() drm/msm/a6xx: Fix uinitialized use of gpu_scid drm/msm/dsi: set default num_data_lanes drm/msm/dp: Avoid unpowered AUX xfers that caused crashes KVM: arm64: Save PSTATE early on exit s390/test_unwind: use raw opcode instead of invalid instruction Revert "tty: serial: fsl_lpuart: drop earlycon entry for i.MX8QXP" net/mlx4_en: Update reported link modes for 1/10G loop: Use pr_warn_once() for loop_control_remove() warning ALSA: hda: Add Intel DG2 PCI ID and HDMI codec vid ALSA: hda/hdmi: fix HDA codec entry table order for ADL-P parisc/agp: Annotate parisc agp init functions with __init i2c: rk3x: Handle a spurious start completion interrupt flag net: netlink: af_netlink: Prevent empty skb by adding a check on len. drm/amdgpu: cancel the correct hrtimer on exit drm/amdgpu: check atomic flag to differeniate with legacy path drm/amd/display: Fix for the no Audio bug with Tiled Displays drm/amdkfd: fix double free mem structure drm/amd/display: add connector type check for CRC source set drm/amdkfd: process_info lock not needed for svm tracing: Fix a kmemleak false positive in tracing_map staging: most: dim2: use device release method fuse: make sure reclaim doesn't write the inode perf inject: Fix itrace space allowed for new attributes Linux 5.15.10 Signed-off-by: Greg Kroah-Hartman <gregkh@google.com> Change-Id: I611aba3cbaa414f3dc6e3922245e140c36cbcb14
This commit is contained in:
@@ -79,6 +79,8 @@ properties:
|
||||
|
||||
properties:
|
||||
data-lanes:
|
||||
description:
|
||||
Note that 'fsl,imx7-mipi-csi2' only supports up to 2 data lines.
|
||||
items:
|
||||
minItems: 1
|
||||
maxItems: 4
|
||||
@@ -91,18 +93,6 @@ properties:
|
||||
required:
|
||||
- data-lanes
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||||
|
||||
allOf:
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||||
- if:
|
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properties:
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compatible:
|
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contains:
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const: fsl,imx7-mipi-csi2
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then:
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properties:
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data-lanes:
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items:
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maxItems: 2
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port@1:
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$ref: /schemas/graph.yaml#/properties/port
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description:
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2
Makefile
2
Makefile
@@ -1,7 +1,7 @@
|
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# SPDX-License-Identifier: GPL-2.0
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VERSION = 5
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PATCHLEVEL = 15
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SUBLEVEL = 9
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SUBLEVEL = 10
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||||
EXTRAVERSION =
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NAME = Trick or Treat
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|
||||
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@@ -171,10 +171,11 @@ static noinline int unwindme_func4(struct unwindme *u)
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}
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/*
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* trigger specification exception
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* Trigger operation exception; use insn notation to bypass
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* llvm's integrated assembler sanity checks.
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*/
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asm volatile(
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" mvcl %%r1,%%r1\n"
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" .insn e,0x0000\n" /* illegal opcode */
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"0: nopr %%r7\n"
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EX_TABLE(0b, 0b)
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:);
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@@ -2429,7 +2429,7 @@ static int loop_control_remove(int idx)
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int ret;
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if (idx < 0) {
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pr_warn("deleting an unspecified loop device is not supported.\n");
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pr_warn_once("deleting an unspecified loop device is not supported.\n");
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return -EINVAL;
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}
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@@ -281,7 +281,7 @@ agp_ioc_init(void __iomem *ioc_regs)
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return 0;
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}
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static int
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static int __init
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lba_find_capability(int cap)
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{
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struct _parisc_agp_info *info = &parisc_agp_info;
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@@ -366,7 +366,7 @@ fail:
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return error;
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}
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static int
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static int __init
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find_quicksilver(struct device *dev, void *data)
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{
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struct parisc_device **lba = data;
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@@ -378,7 +378,7 @@ find_quicksilver(struct device *dev, void *data)
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return 0;
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}
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static int
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static int __init
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parisc_agp_init(void)
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{
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extern struct sba_device *sba_list;
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@@ -1121,7 +1121,7 @@ static struct clk_rcg2 gcc_sdcc1_apps_clk_src = {
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.name = "gcc_sdcc1_apps_clk_src",
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.parent_data = gcc_parent_data_1,
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.num_parents = ARRAY_SIZE(gcc_parent_data_1),
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.ops = &clk_rcg2_ops,
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.ops = &clk_rcg2_floor_ops,
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},
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};
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@@ -1143,7 +1143,7 @@ static struct clk_rcg2 gcc_sdcc1_ice_core_clk_src = {
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.name = "gcc_sdcc1_ice_core_clk_src",
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.parent_data = gcc_parent_data_0,
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.num_parents = ARRAY_SIZE(gcc_parent_data_0),
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.ops = &clk_rcg2_floor_ops,
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.ops = &clk_rcg2_ops,
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},
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};
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@@ -1393,7 +1393,7 @@ int amdgpu_amdkfd_gpuvm_alloc_memory_of_gpu(
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struct sg_table *sg = NULL;
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uint64_t user_addr = 0;
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struct amdgpu_bo *bo;
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struct drm_gem_object *gobj;
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struct drm_gem_object *gobj = NULL;
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u32 domain, alloc_domain;
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u64 alloc_flags;
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int ret;
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@@ -1503,14 +1503,16 @@ allocate_init_user_pages_failed:
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remove_kgd_mem_from_kfd_bo_list(*mem, avm->process_info);
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drm_vma_node_revoke(&gobj->vma_node, drm_priv);
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err_node_allow:
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drm_gem_object_put(gobj);
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/* Don't unreserve system mem limit twice */
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goto err_reserve_limit;
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err_bo_create:
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unreserve_mem_limit(adev, size, alloc_domain, !!sg);
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err_reserve_limit:
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mutex_destroy(&(*mem)->lock);
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kfree(*mem);
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if (gobj)
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drm_gem_object_put(gobj);
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else
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kfree(*mem);
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err:
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if (sg) {
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sg_free_table(sg);
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@@ -3854,7 +3854,7 @@ void amdgpu_device_fini_hw(struct amdgpu_device *adev)
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/* disable all interrupts */
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amdgpu_irq_disable_all(adev);
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if (adev->mode_info.mode_config_initialized){
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if (!amdgpu_device_has_dc_support(adev))
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if (!drm_drv_uses_atomic_modeset(adev_to_drm(adev)))
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drm_helper_force_disable_all(adev_to_drm(adev));
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else
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drm_atomic_helper_shutdown(adev_to_drm(adev));
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@@ -5130,7 +5130,7 @@ skip_hw_reset:
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drm_sched_start(&ring->sched, !tmp_adev->asic_reset_res);
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}
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if (!amdgpu_device_has_dc_support(tmp_adev) && !job_signaled) {
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if (!drm_drv_uses_atomic_modeset(adev_to_drm(tmp_adev)) && !job_signaled) {
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drm_helper_resume_force_mode(adev_to_drm(tmp_adev));
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}
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@@ -504,8 +504,8 @@ static int amdgpu_vkms_sw_fini(void *handle)
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int i = 0;
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for (i = 0; i < adev->mode_info.num_crtc; i++)
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if (adev->mode_info.crtcs[i])
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hrtimer_cancel(&adev->mode_info.crtcs[i]->vblank_timer);
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if (adev->amdgpu_vkms_output[i].vblank_hrtimer.function)
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hrtimer_cancel(&adev->amdgpu_vkms_output[i].vblank_hrtimer);
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kfree(adev->mode_info.bios_hardcoded_edid);
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kfree(adev->amdgpu_vkms_output);
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@@ -1565,7 +1565,6 @@ retry_flush_work:
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static void svm_range_restore_work(struct work_struct *work)
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{
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struct delayed_work *dwork = to_delayed_work(work);
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struct amdkfd_process_info *process_info;
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struct svm_range_list *svms;
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struct svm_range *prange;
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struct kfd_process *p;
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@@ -1585,12 +1584,10 @@ static void svm_range_restore_work(struct work_struct *work)
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* the lifetime of this thread, kfd_process and mm will be valid.
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*/
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p = container_of(svms, struct kfd_process, svms);
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process_info = p->kgd_process_info;
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mm = p->mm;
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if (!mm)
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return;
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mutex_lock(&process_info->lock);
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svm_range_list_lock_and_flush_work(svms, mm);
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mutex_lock(&svms->lock);
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@@ -1643,7 +1640,6 @@ static void svm_range_restore_work(struct work_struct *work)
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out_reschedule:
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mutex_unlock(&svms->lock);
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mmap_write_unlock(mm);
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mutex_unlock(&process_info->lock);
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/* If validation failed, reschedule another attempt */
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if (evicted_ranges) {
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@@ -2974,7 +2970,6 @@ static int
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svm_range_set_attr(struct kfd_process *p, uint64_t start, uint64_t size,
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uint32_t nattr, struct kfd_ioctl_svm_attribute *attrs)
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{
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struct amdkfd_process_info *process_info = p->kgd_process_info;
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struct mm_struct *mm = current->mm;
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struct list_head update_list;
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struct list_head insert_list;
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@@ -2993,8 +2988,6 @@ svm_range_set_attr(struct kfd_process *p, uint64_t start, uint64_t size,
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svms = &p->svms;
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mutex_lock(&process_info->lock);
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svm_range_list_lock_and_flush_work(svms, mm);
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if (!svm_range_is_valid(mm, start, size)) {
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@@ -3070,8 +3063,6 @@ out_unlock_range:
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mutex_unlock(&svms->lock);
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mmap_read_unlock(mm);
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out:
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mutex_unlock(&process_info->lock);
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pr_debug("pasid 0x%x svms 0x%p [0x%llx 0x%llx] done, r=%d\n", p->pasid,
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&p->svms, start, start + size - 1, r);
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@@ -314,6 +314,14 @@ int amdgpu_dm_crtc_set_crc_source(struct drm_crtc *crtc, const char *src_name)
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||||
ret = -EINVAL;
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goto cleanup;
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||||
}
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||||
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||||
if ((aconn->base.connector_type != DRM_MODE_CONNECTOR_DisplayPort) &&
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(aconn->base.connector_type != DRM_MODE_CONNECTOR_eDP)) {
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||||
DRM_DEBUG_DRIVER("No DP connector available for CRC source\n");
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ret = -EINVAL;
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goto cleanup;
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}
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}
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#if defined(CONFIG_DRM_AMD_SECURE_DISPLAY)
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@@ -1623,6 +1623,10 @@ bool dc_is_stream_unchanged(
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if (old_stream->ignore_msa_timing_param != stream->ignore_msa_timing_param)
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return false;
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// Only Have Audio left to check whether it is same or not. This is a corner case for Tiled sinks
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if (old_stream->audio_info.mode_count != stream->audio_info.mode_count)
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return false;
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return true;
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}
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||||
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||||
@@ -1424,17 +1424,24 @@ static void a6xx_llc_activate(struct a6xx_gpu *a6xx_gpu)
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||||
{
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struct adreno_gpu *adreno_gpu = &a6xx_gpu->base;
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||||
struct msm_gpu *gpu = &adreno_gpu->base;
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||||
u32 gpu_scid, cntl1_regval = 0;
|
||||
u32 cntl1_regval = 0;
|
||||
|
||||
if (IS_ERR(a6xx_gpu->llc_mmio))
|
||||
return;
|
||||
|
||||
if (!llcc_slice_activate(a6xx_gpu->llc_slice)) {
|
||||
gpu_scid = llcc_get_slice_id(a6xx_gpu->llc_slice);
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||||
u32 gpu_scid = llcc_get_slice_id(a6xx_gpu->llc_slice);
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||||
|
||||
gpu_scid &= 0x1f;
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||||
cntl1_regval = (gpu_scid << 0) | (gpu_scid << 5) | (gpu_scid << 10) |
|
||||
(gpu_scid << 15) | (gpu_scid << 20);
|
||||
|
||||
/* On A660, the SCID programming for UCHE traffic is done in
|
||||
* A6XX_GBIF_SCACHE_CNTL0[14:10]
|
||||
*/
|
||||
if (adreno_is_a660_family(adreno_gpu))
|
||||
gpu_rmw(gpu, REG_A6XX_GBIF_SCACHE_CNTL0, (0x1f << 10) |
|
||||
(1 << 8), (gpu_scid << 10) | (1 << 8));
|
||||
}
|
||||
|
||||
/*
|
||||
@@ -1471,13 +1478,6 @@ static void a6xx_llc_activate(struct a6xx_gpu *a6xx_gpu)
|
||||
}
|
||||
|
||||
gpu_rmw(gpu, REG_A6XX_GBIF_SCACHE_CNTL1, GENMASK(24, 0), cntl1_regval);
|
||||
|
||||
/* On A660, the SCID programming for UCHE traffic is done in
|
||||
* A6XX_GBIF_SCACHE_CNTL0[14:10]
|
||||
*/
|
||||
if (adreno_is_a660_family(adreno_gpu))
|
||||
gpu_rmw(gpu, REG_A6XX_GBIF_SCACHE_CNTL0, (0x1f << 10) |
|
||||
(1 << 8), (gpu_scid << 10) | (1 << 8));
|
||||
}
|
||||
|
||||
static void a6xx_llc_slices_destroy(struct a6xx_gpu *a6xx_gpu)
|
||||
|
||||
@@ -33,6 +33,7 @@ struct dp_aux_private {
|
||||
bool read;
|
||||
bool no_send_addr;
|
||||
bool no_send_stop;
|
||||
bool initted;
|
||||
u32 offset;
|
||||
u32 segment;
|
||||
|
||||
@@ -331,6 +332,10 @@ static ssize_t dp_aux_transfer(struct drm_dp_aux *dp_aux,
|
||||
}
|
||||
|
||||
mutex_lock(&aux->mutex);
|
||||
if (!aux->initted) {
|
||||
ret = -EIO;
|
||||
goto exit;
|
||||
}
|
||||
|
||||
dp_aux_update_offset_and_segment(aux, msg);
|
||||
dp_aux_transfer_helper(aux, msg, true);
|
||||
@@ -380,6 +385,8 @@ static ssize_t dp_aux_transfer(struct drm_dp_aux *dp_aux,
|
||||
}
|
||||
|
||||
aux->cmd_busy = false;
|
||||
|
||||
exit:
|
||||
mutex_unlock(&aux->mutex);
|
||||
|
||||
return ret;
|
||||
@@ -431,8 +438,13 @@ void dp_aux_init(struct drm_dp_aux *dp_aux)
|
||||
|
||||
aux = container_of(dp_aux, struct dp_aux_private, dp_aux);
|
||||
|
||||
mutex_lock(&aux->mutex);
|
||||
|
||||
dp_catalog_aux_enable(aux->catalog, true);
|
||||
aux->retry_cnt = 0;
|
||||
aux->initted = true;
|
||||
|
||||
mutex_unlock(&aux->mutex);
|
||||
}
|
||||
|
||||
void dp_aux_deinit(struct drm_dp_aux *dp_aux)
|
||||
@@ -441,7 +453,12 @@ void dp_aux_deinit(struct drm_dp_aux *dp_aux)
|
||||
|
||||
aux = container_of(dp_aux, struct dp_aux_private, dp_aux);
|
||||
|
||||
mutex_lock(&aux->mutex);
|
||||
|
||||
aux->initted = false;
|
||||
dp_catalog_aux_enable(aux->catalog, false);
|
||||
|
||||
mutex_unlock(&aux->mutex);
|
||||
}
|
||||
|
||||
int dp_aux_register(struct drm_dp_aux *dp_aux)
|
||||
|
||||
@@ -1696,6 +1696,8 @@ static int dsi_host_parse_lane_data(struct msm_dsi_host *msm_host,
|
||||
if (!prop) {
|
||||
DRM_DEV_DEBUG(dev,
|
||||
"failed to find data lane mapping, using default\n");
|
||||
/* Set the number of date lanes to 4 by default. */
|
||||
msm_host->num_data_lanes = 4;
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
||||
@@ -780,6 +780,7 @@ int msm_ioctl_gem_submit(struct drm_device *dev, void *data,
|
||||
args->nr_cmds);
|
||||
if (IS_ERR(submit)) {
|
||||
ret = PTR_ERR(submit);
|
||||
submit = NULL;
|
||||
goto out_unlock;
|
||||
}
|
||||
|
||||
|
||||
@@ -729,7 +729,7 @@ static int corsairpsu_probe(struct hid_device *hdev, const struct hid_device_id
|
||||
corsairpsu_check_cmd_support(priv);
|
||||
|
||||
priv->hwmon_dev = hwmon_device_register_with_info(&hdev->dev, "corsairpsu", priv,
|
||||
&corsairpsu_chip_info, 0);
|
||||
&corsairpsu_chip_info, NULL);
|
||||
|
||||
if (IS_ERR(priv->hwmon_dev)) {
|
||||
ret = PTR_ERR(priv->hwmon_dev);
|
||||
|
||||
@@ -423,8 +423,8 @@ static void rk3x_i2c_handle_read(struct rk3x_i2c *i2c, unsigned int ipd)
|
||||
if (!(ipd & REG_INT_MBRF))
|
||||
return;
|
||||
|
||||
/* ack interrupt */
|
||||
i2c_writel(i2c, REG_INT_MBRF, REG_IPD);
|
||||
/* ack interrupt (read also produces a spurious START flag, clear it too) */
|
||||
i2c_writel(i2c, REG_INT_MBRF | REG_INT_START, REG_IPD);
|
||||
|
||||
/* Can only handle a maximum of 32 bytes at a time */
|
||||
if (len > 32)
|
||||
|
||||
@@ -22,24 +22,24 @@
|
||||
/**
|
||||
* struct virtio_i2c - virtio I2C data
|
||||
* @vdev: virtio device for this controller
|
||||
* @completion: completion of virtio I2C message
|
||||
* @adap: I2C adapter for this controller
|
||||
* @vq: the virtio virtqueue for communication
|
||||
*/
|
||||
struct virtio_i2c {
|
||||
struct virtio_device *vdev;
|
||||
struct completion completion;
|
||||
struct i2c_adapter adap;
|
||||
struct virtqueue *vq;
|
||||
};
|
||||
|
||||
/**
|
||||
* struct virtio_i2c_req - the virtio I2C request structure
|
||||
* @completion: completion of virtio I2C message
|
||||
* @out_hdr: the OUT header of the virtio I2C message
|
||||
* @buf: the buffer into which data is read, or from which it's written
|
||||
* @in_hdr: the IN header of the virtio I2C message
|
||||
*/
|
||||
struct virtio_i2c_req {
|
||||
struct completion completion;
|
||||
struct virtio_i2c_out_hdr out_hdr ____cacheline_aligned;
|
||||
uint8_t *buf ____cacheline_aligned;
|
||||
struct virtio_i2c_in_hdr in_hdr ____cacheline_aligned;
|
||||
@@ -47,9 +47,11 @@ struct virtio_i2c_req {
|
||||
|
||||
static void virtio_i2c_msg_done(struct virtqueue *vq)
|
||||
{
|
||||
struct virtio_i2c *vi = vq->vdev->priv;
|
||||
struct virtio_i2c_req *req;
|
||||
unsigned int len;
|
||||
|
||||
complete(&vi->completion);
|
||||
while ((req = virtqueue_get_buf(vq, &len)))
|
||||
complete(&req->completion);
|
||||
}
|
||||
|
||||
static int virtio_i2c_prepare_reqs(struct virtqueue *vq,
|
||||
@@ -62,6 +64,8 @@ static int virtio_i2c_prepare_reqs(struct virtqueue *vq,
|
||||
for (i = 0; i < num; i++) {
|
||||
int outcnt = 0, incnt = 0;
|
||||
|
||||
init_completion(&reqs[i].completion);
|
||||
|
||||
/*
|
||||
* We don't support 0 length messages and so filter out
|
||||
* 0 length transfers by using i2c_adapter_quirks.
|
||||
@@ -108,21 +112,15 @@ static int virtio_i2c_complete_reqs(struct virtqueue *vq,
|
||||
struct virtio_i2c_req *reqs,
|
||||
struct i2c_msg *msgs, int num)
|
||||
{
|
||||
struct virtio_i2c_req *req;
|
||||
bool failed = false;
|
||||
unsigned int len;
|
||||
int i, j = 0;
|
||||
|
||||
for (i = 0; i < num; i++) {
|
||||
/* Detach the ith request from the vq */
|
||||
req = virtqueue_get_buf(vq, &len);
|
||||
struct virtio_i2c_req *req = &reqs[i];
|
||||
|
||||
/*
|
||||
* Condition req == &reqs[i] should always meet since we have
|
||||
* total num requests in the vq. reqs[i] can never be NULL here.
|
||||
*/
|
||||
if (!failed && (WARN_ON(req != &reqs[i]) ||
|
||||
req->in_hdr.status != VIRTIO_I2C_MSG_OK))
|
||||
wait_for_completion(&req->completion);
|
||||
|
||||
if (!failed && req->in_hdr.status != VIRTIO_I2C_MSG_OK)
|
||||
failed = true;
|
||||
|
||||
i2c_put_dma_safe_msg_buf(reqs[i].buf, &msgs[i], !failed);
|
||||
@@ -158,12 +156,8 @@ static int virtio_i2c_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs,
|
||||
* remote here to clear the virtqueue, so we can try another set of
|
||||
* messages later on.
|
||||
*/
|
||||
|
||||
reinit_completion(&vi->completion);
|
||||
virtqueue_kick(vq);
|
||||
|
||||
wait_for_completion(&vi->completion);
|
||||
|
||||
count = virtio_i2c_complete_reqs(vq, reqs, msgs, count);
|
||||
|
||||
err_free:
|
||||
@@ -211,8 +205,6 @@ static int virtio_i2c_probe(struct virtio_device *vdev)
|
||||
vdev->priv = vi;
|
||||
vi->vdev = vdev;
|
||||
|
||||
init_completion(&vi->completion);
|
||||
|
||||
ret = virtio_i2c_setup_vqs(vi);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
@@ -60,6 +60,8 @@ static void irdma_iwarp_ce_handler(struct irdma_sc_cq *iwcq)
|
||||
{
|
||||
struct irdma_cq *cq = iwcq->back_cq;
|
||||
|
||||
if (!cq->user_mode)
|
||||
cq->armed = false;
|
||||
if (cq->ibcq.comp_handler)
|
||||
cq->ibcq.comp_handler(&cq->ibcq, cq->ibcq.cq_context);
|
||||
}
|
||||
@@ -146,6 +148,7 @@ static void irdma_set_flush_fields(struct irdma_sc_qp *qp,
|
||||
qp->flush_code = FLUSH_PROT_ERR;
|
||||
break;
|
||||
case IRDMA_AE_AMP_BAD_QP:
|
||||
case IRDMA_AE_WQE_UNEXPECTED_OPCODE:
|
||||
qp->flush_code = FLUSH_LOC_QP_OP_ERR;
|
||||
break;
|
||||
case IRDMA_AE_AMP_BAD_STAG_KEY:
|
||||
@@ -156,7 +159,6 @@ static void irdma_set_flush_fields(struct irdma_sc_qp *qp,
|
||||
case IRDMA_AE_PRIV_OPERATION_DENIED:
|
||||
case IRDMA_AE_IB_INVALID_REQUEST:
|
||||
case IRDMA_AE_IB_REMOTE_ACCESS_ERROR:
|
||||
case IRDMA_AE_IB_REMOTE_OP_ERROR:
|
||||
qp->flush_code = FLUSH_REM_ACCESS_ERR;
|
||||
qp->event_type = IRDMA_QP_EVENT_ACCESS_ERR;
|
||||
break;
|
||||
@@ -184,6 +186,9 @@ static void irdma_set_flush_fields(struct irdma_sc_qp *qp,
|
||||
case IRDMA_AE_AMP_MWBIND_INVALID_BOUNDS:
|
||||
qp->flush_code = FLUSH_MW_BIND_ERR;
|
||||
break;
|
||||
case IRDMA_AE_IB_REMOTE_OP_ERROR:
|
||||
qp->flush_code = FLUSH_REM_OP_ERR;
|
||||
break;
|
||||
default:
|
||||
qp->flush_code = FLUSH_FATAL_ERR;
|
||||
break;
|
||||
|
||||
@@ -541,6 +541,7 @@ int irdma_ah_cqp_op(struct irdma_pci_f *rf, struct irdma_sc_ah *sc_ah, u8 cmd,
|
||||
void (*callback_fcn)(struct irdma_cqp_request *cqp_request),
|
||||
void *cb_param);
|
||||
void irdma_gsi_ud_qp_ah_cb(struct irdma_cqp_request *cqp_request);
|
||||
bool irdma_cq_empty(struct irdma_cq *iwcq);
|
||||
int irdma_inetaddr_event(struct notifier_block *notifier, unsigned long event,
|
||||
void *ptr);
|
||||
int irdma_inet6addr_event(struct notifier_block *notifier, unsigned long event,
|
||||
|
||||
@@ -25,8 +25,7 @@ void irdma_destroy_pble_prm(struct irdma_hmc_pble_rsrc *pble_rsrc)
|
||||
list_del(&chunk->list);
|
||||
if (chunk->type == PBLE_SD_PAGED)
|
||||
irdma_pble_free_paged_mem(chunk);
|
||||
if (chunk->bitmapbuf)
|
||||
kfree(chunk->bitmapmem.va);
|
||||
bitmap_free(chunk->bitmapbuf);
|
||||
kfree(chunk->chunkmem.va);
|
||||
}
|
||||
}
|
||||
@@ -283,7 +282,6 @@ add_pble_prm(struct irdma_hmc_pble_rsrc *pble_rsrc)
|
||||
"PBLE: next_fpm_addr = %llx chunk_size[%llu] = 0x%llx\n",
|
||||
pble_rsrc->next_fpm_addr, chunk->size, chunk->size);
|
||||
pble_rsrc->unallocated_pble -= (u32)(chunk->size >> 3);
|
||||
list_add(&chunk->list, &pble_rsrc->pinfo.clist);
|
||||
sd_reg_val = (sd_entry_type == IRDMA_SD_TYPE_PAGED) ?
|
||||
sd_entry->u.pd_table.pd_page_addr.pa :
|
||||
sd_entry->u.bp.addr.pa;
|
||||
@@ -295,12 +293,12 @@ add_pble_prm(struct irdma_hmc_pble_rsrc *pble_rsrc)
|
||||
goto error;
|
||||
}
|
||||
|
||||
list_add(&chunk->list, &pble_rsrc->pinfo.clist);
|
||||
sd_entry->valid = true;
|
||||
return 0;
|
||||
|
||||
error:
|
||||
if (chunk->bitmapbuf)
|
||||
kfree(chunk->bitmapmem.va);
|
||||
bitmap_free(chunk->bitmapbuf);
|
||||
kfree(chunk->chunkmem.va);
|
||||
|
||||
return ret_code;
|
||||
|
||||
@@ -78,7 +78,6 @@ struct irdma_chunk {
|
||||
u32 pg_cnt;
|
||||
enum irdma_alloc_type type;
|
||||
struct irdma_sc_dev *dev;
|
||||
struct irdma_virt_mem bitmapmem;
|
||||
struct irdma_virt_mem chunkmem;
|
||||
};
|
||||
|
||||
|
||||
@@ -2284,15 +2284,10 @@ enum irdma_status_code irdma_prm_add_pble_mem(struct irdma_pble_prm *pprm,
|
||||
|
||||
sizeofbitmap = (u64)pchunk->size >> pprm->pble_shift;
|
||||
|
||||
pchunk->bitmapmem.size = sizeofbitmap >> 3;
|
||||
pchunk->bitmapmem.va = kzalloc(pchunk->bitmapmem.size, GFP_KERNEL);
|
||||
|
||||
if (!pchunk->bitmapmem.va)
|
||||
pchunk->bitmapbuf = bitmap_zalloc(sizeofbitmap, GFP_KERNEL);
|
||||
if (!pchunk->bitmapbuf)
|
||||
return IRDMA_ERR_NO_MEMORY;
|
||||
|
||||
pchunk->bitmapbuf = pchunk->bitmapmem.va;
|
||||
bitmap_zero(pchunk->bitmapbuf, sizeofbitmap);
|
||||
|
||||
pchunk->sizeofbitmap = sizeofbitmap;
|
||||
/* each pble is 8 bytes hence shift by 3 */
|
||||
pprm->total_pble_alloc += pchunk->size >> 3;
|
||||
@@ -2536,3 +2531,18 @@ void irdma_ib_qp_event(struct irdma_qp *iwqp, enum irdma_qp_event_type event)
|
||||
ibevent.element.qp = &iwqp->ibqp;
|
||||
iwqp->ibqp.event_handler(&ibevent, iwqp->ibqp.qp_context);
|
||||
}
|
||||
|
||||
bool irdma_cq_empty(struct irdma_cq *iwcq)
|
||||
{
|
||||
struct irdma_cq_uk *ukcq;
|
||||
u64 qword3;
|
||||
__le64 *cqe;
|
||||
u8 polarity;
|
||||
|
||||
ukcq = &iwcq->sc_cq.cq_uk;
|
||||
cqe = IRDMA_GET_CURRENT_CQ_ELEM(ukcq);
|
||||
get_64bit_val(cqe, 24, &qword3);
|
||||
polarity = (u8)FIELD_GET(IRDMA_CQ_VALID, qword3);
|
||||
|
||||
return polarity != ukcq->polarity;
|
||||
}
|
||||
|
||||
@@ -3604,18 +3604,31 @@ static int irdma_req_notify_cq(struct ib_cq *ibcq,
|
||||
struct irdma_cq *iwcq;
|
||||
struct irdma_cq_uk *ukcq;
|
||||
unsigned long flags;
|
||||
enum irdma_cmpl_notify cq_notify = IRDMA_CQ_COMPL_EVENT;
|
||||
enum irdma_cmpl_notify cq_notify;
|
||||
bool promo_event = false;
|
||||
int ret = 0;
|
||||
|
||||
cq_notify = notify_flags == IB_CQ_SOLICITED ?
|
||||
IRDMA_CQ_COMPL_SOLICITED : IRDMA_CQ_COMPL_EVENT;
|
||||
iwcq = to_iwcq(ibcq);
|
||||
ukcq = &iwcq->sc_cq.cq_uk;
|
||||
if (notify_flags == IB_CQ_SOLICITED)
|
||||
cq_notify = IRDMA_CQ_COMPL_SOLICITED;
|
||||
|
||||
spin_lock_irqsave(&iwcq->lock, flags);
|
||||
irdma_uk_cq_request_notification(ukcq, cq_notify);
|
||||
/* Only promote to arm the CQ for any event if the last arm event was solicited. */
|
||||
if (iwcq->last_notify == IRDMA_CQ_COMPL_SOLICITED && notify_flags != IB_CQ_SOLICITED)
|
||||
promo_event = true;
|
||||
|
||||
if (!iwcq->armed || promo_event) {
|
||||
iwcq->armed = true;
|
||||
iwcq->last_notify = cq_notify;
|
||||
irdma_uk_cq_request_notification(ukcq, cq_notify);
|
||||
}
|
||||
|
||||
if ((notify_flags & IB_CQ_REPORT_MISSED_EVENTS) && !irdma_cq_empty(iwcq))
|
||||
ret = 1;
|
||||
spin_unlock_irqrestore(&iwcq->lock, flags);
|
||||
|
||||
return 0;
|
||||
return ret;
|
||||
}
|
||||
|
||||
static int irdma_roce_port_immutable(struct ib_device *ibdev, u32 port_num,
|
||||
|
||||
@@ -110,6 +110,8 @@ struct irdma_cq {
|
||||
u16 cq_size;
|
||||
u16 cq_num;
|
||||
bool user_mode;
|
||||
bool armed;
|
||||
enum irdma_cmpl_notify last_notify;
|
||||
u32 polled_cmpls;
|
||||
u32 cq_mem_size;
|
||||
struct irdma_dma_mem kmem;
|
||||
|
||||
@@ -641,7 +641,6 @@ struct mlx5_ib_mr {
|
||||
|
||||
/* User MR data */
|
||||
struct mlx5_cache_ent *cache_ent;
|
||||
struct ib_umem *umem;
|
||||
|
||||
/* This is zero'd when the MR is allocated */
|
||||
union {
|
||||
@@ -653,7 +652,7 @@ struct mlx5_ib_mr {
|
||||
struct list_head list;
|
||||
};
|
||||
|
||||
/* Used only by kernel MRs (umem == NULL) */
|
||||
/* Used only by kernel MRs */
|
||||
struct {
|
||||
void *descs;
|
||||
void *descs_alloc;
|
||||
@@ -675,8 +674,9 @@ struct mlx5_ib_mr {
|
||||
int data_length;
|
||||
};
|
||||
|
||||
/* Used only by User MRs (umem != NULL) */
|
||||
/* Used only by User MRs */
|
||||
struct {
|
||||
struct ib_umem *umem;
|
||||
unsigned int page_shift;
|
||||
/* Current access_flags */
|
||||
int access_flags;
|
||||
|
||||
@@ -1911,19 +1911,18 @@ err:
|
||||
return ret;
|
||||
}
|
||||
|
||||
static void
|
||||
mlx5_free_priv_descs(struct mlx5_ib_mr *mr)
|
||||
static void mlx5_free_priv_descs(struct mlx5_ib_mr *mr)
|
||||
{
|
||||
if (!mr->umem && mr->descs) {
|
||||
struct ib_device *device = mr->ibmr.device;
|
||||
int size = mr->max_descs * mr->desc_size;
|
||||
struct mlx5_ib_dev *dev = to_mdev(device);
|
||||
struct mlx5_ib_dev *dev = to_mdev(mr->ibmr.device);
|
||||
int size = mr->max_descs * mr->desc_size;
|
||||
|
||||
dma_unmap_single(&dev->mdev->pdev->dev, mr->desc_map, size,
|
||||
DMA_TO_DEVICE);
|
||||
kfree(mr->descs_alloc);
|
||||
mr->descs = NULL;
|
||||
}
|
||||
if (!mr->descs)
|
||||
return;
|
||||
|
||||
dma_unmap_single(&dev->mdev->pdev->dev, mr->desc_map, size,
|
||||
DMA_TO_DEVICE);
|
||||
kfree(mr->descs_alloc);
|
||||
mr->descs = NULL;
|
||||
}
|
||||
|
||||
int mlx5_ib_dereg_mr(struct ib_mr *ibmr, struct ib_udata *udata)
|
||||
@@ -1999,7 +1998,8 @@ int mlx5_ib_dereg_mr(struct ib_mr *ibmr, struct ib_udata *udata)
|
||||
if (mr->cache_ent) {
|
||||
mlx5_mr_cache_free(dev, mr);
|
||||
} else {
|
||||
mlx5_free_priv_descs(mr);
|
||||
if (!udata)
|
||||
mlx5_free_priv_descs(mr);
|
||||
kfree(mr);
|
||||
}
|
||||
return 0;
|
||||
@@ -2086,7 +2086,6 @@ static struct mlx5_ib_mr *mlx5_ib_alloc_pi_mr(struct ib_pd *pd,
|
||||
if (err)
|
||||
goto err_free_in;
|
||||
|
||||
mr->umem = NULL;
|
||||
kfree(in);
|
||||
|
||||
return mr;
|
||||
@@ -2213,7 +2212,6 @@ static struct ib_mr *__mlx5_ib_alloc_mr(struct ib_pd *pd,
|
||||
}
|
||||
|
||||
mr->ibmr.device = pd->device;
|
||||
mr->umem = NULL;
|
||||
|
||||
switch (mr_type) {
|
||||
case IB_MR_TYPE_MEM_REG:
|
||||
|
||||
@@ -367,6 +367,7 @@ int rxe_qp_from_init(struct rxe_dev *rxe, struct rxe_qp *qp, struct rxe_pd *pd,
|
||||
|
||||
err2:
|
||||
rxe_queue_cleanup(qp->sq.queue);
|
||||
qp->sq.queue = NULL;
|
||||
err1:
|
||||
qp->pd = NULL;
|
||||
qp->rcq = NULL;
|
||||
|
||||
@@ -926,7 +926,7 @@ int nand_choose_best_sdr_timings(struct nand_chip *chip,
|
||||
struct nand_sdr_timings *spec_timings)
|
||||
{
|
||||
const struct nand_controller_ops *ops = chip->controller->ops;
|
||||
int best_mode = 0, mode, ret;
|
||||
int best_mode = 0, mode, ret = -EOPNOTSUPP;
|
||||
|
||||
iface->type = NAND_SDR_IFACE;
|
||||
|
||||
@@ -977,7 +977,7 @@ int nand_choose_best_nvddr_timings(struct nand_chip *chip,
|
||||
struct nand_nvddr_timings *spec_timings)
|
||||
{
|
||||
const struct nand_controller_ops *ops = chip->controller->ops;
|
||||
int best_mode = 0, mode, ret;
|
||||
int best_mode = 0, mode, ret = -EOPNOTSUPP;
|
||||
|
||||
iface->type = NAND_NVDDR_IFACE;
|
||||
|
||||
@@ -1837,7 +1837,7 @@ int nand_erase_op(struct nand_chip *chip, unsigned int eraseblock)
|
||||
NAND_OP_CMD(NAND_CMD_ERASE1, 0),
|
||||
NAND_OP_ADDR(2, addrs, 0),
|
||||
NAND_OP_CMD(NAND_CMD_ERASE2,
|
||||
NAND_COMMON_TIMING_MS(conf, tWB_max)),
|
||||
NAND_COMMON_TIMING_NS(conf, tWB_max)),
|
||||
NAND_OP_WAIT_RDY(NAND_COMMON_TIMING_MS(conf, tBERS_max),
|
||||
0),
|
||||
};
|
||||
|
||||
@@ -1569,6 +1569,7 @@ bool ice_reset_all_vfs(struct ice_pf *pf, bool is_vflr)
|
||||
ice_vc_set_default_allowlist(vf);
|
||||
|
||||
ice_vf_fdir_exit(vf);
|
||||
ice_vf_fdir_init(vf);
|
||||
/* clean VF control VSI when resetting VFs since it should be
|
||||
* setup only when VF creates its first FDIR rule.
|
||||
*/
|
||||
@@ -1695,6 +1696,7 @@ bool ice_reset_vf(struct ice_vf *vf, bool is_vflr)
|
||||
}
|
||||
|
||||
ice_vf_fdir_exit(vf);
|
||||
ice_vf_fdir_init(vf);
|
||||
/* clean VF control VSI when resetting VF since it should be setup
|
||||
* only when VF creates its first FDIR rule.
|
||||
*/
|
||||
|
||||
@@ -663,7 +663,7 @@ void __init mlx4_en_init_ptys2ethtool_map(void)
|
||||
MLX4_BUILD_PTYS2ETHTOOL_CONFIG(MLX4_1000BASE_T, SPEED_1000,
|
||||
ETHTOOL_LINK_MODE_1000baseT_Full_BIT);
|
||||
MLX4_BUILD_PTYS2ETHTOOL_CONFIG(MLX4_1000BASE_CX_SGMII, SPEED_1000,
|
||||
ETHTOOL_LINK_MODE_1000baseKX_Full_BIT);
|
||||
ETHTOOL_LINK_MODE_1000baseX_Full_BIT);
|
||||
MLX4_BUILD_PTYS2ETHTOOL_CONFIG(MLX4_1000BASE_KX, SPEED_1000,
|
||||
ETHTOOL_LINK_MODE_1000baseKX_Full_BIT);
|
||||
MLX4_BUILD_PTYS2ETHTOOL_CONFIG(MLX4_10GBASE_T, SPEED_10000,
|
||||
@@ -675,9 +675,9 @@ void __init mlx4_en_init_ptys2ethtool_map(void)
|
||||
MLX4_BUILD_PTYS2ETHTOOL_CONFIG(MLX4_10GBASE_KR, SPEED_10000,
|
||||
ETHTOOL_LINK_MODE_10000baseKR_Full_BIT);
|
||||
MLX4_BUILD_PTYS2ETHTOOL_CONFIG(MLX4_10GBASE_CR, SPEED_10000,
|
||||
ETHTOOL_LINK_MODE_10000baseKR_Full_BIT);
|
||||
ETHTOOL_LINK_MODE_10000baseCR_Full_BIT);
|
||||
MLX4_BUILD_PTYS2ETHTOOL_CONFIG(MLX4_10GBASE_SR, SPEED_10000,
|
||||
ETHTOOL_LINK_MODE_10000baseKR_Full_BIT);
|
||||
ETHTOOL_LINK_MODE_10000baseSR_Full_BIT);
|
||||
MLX4_BUILD_PTYS2ETHTOOL_CONFIG(MLX4_20GBASE_KR2, SPEED_20000,
|
||||
ETHTOOL_LINK_MODE_20000baseMLD2_Full_BIT,
|
||||
ETHTOOL_LINK_MODE_20000baseKR2_Full_BIT);
|
||||
|
||||
@@ -3261,7 +3261,7 @@ vmxnet3_alloc_intr_resources(struct vmxnet3_adapter *adapter)
|
||||
|
||||
#ifdef CONFIG_PCI_MSI
|
||||
if (adapter->intr.type == VMXNET3_IT_MSIX) {
|
||||
int i, nvec;
|
||||
int i, nvec, nvec_allocated;
|
||||
|
||||
nvec = adapter->share_intr == VMXNET3_INTR_TXSHARE ?
|
||||
1 : adapter->num_tx_queues;
|
||||
@@ -3274,14 +3274,15 @@ vmxnet3_alloc_intr_resources(struct vmxnet3_adapter *adapter)
|
||||
for (i = 0; i < nvec; i++)
|
||||
adapter->intr.msix_entries[i].entry = i;
|
||||
|
||||
nvec = vmxnet3_acquire_msix_vectors(adapter, nvec);
|
||||
if (nvec < 0)
|
||||
nvec_allocated = vmxnet3_acquire_msix_vectors(adapter, nvec);
|
||||
if (nvec_allocated < 0)
|
||||
goto msix_err;
|
||||
|
||||
/* If we cannot allocate one MSIx vector per queue
|
||||
* then limit the number of rx queues to 1
|
||||
*/
|
||||
if (nvec == VMXNET3_LINUX_MIN_MSIX_VECT) {
|
||||
if (nvec_allocated == VMXNET3_LINUX_MIN_MSIX_VECT &&
|
||||
nvec != VMXNET3_LINUX_MIN_MSIX_VECT) {
|
||||
if (adapter->share_intr != VMXNET3_INTR_BUDDYSHARE
|
||||
|| adapter->num_rx_queues != 1) {
|
||||
adapter->share_intr = VMXNET3_INTR_TXSHARE;
|
||||
@@ -3291,14 +3292,14 @@ vmxnet3_alloc_intr_resources(struct vmxnet3_adapter *adapter)
|
||||
}
|
||||
}
|
||||
|
||||
adapter->intr.num_intrs = nvec;
|
||||
adapter->intr.num_intrs = nvec_allocated;
|
||||
return;
|
||||
|
||||
msix_err:
|
||||
/* If we cannot allocate MSIx vectors use only one rx queue */
|
||||
dev_info(&adapter->pdev->dev,
|
||||
"Failed to enable MSI-X, error %d. "
|
||||
"Limiting #rx queues to 1, try MSI.\n", nvec);
|
||||
"Limiting #rx queues to 1, try MSI.\n", nvec_allocated);
|
||||
|
||||
adapter->intr.type = VMXNET3_IT_MSI;
|
||||
}
|
||||
|
||||
@@ -726,6 +726,23 @@ static int get_dim2_clk_speed(const char *clock_speed, u8 *val)
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
static void dim2_release(struct device *d)
|
||||
{
|
||||
struct dim2_hdm *dev = container_of(d, struct dim2_hdm, dev);
|
||||
unsigned long flags;
|
||||
|
||||
kthread_stop(dev->netinfo_task);
|
||||
|
||||
spin_lock_irqsave(&dim_lock, flags);
|
||||
dim_shutdown();
|
||||
spin_unlock_irqrestore(&dim_lock, flags);
|
||||
|
||||
if (dev->disable_platform)
|
||||
dev->disable_platform(to_platform_device(d->parent));
|
||||
|
||||
kfree(dev);
|
||||
}
|
||||
|
||||
/*
|
||||
* dim2_probe - dim2 probe handler
|
||||
* @pdev: platform device structure
|
||||
@@ -746,7 +763,7 @@ static int dim2_probe(struct platform_device *pdev)
|
||||
|
||||
enum { MLB_INT_IDX, AHB0_INT_IDX };
|
||||
|
||||
dev = devm_kzalloc(&pdev->dev, sizeof(*dev), GFP_KERNEL);
|
||||
dev = kzalloc(sizeof(*dev), GFP_KERNEL);
|
||||
if (!dev)
|
||||
return -ENOMEM;
|
||||
|
||||
@@ -758,25 +775,27 @@ static int dim2_probe(struct platform_device *pdev)
|
||||
"microchip,clock-speed", &clock_speed);
|
||||
if (ret) {
|
||||
dev_err(&pdev->dev, "missing dt property clock-speed\n");
|
||||
return ret;
|
||||
goto err_free_dev;
|
||||
}
|
||||
|
||||
ret = get_dim2_clk_speed(clock_speed, &dev->clk_speed);
|
||||
if (ret) {
|
||||
dev_err(&pdev->dev, "bad dt property clock-speed\n");
|
||||
return ret;
|
||||
goto err_free_dev;
|
||||
}
|
||||
|
||||
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
|
||||
dev->io_base = devm_ioremap_resource(&pdev->dev, res);
|
||||
if (IS_ERR(dev->io_base))
|
||||
return PTR_ERR(dev->io_base);
|
||||
if (IS_ERR(dev->io_base)) {
|
||||
ret = PTR_ERR(dev->io_base);
|
||||
goto err_free_dev;
|
||||
}
|
||||
|
||||
of_id = of_match_node(dim2_of_match, pdev->dev.of_node);
|
||||
pdata = of_id->data;
|
||||
ret = pdata && pdata->enable ? pdata->enable(pdev) : 0;
|
||||
if (ret)
|
||||
return ret;
|
||||
goto err_free_dev;
|
||||
|
||||
dev->disable_platform = pdata ? pdata->disable : NULL;
|
||||
|
||||
@@ -867,24 +886,19 @@ static int dim2_probe(struct platform_device *pdev)
|
||||
dev->most_iface.request_netinfo = request_netinfo;
|
||||
dev->most_iface.driver_dev = &pdev->dev;
|
||||
dev->most_iface.dev = &dev->dev;
|
||||
dev->dev.init_name = "dim2_state";
|
||||
dev->dev.init_name = dev->name;
|
||||
dev->dev.parent = &pdev->dev;
|
||||
dev->dev.release = dim2_release;
|
||||
|
||||
ret = most_register_interface(&dev->most_iface);
|
||||
if (ret) {
|
||||
dev_err(&pdev->dev, "failed to register MOST interface\n");
|
||||
goto err_stop_thread;
|
||||
}
|
||||
return most_register_interface(&dev->most_iface);
|
||||
|
||||
return 0;
|
||||
|
||||
err_stop_thread:
|
||||
kthread_stop(dev->netinfo_task);
|
||||
err_shutdown_dim:
|
||||
dim_shutdown();
|
||||
err_disable_platform:
|
||||
if (dev->disable_platform)
|
||||
dev->disable_platform(pdev);
|
||||
err_free_dev:
|
||||
kfree(dev);
|
||||
|
||||
return ret;
|
||||
}
|
||||
@@ -898,17 +912,8 @@ err_disable_platform:
|
||||
static int dim2_remove(struct platform_device *pdev)
|
||||
{
|
||||
struct dim2_hdm *dev = platform_get_drvdata(pdev);
|
||||
unsigned long flags;
|
||||
|
||||
most_deregister_interface(&dev->most_iface);
|
||||
kthread_stop(dev->netinfo_task);
|
||||
|
||||
spin_lock_irqsave(&dim_lock, flags);
|
||||
dim_shutdown();
|
||||
spin_unlock_irqrestore(&dim_lock, flags);
|
||||
|
||||
if (dev->disable_platform)
|
||||
dev->disable_platform(pdev);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
@@ -2625,6 +2625,7 @@ OF_EARLYCON_DECLARE(lpuart, "fsl,vf610-lpuart", lpuart_early_console_setup);
|
||||
OF_EARLYCON_DECLARE(lpuart32, "fsl,ls1021a-lpuart", lpuart32_early_console_setup);
|
||||
OF_EARLYCON_DECLARE(lpuart32, "fsl,ls1028a-lpuart", ls1028a_early_console_setup);
|
||||
OF_EARLYCON_DECLARE(lpuart32, "fsl,imx7ulp-lpuart", lpuart32_imx_early_console_setup);
|
||||
OF_EARLYCON_DECLARE(lpuart32, "fsl,imx8qxp-lpuart", lpuart32_imx_early_console_setup);
|
||||
EARLYCON_DECLARE(lpuart, lpuart_early_console_setup);
|
||||
EARLYCON_DECLARE(lpuart32, lpuart32_early_console_setup);
|
||||
|
||||
|
||||
@@ -780,11 +780,19 @@ static int fuse_symlink(struct user_namespace *mnt_userns, struct inode *dir,
|
||||
return create_new_entry(fm, &args, dir, entry, S_IFLNK);
|
||||
}
|
||||
|
||||
void fuse_flush_time_update(struct inode *inode)
|
||||
{
|
||||
int err = sync_inode_metadata(inode, 1);
|
||||
|
||||
mapping_set_error(inode->i_mapping, err);
|
||||
}
|
||||
|
||||
void fuse_update_ctime(struct inode *inode)
|
||||
{
|
||||
if (!IS_NOCMTIME(inode)) {
|
||||
inode->i_ctime = current_time(inode);
|
||||
mark_inode_dirty_sync(inode);
|
||||
fuse_flush_time_update(inode);
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
@@ -1854,6 +1854,17 @@ int fuse_write_inode(struct inode *inode, struct writeback_control *wbc)
|
||||
struct fuse_file *ff;
|
||||
int err;
|
||||
|
||||
/*
|
||||
* Inode is always written before the last reference is dropped and
|
||||
* hence this should not be reached from reclaim.
|
||||
*
|
||||
* Writing back the inode from reclaim can deadlock if the request
|
||||
* processing itself needs an allocation. Allocations triggering
|
||||
* reclaim while serving a request can't be prevented, because it can
|
||||
* involve any number of unrelated userspace processes.
|
||||
*/
|
||||
WARN_ON(wbc->for_reclaim);
|
||||
|
||||
ff = __fuse_write_file_get(fi);
|
||||
err = fuse_flush_times(inode, ff);
|
||||
if (ff)
|
||||
@@ -3011,6 +3022,8 @@ out:
|
||||
if (lock_inode)
|
||||
inode_unlock(inode);
|
||||
|
||||
fuse_flush_time_update(inode);
|
||||
|
||||
return err;
|
||||
}
|
||||
|
||||
@@ -3120,6 +3133,8 @@ out:
|
||||
inode_unlock(inode_out);
|
||||
file_accessed(file_in);
|
||||
|
||||
fuse_flush_time_update(inode_out);
|
||||
|
||||
return err;
|
||||
}
|
||||
|
||||
|
||||
@@ -1172,6 +1172,7 @@ int fuse_allow_current_process(struct fuse_conn *fc);
|
||||
|
||||
u64 fuse_lock_owner_id(struct fuse_conn *fc, fl_owner_t id);
|
||||
|
||||
void fuse_flush_time_update(struct inode *inode);
|
||||
void fuse_update_ctime(struct inode *inode);
|
||||
|
||||
int fuse_update_attributes(struct inode *inode, struct file *file);
|
||||
|
||||
@@ -118,6 +118,9 @@ static void fuse_evict_inode(struct inode *inode)
|
||||
{
|
||||
struct fuse_inode *fi = get_fuse_inode(inode);
|
||||
|
||||
/* Will write inode on close/munmap and in all other dirtiers */
|
||||
WARN_ON(inode->i_state & I_DIRTY_INODE);
|
||||
|
||||
truncate_inode_pages_final(&inode->i_data);
|
||||
clear_inode(inode);
|
||||
if (inode->i_sb->s_flags & SB_ACTIVE) {
|
||||
|
||||
@@ -354,16 +354,11 @@ static void netfs_rreq_write_to_cache_work(struct work_struct *work)
|
||||
netfs_rreq_do_write_to_cache(rreq);
|
||||
}
|
||||
|
||||
static void netfs_rreq_write_to_cache(struct netfs_read_request *rreq,
|
||||
bool was_async)
|
||||
static void netfs_rreq_write_to_cache(struct netfs_read_request *rreq)
|
||||
{
|
||||
if (was_async) {
|
||||
rreq->work.func = netfs_rreq_write_to_cache_work;
|
||||
if (!queue_work(system_unbound_wq, &rreq->work))
|
||||
BUG();
|
||||
} else {
|
||||
netfs_rreq_do_write_to_cache(rreq);
|
||||
}
|
||||
rreq->work.func = netfs_rreq_write_to_cache_work;
|
||||
if (!queue_work(system_unbound_wq, &rreq->work))
|
||||
BUG();
|
||||
}
|
||||
|
||||
/*
|
||||
@@ -560,7 +555,7 @@ again:
|
||||
wake_up_bit(&rreq->flags, NETFS_RREQ_IN_PROGRESS);
|
||||
|
||||
if (test_bit(NETFS_RREQ_WRITE_TO_CACHE, &rreq->flags))
|
||||
return netfs_rreq_write_to_cache(rreq, was_async);
|
||||
return netfs_rreq_write_to_cache(rreq);
|
||||
|
||||
netfs_rreq_completed(rreq, was_async);
|
||||
}
|
||||
|
||||
@@ -15,6 +15,7 @@
|
||||
#include <linux/jhash.h>
|
||||
#include <linux/slab.h>
|
||||
#include <linux/sort.h>
|
||||
#include <linux/kmemleak.h>
|
||||
|
||||
#include "tracing_map.h"
|
||||
#include "trace.h"
|
||||
@@ -307,6 +308,7 @@ static void tracing_map_array_free(struct tracing_map_array *a)
|
||||
for (i = 0; i < a->n_pages; i++) {
|
||||
if (!a->pages[i])
|
||||
break;
|
||||
kmemleak_free(a->pages[i]);
|
||||
free_page((unsigned long)a->pages[i]);
|
||||
}
|
||||
|
||||
@@ -342,6 +344,7 @@ static struct tracing_map_array *tracing_map_array_alloc(unsigned int n_elts,
|
||||
a->pages[i] = (void *)get_zeroed_page(GFP_KERNEL);
|
||||
if (!a->pages[i])
|
||||
goto free;
|
||||
kmemleak_alloc(a->pages[i], PAGE_SIZE, 1, GFP_KERNEL);
|
||||
}
|
||||
out:
|
||||
return a;
|
||||
|
||||
@@ -721,7 +721,7 @@ static struct request_sock *inet_reqsk_clone(struct request_sock *req,
|
||||
|
||||
sk_node_init(&nreq_sk->sk_node);
|
||||
nreq_sk->sk_tx_queue_mapping = req_sk->sk_tx_queue_mapping;
|
||||
#ifdef CONFIG_XPS
|
||||
#ifdef CONFIG_SOCK_RX_QUEUE_MAPPING
|
||||
nreq_sk->sk_rx_queue_mapping = req_sk->sk_rx_queue_mapping;
|
||||
#endif
|
||||
nreq_sk->sk_incoming_cpu = req_sk->sk_incoming_cpu;
|
||||
|
||||
@@ -1871,6 +1871,11 @@ static int netlink_sendmsg(struct socket *sock, struct msghdr *msg, size_t len)
|
||||
if (msg->msg_flags & MSG_OOB)
|
||||
return -EOPNOTSUPP;
|
||||
|
||||
if (len == 0) {
|
||||
pr_warn_once("Zero length message leads to an empty skb\n");
|
||||
return -ENODATA;
|
||||
}
|
||||
|
||||
err = scm_send(sock, msg, &scm, true);
|
||||
if (err < 0)
|
||||
return err;
|
||||
|
||||
@@ -636,8 +636,10 @@ static int nfc_genl_dump_devices_done(struct netlink_callback *cb)
|
||||
{
|
||||
struct class_dev_iter *iter = (struct class_dev_iter *) cb->args[0];
|
||||
|
||||
nfc_device_iter_exit(iter);
|
||||
kfree(iter);
|
||||
if (iter) {
|
||||
nfc_device_iter_exit(iter);
|
||||
kfree(iter);
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
@@ -335,7 +335,10 @@ enum {
|
||||
((pci)->device == 0x0c0c) || \
|
||||
((pci)->device == 0x0d0c) || \
|
||||
((pci)->device == 0x160c) || \
|
||||
((pci)->device == 0x490d))
|
||||
((pci)->device == 0x490d) || \
|
||||
((pci)->device == 0x4f90) || \
|
||||
((pci)->device == 0x4f91) || \
|
||||
((pci)->device == 0x4f92))
|
||||
|
||||
#define IS_BXT(pci) ((pci)->vendor == 0x8086 && (pci)->device == 0x5a98)
|
||||
|
||||
@@ -2472,6 +2475,13 @@ static const struct pci_device_id azx_ids[] = {
|
||||
/* DG1 */
|
||||
{ PCI_DEVICE(0x8086, 0x490d),
|
||||
.driver_data = AZX_DRIVER_SKL | AZX_DCAPS_INTEL_SKYLAKE},
|
||||
/* DG2 */
|
||||
{ PCI_DEVICE(0x8086, 0x4f90),
|
||||
.driver_data = AZX_DRIVER_SKL | AZX_DCAPS_INTEL_SKYLAKE},
|
||||
{ PCI_DEVICE(0x8086, 0x4f91),
|
||||
.driver_data = AZX_DRIVER_SKL | AZX_DCAPS_INTEL_SKYLAKE},
|
||||
{ PCI_DEVICE(0x8086, 0x4f92),
|
||||
.driver_data = AZX_DRIVER_SKL | AZX_DCAPS_INTEL_SKYLAKE},
|
||||
/* Alderlake-S */
|
||||
{ PCI_DEVICE(0x8086, 0x7ad0),
|
||||
.driver_data = AZX_DRIVER_SKL | AZX_DCAPS_INTEL_SKYLAKE},
|
||||
|
||||
@@ -4380,10 +4380,11 @@ HDA_CODEC_ENTRY(0x8086280f, "Icelake HDMI", patch_i915_icl_hdmi),
|
||||
HDA_CODEC_ENTRY(0x80862812, "Tigerlake HDMI", patch_i915_tgl_hdmi),
|
||||
HDA_CODEC_ENTRY(0x80862814, "DG1 HDMI", patch_i915_tgl_hdmi),
|
||||
HDA_CODEC_ENTRY(0x80862815, "Alderlake HDMI", patch_i915_tgl_hdmi),
|
||||
HDA_CODEC_ENTRY(0x8086281c, "Alderlake-P HDMI", patch_i915_tgl_hdmi),
|
||||
HDA_CODEC_ENTRY(0x80862816, "Rocketlake HDMI", patch_i915_tgl_hdmi),
|
||||
HDA_CODEC_ENTRY(0x80862819, "DG2 HDMI", patch_i915_tgl_hdmi),
|
||||
HDA_CODEC_ENTRY(0x8086281a, "Jasperlake HDMI", patch_i915_icl_hdmi),
|
||||
HDA_CODEC_ENTRY(0x8086281b, "Elkhartlake HDMI", patch_i915_icl_hdmi),
|
||||
HDA_CODEC_ENTRY(0x8086281c, "Alderlake-P HDMI", patch_i915_tgl_hdmi),
|
||||
HDA_CODEC_ENTRY(0x80862880, "CedarTrail HDMI", patch_generic_hdmi),
|
||||
HDA_CODEC_ENTRY(0x80862882, "Valleyview2 HDMI", patch_i915_byt_hdmi),
|
||||
HDA_CODEC_ENTRY(0x80862883, "Braswell HDMI", patch_i915_byt_hdmi),
|
||||
|
||||
@@ -819,7 +819,7 @@ static int __cmd_inject(struct perf_inject *inject)
|
||||
inject->tool.ordered_events = true;
|
||||
inject->tool.ordering_requires_timestamps = true;
|
||||
/* Allow space in the header for new attributes */
|
||||
output_data_offset = 4096;
|
||||
output_data_offset = roundup(8192 + session->header.data_offset, 4096);
|
||||
if (inject->strip)
|
||||
strip_init(inject);
|
||||
}
|
||||
|
||||
@@ -1,14 +0,0 @@
|
||||
// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
// Copyright (c) 2021 Facebook
|
||||
|
||||
#ifndef __BPERF_STAT_H
|
||||
#define __BPERF_STAT_H
|
||||
|
||||
typedef struct {
|
||||
__uint(type, BPF_MAP_TYPE_PERCPU_ARRAY);
|
||||
__uint(key_size, sizeof(__u32));
|
||||
__uint(value_size, sizeof(struct bpf_perf_event_value));
|
||||
__uint(max_entries, 1);
|
||||
} reading_map;
|
||||
|
||||
#endif /* __BPERF_STAT_H */
|
||||
@@ -4,11 +4,21 @@
|
||||
#include <linux/perf_event.h>
|
||||
#include <bpf/bpf_helpers.h>
|
||||
#include <bpf/bpf_tracing.h>
|
||||
#include "bperf.h"
|
||||
#include "bperf_u.h"
|
||||
|
||||
reading_map diff_readings SEC(".maps");
|
||||
reading_map accum_readings SEC(".maps");
|
||||
struct {
|
||||
__uint(type, BPF_MAP_TYPE_PERCPU_ARRAY);
|
||||
__uint(key_size, sizeof(__u32));
|
||||
__uint(value_size, sizeof(struct bpf_perf_event_value));
|
||||
__uint(max_entries, 1);
|
||||
} diff_readings SEC(".maps");
|
||||
|
||||
struct {
|
||||
__uint(type, BPF_MAP_TYPE_PERCPU_ARRAY);
|
||||
__uint(key_size, sizeof(__u32));
|
||||
__uint(value_size, sizeof(struct bpf_perf_event_value));
|
||||
__uint(max_entries, 1);
|
||||
} accum_readings SEC(".maps");
|
||||
|
||||
struct {
|
||||
__uint(type, BPF_MAP_TYPE_HASH);
|
||||
|
||||
@@ -4,7 +4,6 @@
|
||||
#include <linux/perf_event.h>
|
||||
#include <bpf/bpf_helpers.h>
|
||||
#include <bpf/bpf_tracing.h>
|
||||
#include "bperf.h"
|
||||
|
||||
struct {
|
||||
__uint(type, BPF_MAP_TYPE_PERF_EVENT_ARRAY);
|
||||
@@ -13,8 +12,19 @@ struct {
|
||||
__uint(map_flags, BPF_F_PRESERVE_ELEMS);
|
||||
} events SEC(".maps");
|
||||
|
||||
reading_map prev_readings SEC(".maps");
|
||||
reading_map diff_readings SEC(".maps");
|
||||
struct {
|
||||
__uint(type, BPF_MAP_TYPE_PERCPU_ARRAY);
|
||||
__uint(key_size, sizeof(__u32));
|
||||
__uint(value_size, sizeof(struct bpf_perf_event_value));
|
||||
__uint(max_entries, 1);
|
||||
} prev_readings SEC(".maps");
|
||||
|
||||
struct {
|
||||
__uint(type, BPF_MAP_TYPE_PERCPU_ARRAY);
|
||||
__uint(key_size, sizeof(__u32));
|
||||
__uint(value_size, sizeof(struct bpf_perf_event_value));
|
||||
__uint(max_entries, 1);
|
||||
} diff_readings SEC(".maps");
|
||||
|
||||
SEC("raw_tp/sched_switch")
|
||||
int BPF_PROG(on_switch)
|
||||
|
||||
Reference in New Issue
Block a user