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clk: rockchip: rk3576: mark fclk_ddr_cm0_core as critical

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Signed-off-by: YouMin Chen <cym@rock-chips.com>
Change-Id: I3800457b910e22d65e7f6e11462ad4d9a2169d09
This commit is contained in:
YouMin Chen
2024-02-25 14:54:07 +08:00
committed by Tao Huang
parent 15bc748bda
commit 607c12af74
1 changed files with 1 additions and 1 deletions
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drivers/clk/rockchip/clk-rk3576.c
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@@ -884,7 +884,7 @@ static struct rockchip_clk_branch rk3576_clk_branches[] __initdata = {
COMPOSITE(HCLK_DDR_ROOT, "hclk_ddr_root", gpll_cpll_p, CLK_IGNORE_UNUSED,
RK3576_CLKSEL_CON(77), 5, 1, MFLAGS, 0, 5, DFLAGS,
RK3576_CLKGATE_CON(22), 11, GFLAGS),
GATE(FCLK_DDR_CM0_CORE, "fclk_ddr_cm0_core", "hclk_ddr_root", 0,
GATE(FCLK_DDR_CM0_CORE, "fclk_ddr_cm0_core", "hclk_ddr_root", CLK_IS_CRITICAL,
RK3576_CLKGATE_CON(22), 15, GFLAGS),
COMPOSITE_NODIV(CLK_DDR_TIMER_ROOT, "clk_ddr_timer_root", mux_100m_24m_p, 0,
RK3576_CLKSEL_CON(77), 6, 1, MFLAGS,