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arm64: dts: rockchip: rk3368: xin32k use the fixed clk
If xin32k use the rk808_clkout1, rk808 init is too late, xin32k enable count and prepare count is not match with it's child clk. Change-Id: I314776c5024fdf3373619968582497e0e2d5666f Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
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@@ -160,7 +160,7 @@
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vcc10-supply = <&vcc_sys>;
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vcc11-supply = <&vcc_sys>;
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vcc12-supply = <&vcc_io>;
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clock-output-names = "xin32k", "rk808-clkout2";
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clock-output-names = "rk808-clkout1", "rk808-clkout2";
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#clock-cells = <1>;
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regulators {
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@@ -329,7 +329,7 @@
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compatible = "rockchip,rk818";
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status = "okay";
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reg = <0x1c>;
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clock-output-names = "xin32k", "wifibt_32kin";
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clock-output-names = "rk808-clkout1", "wifibt_32kin";
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interrupt-parent = <&gpio0>;
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interrupts = <1 IRQ_TYPE_LEVEL_LOW>;
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pinctrl-names = "default";
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@@ -234,7 +234,7 @@
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reg = <0x1c>;
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status = "okay";
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clock-output-names = "xin32k", "wifibt_32kin";
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clock-output-names = "rk808-clkout1", "wifibt_32kin";
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interrupt-parent = <&gpio0>;
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interrupts = <1 IRQ_TYPE_LEVEL_LOW>;
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pinctrl-names = "default";
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@@ -393,6 +393,13 @@
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#clock-cells = <0>;
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};
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xin32k: xin32k {
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compatible = "fixed-clock";
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clock-frequency = <32768>;
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clock-output-names = "xin32k";
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#clock-cells = <0>;
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};
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sdmmc: rksdmmc@ff0c0000 {
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compatible = "rockchip,rk3368-dw-mshc", "rockchip,rk3288-dw-mshc";
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reg = <0x0 0xff0c0000 0x0 0x4000>;
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