arm64: dts: rockchip: rk3368: xin32k use the fixed clk

If xin32k use the rk808_clkout1, rk808 init is too late,
xin32k enable count and prepare count is not match with it's child clk.

Change-Id: I314776c5024fdf3373619968582497e0e2d5666f
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
This commit is contained in:
Elaine Zhang
2017-03-21 15:09:17 +08:00
committed by Huang, Tao
parent d63ab481f1
commit 61e585b9ef
4 changed files with 10 additions and 3 deletions

View File

@@ -160,7 +160,7 @@
vcc10-supply = <&vcc_sys>;
vcc11-supply = <&vcc_sys>;
vcc12-supply = <&vcc_io>;
clock-output-names = "xin32k", "rk808-clkout2";
clock-output-names = "rk808-clkout1", "rk808-clkout2";
#clock-cells = <1>;
regulators {

View File

@@ -329,7 +329,7 @@
compatible = "rockchip,rk818";
status = "okay";
reg = <0x1c>;
clock-output-names = "xin32k", "wifibt_32kin";
clock-output-names = "rk808-clkout1", "wifibt_32kin";
interrupt-parent = <&gpio0>;
interrupts = <1 IRQ_TYPE_LEVEL_LOW>;
pinctrl-names = "default";

View File

@@ -234,7 +234,7 @@
reg = <0x1c>;
status = "okay";
clock-output-names = "xin32k", "wifibt_32kin";
clock-output-names = "rk808-clkout1", "wifibt_32kin";
interrupt-parent = <&gpio0>;
interrupts = <1 IRQ_TYPE_LEVEL_LOW>;
pinctrl-names = "default";

View File

@@ -393,6 +393,13 @@
#clock-cells = <0>;
};
xin32k: xin32k {
compatible = "fixed-clock";
clock-frequency = <32768>;
clock-output-names = "xin32k";
#clock-cells = <0>;
};
sdmmc: rksdmmc@ff0c0000 {
compatible = "rockchip,rk3368-dw-mshc", "rockchip,rk3288-dw-mshc";
reg = <0x0 0xff0c0000 0x0 0x4000>;