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media: i2c: ov16880: fix gain ctrl
in non-HDR mode, short gain and long gian need to be set the same values. Signed-off-by: Jianwei Fan <jianwei.fan@rock-chips.com> Change-Id: Idaa14c389a20b2518757303538dc19fb8154695d
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@@ -57,8 +57,8 @@
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#define OV16880_AGAIN_REG_H 0x350A
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#define OV16880_AGAIN_REG_L 0x350B
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#define OV16880_SF_AGAIN_REG_H 0x350C
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#define OV16880_SF_AGAIN_REG_L 0x350D
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#define OV16880_SF_AGAIN_REG_H 0x350E
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#define OV16880_SF_AGAIN_REG_L 0x350F
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#define OV16880_GAIN_H_MASK 0x1f
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#define OV16880_GAIN_H_SHIFT 8
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@@ -2428,6 +2428,34 @@ static const struct v4l2_subdev_ops ov16880_subdev_ops = {
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.pad = &ov16880_pad_ops,
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};
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static int ov16880_set_gain_reg(struct ov16880 *ov16880, u32 a_gain)
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{
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int ret = 0;
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ret = ov16880_write_reg(ov16880->client,
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OV16880_GROUP_UPDATE_ADDRESS,
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OV16880_REG_VALUE_08BIT,
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OV16880_GROUP_UPDATE_START_DATA);
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ret |= ov16880_write_reg(ov16880->client,
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OV16880_SF_AGAIN_REG_H,
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OV16880_REG_VALUE_16BIT,
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a_gain & 0x7ff);
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ret |= ov16880_write_reg(ov16880->client,
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OV16880_AGAIN_REG_H,
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OV16880_REG_VALUE_16BIT,
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a_gain & 0x7ff);
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ret |= ov16880_write_reg(ov16880->client,
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OV16880_GROUP_UPDATE_ADDRESS,
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OV16880_REG_VALUE_08BIT,
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OV16880_GROUP_UPDATE_END_DATA);
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ret |= ov16880_write_reg(ov16880->client,
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OV16880_GROUP_UPDATE_ADDRESS,
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OV16880_REG_VALUE_08BIT,
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OV16880_GROUP_UPDATE_LAUNCH);
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return ret;
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};
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static int ov16880_set_ctrl(struct v4l2_ctrl *ctrl)
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{
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struct ov16880 *ov16880 = container_of(ctrl->handler,
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@@ -2463,10 +2491,7 @@ static int ov16880_set_ctrl(struct v4l2_ctrl *ctrl)
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ctrl->val);
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break;
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case V4L2_CID_ANALOGUE_GAIN:
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ret = ov16880_write_reg(ov16880->client,
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OV16880_AGAIN_REG_H,
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OV16880_REG_VALUE_16BIT,
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ctrl->val & 0x7ff);
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ret = ov16880_set_gain_reg(ov16880, ctrl->val);
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dev_dbg(&client->dev, "set analog gain value 0x%x\n", ctrl->val);
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break;
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case V4L2_CID_VBLANK:
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