dts: rk3036/rk312x/rk3288: add dma clk to fit

commit 75ce2b9330

Signed-off-by: dkl <dkl@rock-chips.com>
This commit is contained in:
dkl
2015-03-09 15:32:28 +08:00
parent 1cefe0404b
commit 6271af33fe
3 changed files with 12 additions and 4 deletions

View File

@@ -140,6 +140,8 @@
pdma: pdma@20078000 {
compatible = "arm,pl330", "arm,primecell";
reg = <0x20078000 0x4000>;
clocks = <&clk_gates5 1>;
clock-names = "apb_pclk";
interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>;
#dma-cells = <1>;
@@ -297,7 +299,7 @@
/*aclk_peri_pre*/
<&clk_gates4 3>,/*aclk_peri_axi_matrix*/
<&clk_gates5 1>,/*aclk_dmac2*/
//<&clk_gates5 1>,/*aclk_dmac2*/
<&clk_gates9 15>,/*aclk_peri_niu*/
<&clk_gates4 2>,/*aclk_cpu_peri*/

View File

@@ -169,6 +169,8 @@
pdma: pdma@20078000 {
compatible = "arm,pl330", "arm,primecell";
reg = <0x20078000 0x4000>;
clocks = <&clk_gates5 1>;
clock-names = "apb_pclk";
interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>;
#dma-cells = <1>;
@@ -371,7 +373,7 @@
/*aclk_peri_pre*/
//<&clk_gates10 10>,/*aclk_gmac*/
<&clk_gates4 3>,/*aclk_peri_axi_matrix*/
<&clk_gates5 1>,/*aclk_dmac2*/
//<&clk_gates5 1>,/*aclk_dmac2*/
<&clk_gates9 15>,/*aclk_peri_niu*/
<&clk_gates9 2>,/*g_pclk_pmu*/
<&clk_gates9 3>,/*g_pclk_pmu_noc*/

View File

@@ -226,6 +226,8 @@
pdma0: pdma@ffb20000 {
compatible = "arm,pl330", "arm,primecell";
reg = <0xffb20000 0x4000>;
clocks = <&clk_gates10 12>;
clock-names = "apb_pclk";
interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>;
#dma-cells = <1>;
@@ -234,6 +236,8 @@
pdma1: pdma@ff250000 {
compatible = "arm,pl330", "arm,primecell";
reg = <0xff250000 0x4000>;
clocks = <&clk_gates6 3>;
clock-names = "apb_pclk";
interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
#dma-cells = <1>;
@@ -546,7 +550,7 @@
<&clk_gates10 5>,/*aclk_intmem0*/
<&clk_gates10 6>,/*aclk_intmem1*/
<&clk_gates10 7>,/*aclk_intmem2*/
<&clk_gates10 12>,/*aclk_dma1*/
/*<&clk_gates10 12>,*//*aclk_dma1*/
<&clk_gates10 13>,/*aclk_strc_sys*/
<&clk_gates10 4>,/*aclk_intmem*/
@@ -562,7 +566,7 @@
/*aclk_peri*/
<&clk_gates6 2>,/*aclk_peri_axi_matrix*/
<&clk_gates6 3>,/*aclk_dmac2*/
/*<&clk_gates6 3>,*//*aclk_dmac2*/
<&clk_gates7 11>,/*aclk_peri_niu*/
<&clk_gates8 12>,/*aclk_peri_mmu*/