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memory: rockchip: dsmc: set 0.5x refresh rate allow for xccela psram

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Change-Id: I3195579b8c1d597f25e0a9711cd3edc5a6599ab4
Signed-off-by: Zhihuan He <huan.he@rock-chips.com>
This commit is contained in:
Zhihuan He
2024-11-22 17:07:07 +08:00
committed by Tao Huang
parent fce333a285
commit 629b36c6b3
2 changed files with 6 additions and 0 deletions
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3
drivers/memory/rockchip/dsmc-controller.c
View File

@@ -507,6 +507,9 @@ static int dsmc_psram_cfg(struct rockchip_dsmc *dsmc, uint32_t cs)
mr_tmp = (mr_tmp & (~(XCCELA_MR4_WL_MASK << XCCELA_MR4_WL_SHIFT))) |
(tmp << XCCELA_MR4_WL_SHIFT);
/* set 0.5x refresh rate allow */
mr_tmp = (mr_tmp & (~(XCCELA_MR4_REFRESH_MASK << XCCELA_MR4_REFRESH_SHIFT))) |
(XCCELA_MR4_0_5_REFRESH_RATE << XCCELA_MR4_REFRESH_SHIFT);
xccela_write_mr(region_map, 4, mr_tmp);

3
drivers/memory/rockchip/dsmc-host.h
View File

@@ -254,6 +254,9 @@
#define XCCELA_MR4_WL_SHIFT (5)
#define XCCELA_MR4_WL_MASK (0x7)
#define XCCELA_MR4_REFRESH_SHIFT (3)
#define XCCELA_MR4_REFRESH_MASK (0x3)
#define XCCELA_MR4_0_5_REFRESH_RATE (0x3)
#define XCCELA_MR8_IO_TYPE_SHIFT (6)
#define XCCELA_MR8_IO_TYPE_MASK (0x1)