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cec: cec b ARB timing cause cec 9.6.1 fail [1/1]
PD#SWPL-17658 Problem: ARB timing setting is too large, it will cause cec cts 9.6.1 fail Solution: reducec ARB timing Verify: sm1-AC214 Change-Id: I09f135c63f0f6f810719f6313b58bf84ebc574c1 Signed-off-by: Yong Qin <yong.qin@amlogic.com>
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@@ -753,7 +753,7 @@ static void ao_cecb_init(void)
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reg = 0;
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reg |= (0 << 6);/*curb_err_init*/
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reg |= (0 << 5);/*en_chk_sbitlow*/
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reg |= (0x15 << 0);/*rise_del_max*/
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reg |= (CEC_B_ARB_TIME << 0);/*rise_del_max*/
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hdmirx_cec_write(DWC_CEC_CTRL2, reg);
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}
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@@ -1210,7 +1210,7 @@ void cec_hw_reset(unsigned int cec_sel)
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reg = 0;
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reg |= (0 << 6);/*curb_err_init*/
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reg |= (0 << 5);/*en_chk_sbitlow*/
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reg |= (0x15 << 0);/*rise_del_max*/
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reg |= (CEC_B_ARB_TIME << 0);/*rise_del_max*/
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hdmirx_cec_write(DWC_CEC_CTRL2, reg);
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}
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} else {
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@@ -18,7 +18,7 @@
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#ifndef __AO_CEC_H__
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#define __AO_CEC_H__
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#define CEC_DRIVER_VERSION "2019/11/12: store msg during bootup from st\n"
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#define CEC_DRIVER_VERSION "2019/12/01:finetune ARB time, cause cts 9.6.1\n"
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#define CEC_FRAME_DELAY msecs_to_jiffies(400)
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#define CEC_DEV_NAME "cec"
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@@ -83,6 +83,8 @@ enum cecbver {
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#define ENABLE_ONE_CEC 1
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#define ENABLE_TWO_CEC 2
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#define CEC_B_ARB_TIME 8
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#define CEC_MSG_BUFF_MAX 30
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/*
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