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add mmu table flush for master bug

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This commit is contained in:
zsq
2012-05-11 10:29:43 +08:00
parent 082add2ab8
commit 634976ae57
2 changed files with 22 additions and 22 deletions
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12
drivers/video/rockchip/rga/rga_drv.c
View File

@@ -595,11 +595,11 @@ static void rga_try_set_reg(uint32_t num)
#if RGA_TEST
{
printk("cmd_addr = %.8x\n", rga_read(RGA_CMD_ADDR));
//printk(KERN_DEBUG "cmd_addr = %.8x\n", rga_read(RGA_CMD_ADDR));
uint32_t i;
uint32_t *p;
p = rga_service.cmd_buff;
printk("CMD_REG\n");
printk(KERN_DEBUG "CMD_REG\n");
for (i=0; i<7; i++)
printk("%.8x %.8x %.8x %.8x\n", p[0 + i*4], p[1+i*4], p[2 + i*4], p[3 + i*4]);
}
@@ -618,9 +618,9 @@ static void rga_try_set_reg(uint32_t num)
#if RGA_TEST
{
uint32_t i;
printk("CMD_READ_BACK_REG\n");
printk(KERN_DEBUG "CMD_READ_BACK_REG\n");
for (i=0; i<7; i++)
printk("%.8x %.8x %.8x %.8x\n", rga_read(0x100 + i*16 + 0),
printk(KERN_DEBUG "%.8x %.8x %.8x %.8x\n", rga_read(0x100 + i*16 + 0),
rga_read(0x100 + i*16 + 4), rga_read(0x100 + i*16 + 8), rga_read(0x100 + i*16 + 12));
}
#endif
@@ -672,7 +672,7 @@ static void rga_del_running_list(void)
if(list_empty(&reg->session->waiting))
{
atomic_set(&reg->session->done, 1);
atomic_set(&reg->session->done, 1);
wake_up_interruptible_sync(&reg->session->wait);
}
@@ -843,7 +843,7 @@ static int rga_blit(rga_session *session, struct rga_req *req)
atomic_add(num, &rga_service.total_running);
spin_unlock_irqrestore(&rga_service.lock, flag);
rga_try_set_reg(num);
rga_try_set_reg(1);
return 0;
}

32
drivers/video/rockchip/rga/rga_mmu_info.c
View File

@@ -392,14 +392,14 @@ static int rga_mmu_info_BitBlt_mode(struct rga_reg *reg, struct rga_req *req)
/* Cal out the needed mem size */
AllSize = SrcMemSize + DstMemSize;
pages = kzalloc((AllSize + 1)* sizeof(struct page *), GFP_KERNEL);
pages = kmalloc((AllSize + 1)* sizeof(struct page *), GFP_KERNEL);
if(pages == NULL) {
pr_err("RGA MMU malloc pages mem failed\n");
status = RGA_MALLOC_ERROR;
break;
}
MMU_Base = kzalloc((AllSize + 1) * sizeof(uint32_t), GFP_KERNEL);
MMU_Base = kmalloc((AllSize + 1) * sizeof(uint32_t), GFP_KERNEL);
if(MMU_Base == NULL) {
pr_err("RGA MMU malloc MMU_Base point failed\n");
status = RGA_MALLOC_ERROR;
@@ -488,8 +488,8 @@ static int rga_mmu_info_BitBlt_mode(struct rga_reg *reg, struct rga_req *req)
reg->MMU_base = MMU_Base;
/* flush data to DDR */
dmac_flush_range(MMU_Base, (MMU_Base + AllSize));
outer_flush_range(virt_to_phys(MMU_Base),virt_to_phys(MMU_Base + AllSize));
dmac_flush_range(MMU_Base, (MMU_Base + AllSize + 1));
outer_flush_range(virt_to_phys(MMU_Base),virt_to_phys(MMU_Base + AllSize + 1));
status = 0;
@@ -632,8 +632,8 @@ static int rga_mmu_info_color_palette_mode(struct rga_reg *reg, struct rga_req *
reg->MMU_base = MMU_Base;
/* flush data to DDR */
dmac_flush_range(MMU_Base, (MMU_Base + AllSize));
outer_flush_range(virt_to_phys(MMU_Base),virt_to_phys(MMU_Base + AllSize));
dmac_flush_range(MMU_Base, (MMU_Base + AllSize + 1));
outer_flush_range(virt_to_phys(MMU_Base),virt_to_phys(MMU_Base + AllSize + 1));
/* Free the page table */
if (pages != NULL) {
@@ -728,8 +728,8 @@ static int rga_mmu_info_color_fill_mode(struct rga_reg *reg, struct rga_req *req
reg->MMU_base = MMU_Base;
/* flush data to DDR */
dmac_flush_range(MMU_Base, (MMU_Base + AllSize));
outer_flush_range(virt_to_phys(MMU_Base),virt_to_phys(MMU_Base + AllSize));
dmac_flush_range(MMU_Base, (MMU_Base + AllSize + 1));
outer_flush_range(virt_to_phys(MMU_Base),virt_to_phys(MMU_Base + AllSize + 1));
/* Free the page table */
if (pages != NULL)
@@ -773,14 +773,14 @@ static int rga_mmu_info_line_point_drawing_mode(struct rga_reg *reg, struct rga_
AllSize = DstMemSize;
pages = kzalloc(AllSize * sizeof(struct page *), GFP_KERNEL);
pages = kzalloc((AllSize + 1) * sizeof(struct page *), GFP_KERNEL);
if(pages == NULL) {
pr_err("RGA MMU malloc pages mem failed\n");
status = RGA_MALLOC_ERROR;
break;
}
MMU_Base = kzalloc(AllSize * sizeof(uint32_t), GFP_KERNEL);
MMU_Base = kzalloc((AllSize + 1) * sizeof(uint32_t), GFP_KERNEL);
if(pages == NULL) {
pr_err("RGA MMU malloc MMU_Base point failed\n");
status = RGA_MALLOC_ERROR;
@@ -818,8 +818,8 @@ static int rga_mmu_info_line_point_drawing_mode(struct rga_reg *reg, struct rga_
reg->MMU_base = MMU_Base;
/* flush data to DDR */
dmac_flush_range(MMU_Base, (MMU_Base + AllSize));
outer_flush_range(virt_to_phys(MMU_Base),virt_to_phys(MMU_Base + AllSize));
dmac_flush_range(MMU_Base, (MMU_Base + AllSize + 1));
outer_flush_range(virt_to_phys(MMU_Base),virt_to_phys(MMU_Base + AllSize + 1));
/* Free the page table */
if (pages != NULL) {
@@ -955,8 +955,8 @@ static int rga_mmu_info_blur_sharp_filter_mode(struct rga_reg *reg, struct rga_r
reg->MMU_base = MMU_Base;
/* flush data to DDR */
dmac_flush_range(MMU_Base, (MMU_Base + AllSize));
outer_flush_range(virt_to_phys(MMU_Base),virt_to_phys(MMU_Base + AllSize));
dmac_flush_range(MMU_Base, (MMU_Base + AllSize + 1));
outer_flush_range(virt_to_phys(MMU_Base),virt_to_phys(MMU_Base + AllSize + 1));
/* Free the page table */
if (pages != NULL) {
@@ -1111,8 +1111,8 @@ static int rga_mmu_info_pre_scale_mode(struct rga_reg *reg, struct rga_req *req)
reg->MMU_base = MMU_Base;
/* flush data to DDR */
dmac_flush_range(MMU_Base, (MMU_Base + AllSize));
outer_flush_range(virt_to_phys(MMU_Base),virt_to_phys(MMU_Base + AllSize));
dmac_flush_range(MMU_Base, (MMU_Base + AllSize + 1));
outer_flush_range(virt_to_phys(MMU_Base),virt_to_phys(MMU_Base + AllSize + 1));
/* Free the page table */
if (pages != NULL)