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Merge commit '80af59f8b8783610afdf59ff4cd7a0b4fcdf095d'

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* commit '80af59f8b8783610afdf59ff4cd7a0b4fcdf095d':
  video: rockchip: rve: update to 1.0.5
  ARM: rockchip: rv1106: support CONFIG_RV1106_PMU_WAKEUP_TIMEOUT
  media: rockchip: isp: fix is_on false cause pm isp die
  ARM: rockchip: rv1106: support PMIC_SLEEP over gpio0_a4

Change-Id: Ic3b085e535b029b9364c0ecb55551d31e325cfab
This commit is contained in:
Tao Huang
2023-12-05 19:20:14 +08:00
parent 7737649f46 80af59f8b8
commit 63ede6533e
6 changed files with 42 additions and 20 deletions
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6
arch/arm/mach-rockchip/Kconfig
View File

@@ -28,3 +28,9 @@ config RV1106_HPMCU_FAST_WAKEUP
depends on PM_SLEEP && CPU_RV1106
help
This config aims to support HPMCU fast wakeup.
config RV1106_PMU_WAKEUP_TIMEOUT
bool "Rockchip RV1106 pmu timeout wakeup support"
depends on PM_SLEEP && CPU_RV1106
help
This config aims to support pmu timeout wakeup.

49
arch/arm/mach-rockchip/rv1106_pm.c
View File

@@ -281,6 +281,8 @@ static struct reg_region vd_log_reg_rgns[] = {
{ REG_REGION(0x30, 0x30, 4, &stimer_base, 0)},
};
static int is_rv1103, is_rv1106;
#define PLL_LOCKED_TIMEOUT 600000U
static void pm_pll_wait_lock(u32 pll_id)
@@ -710,8 +712,8 @@ static void pmu_sleep_config(void)
/* BIT(RV1106_PMU_WAKEUP_CPU_INT_EN) | */
BIT(RV1106_PMU_WAKEUP_GPIO_INT_EN) |
0;
if (IS_ENABLED(CONFIG_RV1106_HPMCU_FAST_WAKEUP))
pmu_wkup_con |= BIT(RV1106_PMU_WAKEUP_TIMEROUT_EN);
if (IS_ENABLED(CONFIG_RV1106_PMU_WAKEUP_TIMEOUT))
pmu_wkup_con |= BIT(RV1106_PMU_WAKEUP_TIMEOUT_EN);
pmu_pwr_con =
BIT(RV1106_PMU_PWRMODE_EN) |
@@ -777,14 +779,6 @@ static void pmu_sleep_config(void)
BIT(RV1106_PMU_GPLL_PD_ENA) |
0;
/* pmic_sleep */
/* gpio0_a3 activelow, gpio0_a4 active high */
writel_relaxed(BITS_WITH_WMASK(0x4, 0x7, 0), pmugrf_base + RV1106_PMUGRF_SOC_CON(1));
/* select sleep func */
writel_relaxed(BITS_WITH_WMASK(0x1, 0x1, 0), pmugrf_base + RV1106_PMUGRF_SOC_CON(1));
/* gpio0_a3 iomux */
writel_relaxed(BITS_WITH_WMASK(0x1, 0xf, 12), ioc_base[0] + 0);
/* pmu_debug */
writel_relaxed(0xffffff01, pmu_base + RV1106_PMU_INFO_TX_CON);
writel_relaxed(BITS_WITH_WMASK(0x1, 0xf, 4), ioc_base[1] + 0);
@@ -945,13 +939,27 @@ static void gpio_config(void)
gpio0_set_pull(2, RV1106_GPIO_PULL_DOWN);
gpio0_set_direct(2, 0);
/* gpio0_a3, pullnone */
gpio0_set_pull(3, RV1106_GPIO_PULL_NONE);
if (is_rv1106) {
/* gpio0_a3, pullnone */
gpio0_set_iomux(3, 1);
gpio0_set_pull(3, RV1106_GPIO_PULL_NONE);
} else {
/* gpio0_a3, input, pullup */
gpio0_set_iomux(3, 0);
gpio0_set_pull(3, RV1106_GPIO_PULL_UP);
gpio0_set_direct(3, 0);
}
/* gpio0_a4, input, pullup */
gpio0_set_iomux(4, 0);
gpio0_set_pull(4, RV1106_GPIO_PULL_UP);
gpio0_set_direct(4, 0);
if (is_rv1103) {
/* gpio0_a4, pullnone */
gpio0_set_iomux(4, 1);
gpio0_set_pull(4, RV1106_GPIO_PULL_NONE);
} else {
/* gpio0_a4, input, pullup */
gpio0_set_iomux(4, 0);
gpio0_set_pull(4, RV1106_GPIO_PULL_UP);
gpio0_set_direct(4, 0);
}
/* gpio0_a5, input, pullnone */
gpio0_set_iomux(5, 0);
@@ -1128,6 +1136,11 @@ static int __init rv1106_suspend_init(struct device_node *np)
{
void __iomem *dev_reg_base;
if (of_machine_is_compatible("rockchip,rv1103"))
is_rv1103 = 1;
else if (of_machine_is_compatible("rockchip,rv1106"))
is_rv1106 = 1;
dev_reg_base = ioremap(RV1106_DEV_REG_BASE, RV1106_DEV_REG_SIZE);
if (dev_reg_base)
pr_info("%s map dev_reg 0x%x -> 0x%x\n",
@@ -1207,6 +1220,10 @@ static int __init rv1106_suspend_init(struct device_node *np)
/* biu auto con */
writel_relaxed(0x07ff07ff, pmu_base + RV1106_PMU_BIU_AUTO_CON);
/* gpio0_a3 activelow, gpio0_a4 active high, select sleep func */
writel_relaxed(BITS_WITH_WMASK(0x5, 0x7, 0),
pmugrf_base + RV1106_PMUGRF_SOC_CON(1));
rkpm_region_mem_init(RV1106_PM_REG_REGION_MEM_SIZE);
rkpm_reg_rgns_init();

2
arch/arm/mach-rockchip/rv1106_pm.h
View File

@@ -238,7 +238,7 @@ enum rv1106_wakeup_init_con {
RV1106_PMU_WAKEUP_USBDEV_EN,
RV1106_PMU_WAKEUP_TIMER_EN,
RV1106_PMU_WAKEUP_TIMEROUT_EN,
RV1106_PMU_WAKEUP_TIMEOUT_EN,
RV1106_PMU_WAKEUP_SFT_WAKEUP_CFG,
};

1
drivers/media/platform/rockchip/isp/hw.c
View File

@@ -1211,7 +1211,6 @@ void rkisp_hw_enum_isp_size(struct rkisp_hw_dev *hw_dev)
struct rkisp_device *isp;
u32 w, h, i;
memset(hw_dev->isp_size, 0, sizeof(hw_dev->isp_size));
if (!hw_dev->max_in.is_fix) {
hw_dev->max_in.w = 0;
hw_dev->max_in.h = 0;

2
drivers/video/rockchip/rve/include/rve_drv.h
View File

@@ -72,7 +72,7 @@
#define DRIVER_MAJOR_VERSION 1
#define DRIVER_MINOR_VERSION 0
#define DRIVER_REVISION_VERSION 4
#define DRIVER_REVISION_VERSION 5
#define DRIVER_VERSION (STR(DRIVER_MAJOR_VERSION) "." STR(DRIVER_MINOR_VERSION) \
"." STR(DRIVER_REVISION_VERSION))

2
drivers/video/rockchip/rve/include/rve_reg.h
View File

@@ -73,7 +73,7 @@
/* mode value */
#define RVE_LLP_MODE 0x8000
#define RVE_LLP_DONE 0x11
#define RVE_LLP_DONE 0x10
#define RVE_CLEAR_UP_REG6_WROK_STA 0xff0000
void rve_soft_reset(struct rve_scheduler_t *scheduler);