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ARM: dts: aspeed: Adjust "reg" property of FMC/SPI controllers

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This is compatible with the current driver and addresses issues when
running 'make dt_binding_check'.

Cc: Chin-Ting Kuo <chin-ting_kuo@aspeedtech.com>
Tested-by: Joel Stanley <joel@jms.id.au>
Tested-by: Tao Ren <rentao.bupt@gmail.com>
Tested-by: Jae Hyun Yoo <quic_jaehyoo@quicinc.com>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Link: https://lore.kernel.org/r/20220509175616.1089346-2-clg@kaod.org
Signed-off-by: Joel Stanley <joel@jms.id.au>
This commit is contained in:
Cédric Le Goater
2022-05-09 19:56:06 +02:00
committed by Joel Stanley
parent 4d338ee40b
commit 651b79e8c9
3 changed files with 8 additions and 16 deletions
Download Patch File Download Diff File Expand all files Collapse all files

6
arch/arm/boot/dts/aspeed-g4.dtsi
View File

@@ -54,8 +54,7 @@
ranges;
fmc: spi@1e620000 {
reg = < 0x1e620000 0x94
0x20000000 0x10000000 >;
reg = <0x1e620000 0x94>, <0x20000000 0x10000000>;
#address-cells = <1>;
#size-cells = <0>;
compatible = "aspeed,ast2400-fmc";
@@ -91,8 +90,7 @@
};
spi: spi@1e630000 {
reg = < 0x1e630000 0x18
0x30000000 0x10000000 >;
reg = <0x1e630000 0x18>, <0x30000000 0x10000000>;
#address-cells = <1>;
#size-cells = <0>;
compatible = "aspeed,ast2400-spi";

9
arch/arm/boot/dts/aspeed-g5.dtsi
View File

@@ -55,8 +55,7 @@
ranges;
fmc: spi@1e620000 {
reg = < 0x1e620000 0xc4
0x20000000 0x10000000 >;
reg = <0x1e620000 0xc4>, <0x20000000 0x10000000>;
#address-cells = <1>;
#size-cells = <0>;
compatible = "aspeed,ast2500-fmc";
@@ -84,8 +83,7 @@
};
spi1: spi@1e630000 {
reg = < 0x1e630000 0xc4
0x30000000 0x08000000 >;
reg = <0x1e630000 0xc4>, <0x30000000 0x08000000>;
#address-cells = <1>;
#size-cells = <0>;
compatible = "aspeed,ast2500-spi";
@@ -106,8 +104,7 @@
};
spi2: spi@1e631000 {
reg = < 0x1e631000 0xc4
0x38000000 0x08000000 >;
reg = <0x1e631000 0xc4>, <0x38000000 0x08000000>;
#address-cells = <1>;
#size-cells = <0>;
compatible = "aspeed,ast2500-spi";

9
arch/arm/boot/dts/aspeed-g6.dtsi
View File

@@ -95,8 +95,7 @@
};
fmc: spi@1e620000 {
reg = < 0x1e620000 0xc4
0x20000000 0x10000000 >;
reg = <0x1e620000 0xc4>, <0x20000000 0x10000000>;
#address-cells = <1>;
#size-cells = <0>;
compatible = "aspeed,ast2600-fmc";
@@ -124,8 +123,7 @@
};
spi1: spi@1e630000 {
reg = < 0x1e630000 0xc4
0x30000000 0x10000000 >;
reg = <0x1e630000 0xc4>, <0x30000000 0x10000000>;
#address-cells = <1>;
#size-cells = <0>;
compatible = "aspeed,ast2600-spi";
@@ -146,8 +144,7 @@
};
spi2: spi@1e631000 {
reg = < 0x1e631000 0xc4
0x50000000 0x10000000 >;
reg = <0x1e631000 0xc4>, <0x50000000 0x10000000>;
#address-cells = <1>;
#size-cells = <0>;
compatible = "aspeed,ast2600-spi";