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backlight: ldim: algorithms clear up

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PD#170815: backlight: ldim: algorithms clear up

Change-Id: Ic6fc691dc67478ae4af6fc842427a839acf9d381
Signed-off-by: Evoke Zhang <evoke.zhang@amlogic.com>
This commit is contained in:
Evoke Zhang
2018-07-27 20:08:19 +08:00
committed by Yixun Lan
parent 07bd8e13e8
commit 66188fce68
14 changed files with 1316 additions and 2439 deletions
Download Patch File Download Diff File Expand all files Collapse all files

5
MAINTAINERS
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@@ -14555,6 +14555,11 @@ AMLOGIC PARTITION DTSI
M: Jiaming Huang <jiaming.huang@amlogic.com>
F: arch/arm64/boot/dts/amlogic/partition_tv_4G.dtsi
AMLOGIC LCD BACKLIGHT LDIM
M: evoke zhang <evoke.zhang@amlogic.com>
F: drivers/amlogic/media/algorithm/*
F: drivers/amlogic/media/vout/backlight/aml_ldim/ldim_func.h
AMLOGIC AVIN DETECT DRIVER
M: Xingyu Chen <xingyu.chen@amlogic.com>
F: drivers/amlogic/input/avin_detect/*

1
drivers/amlogic/media/Kconfig
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@@ -62,6 +62,7 @@ source "drivers/amlogic/media/vin/Kconfig"
source "drivers/amlogic/media/video_processor/Kconfig"
source "drivers/amlogic/media/enhancement/Kconfig"
source "drivers/amlogic/media/gdc/Kconfig"
source "drivers/amlogic/media/algorithm/Kconfig"
endif
source "drivers/amlogic/media/dtv_demod/Kconfig"
endmenu

2
drivers/amlogic/media/Makefile
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@@ -10,3 +10,5 @@ obj-$(CONFIG_AMLOGIC_MEDIA_VIDEO_PROCESSOR) += video_processor/
obj-$(CONFIG_AMLOGIC_MEDIA_ENHANCEMENT) += enhancement/
obj-$(CONFIG_AMLOGIC_DTV_DEMOD) += dtv_demod/
obj-$(CONFIG_AMLOGIC_MEDIA_GDC) += gdc/
obj-$(CONFIG_AMLOGIC_MEDIA_ALGORITHM) += algorithm/

21
drivers/amlogic/media/algorithm/Kconfig Normal file
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@@ -0,0 +1,21 @@
#
# Amlogic multimedia algorithm configuration
#
menu "Amlogic multimedia algorithm configuration"
config AMLOGIC_MEDIA_ALGORITHM
bool "Amlgoic Multimedia Algorithm Support"
default n
help
Amlogic multimedia algorithm include:
dnlp
hdr10
sl_hdr
ldim
if AMLOGIC_MEDIA_ALGORITHM
#source "drivers/amlogic/media/algorithm/ldim/Kconfig"
endif
endmenu

1
drivers/amlogic/media/algorithm/Makefile Normal file
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@@ -0,0 +1 @@
obj-$(CONFIG_AMLOGIC_MEDIA_ALGORITHM) = ldim/

10
drivers/amlogic/media/vout/backlight/aml_ldim/Kconfig
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@@ -2,11 +2,11 @@
# LDIM Device Driver Configuration
#
config AMLOGIC_LOCAL_DIMMING
bool "Amlogic Local dimming"
bool "Amlogic Local Dimming"
default n
help
Say Y if you want to use Amlogic Local dimming.
The role of local dimming is according to each
image information, calculate the corresponding
brightness values, to improve the effect of image quality,
Say Y if you want to use Amlogic Local dimming.
The role of local dimming is according to each
image information, calculate the corresponding
brightness values, to improve the effect of image quality

4
drivers/amlogic/media/vout/backlight/aml_ldim/ldim_dev_drv.c
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@@ -989,7 +989,7 @@ static struct platform_driver ldim_dev_platform_driver = {
static int __init ldim_dev_init(void)
{
if (platform_driver_register(&ldim_dev_platform_driver)) {
BLPR("failed to register bl driver module\n");
LDIMPR("failed to register ldim_dev driver module\n");
return -ENODEV;
}
return 0;
@@ -1004,7 +1004,7 @@ late_initcall(ldim_dev_init);
module_exit(ldim_dev_exit);
MODULE_DESCRIPTION("LDIM Driver for LCD Backlight");
MODULE_DESCRIPTION("LDIM device Driver for LCD Backlight");
MODULE_LICENSE("GPL");
MODULE_AUTHOR("Amlogic, Inc.");

2611
drivers/amlogic/media/vout/backlight/aml_ldim/ldim_drv.c
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File diff suppressed because it is too large Load Diff

376
drivers/amlogic/media/vout/backlight/aml_ldim/ldim_drv.h
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@@ -17,369 +17,37 @@
#ifndef _AML_LDIM_DRV_H_
#define _AML_LDIM_DRV_H_
#include <linux/cdev.h>
#include <linux/amlogic/media/vout/lcd/aml_ldim.h>
#include <linux/amlogic/media/vout/lcd/ldim_alg.h>
/*20180629: initial version */
/*20180725: new pwm control flow support */
/*20180730: algorithm clear up */
#define LDIM_DRV_VER "20180730"
extern unsigned char ldim_debug_print;
extern int LD_remap_lut[16][32];
#define AML_LDIM_MODULE_NAME "aml_ldim"
#define AML_LDIM_DRIVER_NAME "aml_ldim"
#define AML_LDIM_DEVICE_NAME "aml_ldim"
#define AML_LDIM_CLASS_NAME "aml_ldim"
#define Wr(reg, val) aml_write_vcbus(reg, val)
#define Rd(adr) aml_read_vcbus(adr)
/*#define LDIM_DEBUG_INFO*/
#define LDIMPR(fmt, args...) pr_info("ldim: "fmt"", ## args)
#define LDIMERR(fmt, args...) pr_err("ldim: error: "fmt"", ## args)
/*20180629: initial version */
/*20180725: new pwm control flow support */
#define LDIM_DRV_VER "20180725"
extern unsigned char ldim_debug_print;
/*** GXTVBB & TXLX common use register*/
/* each base has 16 address space */
#define REG_LD_CFG_BASE 0x00
#define REG_LD_RGB_IDX_BASE 0x10
#define REG_LD_RGB_LUT_BASE 0x2000
#define REG_LD_MATRIX_BASE 0x3000
/* LD_CFG_BASE */
#define REG_LD_FRM_SIZE 0x0
#define REG_LD_RGB_MOD 0x1
#define REG_LD_BLK_HVNUM 0x2
#define REG_LD_HVGAIN 0x3
#define REG_LD_BKLIT_VLD 0x4
#define REG_LD_BKLIT_PARAM 0x5
#define REG_LD_LIT_GAIN_COMP 0x7
#define REG_LD_FRM_RST_POS 0x8
#define REG_LD_FRM_BL_START_POS 0x9
#define REG_LD_MISC_CTRL0 0xa
#define REG_LD_FRM_HBLAN_VHOLS 0xb
#define REG_LD_XLUT_DEMO_ROI_XPOS 0xc
#define REG_LD_XLUT_DEMO_ROI_YPOS 0xd
#define REG_LD_XLUT_DEMO_ROI_CTRL 0xe
/* each base has 16 address space */
/****** GXTVBB ******/
#define REG_LD_G_IDX_BASE 0x20
#define REG_LD_B_IDX_BASE 0x30
#define REG_LD_RGB_NRMW_BASE 0x40
#define REG_LD_LUT_HDG_BASE 0x50
#define REG_LD_LUT_VHK_BASE 0x60
#define REG_LD_LUT_VDG_BASE 0x70
#define REG_LD_BLK_HIDX_BASE 0x80
#define REG_LD_BLK_VIDX_BASE 0xa0
#define REG_LD_LUT_VHK_NEGPOS_BASE 0xc0
#define REG_LD_LUT_VHO_NEGPOS_BASE 0xd0
#define REG_LD_LUT_HHK_BASE 0xe0
#define REG_LD_REFLECT_DGR_BASE 0xf0
/* LD_CFG_BASE */
#define REG_LD_LUT_XDG_LEXT 0x6
/* each base has 16 address space */
/****** TXLX ******/
#define REG_LD_RGB_NRMW_BASE_TXLX 0x20
#define REG_LD_BLK_HIDX_BASE_TXLX 0x30
#define REG_LD_BLK_VIDX_BASE_TXLX 0x50
#define REG_LD_LUT_VHK_NEGPOS_BASE_TXLX 0x60
#define REG_LD_LUT_VHO_NEGPOS_BASE_TXLX 0x70
#define REG_LD_LUT_HHK_BASE_TXLX 0x80
#define REG_LD_REFLECT_DGR_BASE_TXLX 0x90
#define REG_LD_LUT_LEXT_BASE_TXLX 0xa0
#define REG_LD_LUT_HDG_BASE_TXLX 0x100
#define REG_LD_LUT_VDG_BASE_TXLX 0x180
#define REG_LD_LUT_VHK_BASE_TXLX 0x200
#define REG_LD_LUT_ID_BASE_TXLX 0x300
/* LD_CFG_BASE */
#define REG_LD_BLMAT_RAM_MISC 0xf
/*========================================*/
#define LD_STA_BIN_NUM 16
#define LD_STA_LEN_V 17
/* support maximum 16x4 regions for statistics (16+1) */
#define LD_STA_LEN_H 25
/* support maximum 16x4 regions for statistics (24+1)*/
#define LD_BLK_LEN_V 25
/* support maximum 16 led of each side left/right(16+4+4+1)*/
#define LD_BLK_LEN_H 33
/* support maximum 24 led of each side top/bot (24+4+4+1)*/
#define LD_LUT_LEN 32
#define LD_BLKHMAX 32
#define LD_BLKVMAX 32
#define LD_DATA_DEPTH 12
#define LD_DATA_MIN 10
#define LD_DATA_MAX 0xfff
extern int ldim_round(int ix, int ib);
extern void ldim_stts_en(unsigned int resolution, unsigned int pix_drop_mode,
unsigned int eol_en, unsigned int hist_mode, unsigned int lpf_en,
unsigned int rd_idx_auto_inc_mode, unsigned int one_ram_en);
extern void ldim_set_region(unsigned int resolution, unsigned int blk_height,
unsigned int blk_width, unsigned int row_start, unsigned int col_start,
unsigned int blk_hnum);
extern void LD_ConLDReg(struct LDReg_s *Reg);
extern void ld_fw_cfg_once(struct LDReg_s *nPRM);
extern void ldim_stts_read_region(unsigned int nrow, unsigned int ncol);
struct LDReg {
int reg_LD_pic_RowMax; /*u13*/
int reg_LD_pic_ColMax; /*u13*/
int reg_LD_pic_YUVsum[3];
/* only output u16*3, (internal ACC will be u32x3)*/
int reg_LD_pic_RGBsum[3];
/* Statistic options */
int reg_LD_STA_Vnum;
/*u8: statistic region number of V, maximum to (STA_LEN_V-1) (0~16)*/
int reg_LD_STA_Hnum;
/*u8: statistic region number of H, maximum to (STA_LEN_H-1) (0~24)*/
int reg_LD_BLK_Vnum;
/*u8: Maximum to 16*/
int reg_LD_BLK_Hnum;
/*u8: Maximum to 24*/
int reg_LD_STA1max_LPF;
/*u1: STA1max statistics on [1 2 1]/4 filtered results*/
int reg_LD_STA2max_LPF;
/*u1: STA2max statistics on [1 2 1]/4 filtered results*/
int reg_LD_STAhist_LPF;
/*u1: STAhist statistics on [1 2 1]/4 filtered results*/
int reg_LD_STA1max_Hdlt;
/* u2: (2^x) extra pixels into Max calculation*/
int reg_LD_STA1max_Vdlt;
/* u4: extra pixels into Max calculation vertically*/
int reg_LD_STA2max_Hdlt;
/* u2: (2^x) extra pixels into Max calculation*/
int reg_LD_STA2max_Vdlt;
/* u4: extra pixels into Max calculation vertically*/
int reg_LD_STA1max_Hidx[LD_STA_LEN_H]; /* U12* STA_LEN_H*/
int reg_LD_STA1max_Vidx[LD_STA_LEN_V]; /* u12x STA_LEN_V*/
int reg_LD_STA2max_Hidx[LD_STA_LEN_H]; /* U12* STA_LEN_H*/
int reg_LD_STA2max_Vidx[LD_STA_LEN_V]; /* u12x STA_LEN_V*/
int reg_LD_STAhist_mode;
/*u3: histogram statistics on XX separately 20bits*16bins:
*0: R-only,1:G-only 2:B-only 3:Y-only;
*4: MAX(R,G,B), 5/6/7: R&G&B
*/
int reg_LD_STAhist_pix_drop_mode;
/* u2:histogram statistics pixel drop mode:
* 0:no drop; 1:only statistic
* x%2=0; 2:only statistic x%4=0; 3: only statistic x%8=0;
*/
int reg_LD_STAhist_Hidx[LD_STA_LEN_H]; /* U12* STA_LEN_H*/
int reg_LD_STAhist_Vidx[LD_STA_LEN_V]; /* u12x STA_LEN_V*/
/***** FBC3 fw_hw_alg_frm *****/
int reg_ldfw_BLmax;/* maximum BL value*/
int reg_ldfw_blk_norm;
/*u8: normalization gain for blk number,
*1/blk_num= norm>>(rs+8), norm = (1<<(rs+8))/blk_num
*/
int reg_ldfw_blk_norm_rs;/*u3: 0~7, 1/blk_num= norm>>(rs+8) */
int reg_ldfw_sta_hdg_weight[8];
/* u8x8, weighting to each
* block's max to decide that block's ld.
*/
int reg_ldfw_sta_max_mode;
/* u2: maximum selection for
*components: 0: r_max, 1: g_max, 2: b_max; 3: max(r,g,b)
*/
int reg_ldfw_sta_max_hist_mode;
/* u2: mode of reference
* max/hist mode:0: MIN(max, hist), 1: MAX(max, hist)
* 2: (max+hist)/2, 3: (max(a,b)*3 + min(a,b))/4
*/
int reg_ldfw_hist_valid_rate;
/* u8, norm to 512 as "1", if hist_matrix[i]>(rate*histavg)>>9*/
int reg_ldfw_hist_valid_ofst;/*u8, hist valid bin upward offset*/
int reg_ldfw_sedglit_RL;/*u1: single edge lit right/bottom mode*/
int reg_ldfw_sf_thrd;/*u12: threshold of difference to enable the sf;*/
int reg_ldfw_boost_gain;
/* u8: boost gain for the region that
* is larger than the average, norm to 16 as "1"
*/
int reg_ldfw_tf_alpha_rate;
/*u8: rate to SFB_BL_matrix from
*last frame difference;
*/
int reg_ldfw_tf_alpha_ofst;
/*u8: ofset to alpha SFB_BL_matrix
*from last frame difference;
*/
int reg_ldfw_tf_disable_th;
/*u8: 4x is the threshod to disable
*tf to the alpha (SFB_BL_matrix from last frame difference;
*/
int reg_ldfw_blest_acmode;
/*u3: 0: est on BLmatrix;
*1: est on(BL-DC); 2: est on (BL-MIN);
*3: est on (BL-MAX) 4: 2048; 5:1024
*/
int reg_ldfw_sf_enable;
/*u1: enable signal for spatial filter on the tbl_matrix*/
int reg_ldfw_enable;
int reg_ldfw_sta_hdg_vflt;
int reg_ldfw_sta_norm;
int reg_ldfw_sta_norm_rs;
int reg_ldfw_tf_enable;
int reg_LD_LUT_Hdg_TXLX[8][32];
int reg_LD_LUT_Vdg_TXLX[8][32];
int reg_LD_LUT_VHk_TXLX[8][32];
int reg_LD_LUT_Id[16 * 24];
int reg_LD_LUT_Hdg_LEXT_TXLX[8];
int reg_LD_LUT_Vdg_LEXT_TXLX[8];
int reg_LD_LUT_VHk_LEXT_TXLX[8];
int reg_ldfw_boost_enable;
/*u1: enable signal for Boost
*filter on the tbl_matrix
*/
int ro_ldfw_bl_matrix_avg;/*u12: read-only register for bl_matrix*/
/* Backlit Modeling registers*/
int BL_matrix[LD_BLKREGNUM];
/* Define the RAM Matrix*/
int reg_LD_BackLit_Xtlk;
/*u1: 0 no block to block Xtalk model needed; 1: Xtalk model needed*/
int reg_LD_BackLit_mode;
/*u2: 0- LEFT/RIGHT Edge Lit; 1- Top/Bot Edge Lit; 2 - DirectLit
*modeled H/V independent; 3- DirectLit modeled HV Circle distribution
*/
int reg_LD_Reflect_Hnum;
/*u3: numbers of band reflection considered in Horizontal direction;
* 0~4
*/
int reg_LD_Reflect_Vnum;
/*u3: numbers of band reflection considered in Horizontal direction;
* 0~4
*/
int reg_LD_BkLit_curmod;
/*u1: 0: H/V separately, 1 Circle distribution*/
int reg_LD_BkLUT_Intmod;
/*u1: 0: linear interpolation, 1 cubical interpolation*/
int reg_LD_BkLit_Intmod;
/*u1: 0: linear interpolation, 1 cubical interpolation*/
int reg_LD_BkLit_LPFmod;
/*u3: 0: no LPF, 1:[1 14 1]/16;2:[1 6 1]/8; 3: [1 2 1]/4;
* 4:[9 14 9]/32 5/6/7: [5 6 5]/16;
*/
int reg_LD_BkLit_Celnum;
/*u8: 0: 1920~ 61*/
int reg_BL_matrix_AVG;
/*u12: DC of whole picture BL to be subtract from BL_matrix
* during modeling (Set by FW daynamically)
*/
int reg_BL_matrix_Compensate;
/*u12: DC of whole picture BL to be compensated back to
* Litfull after the model (Set by FW dynamically);
*/
int reg_LD_Reflect_Hdgr[20];
/*20*u6: cells 1~20 for H Gains of different dist of
* Left/Right;
*/
int reg_LD_Reflect_Vdgr[20];
/*20*u6: cells 1~20 for V Gains of different dist of Top/Bot;*/
int reg_LD_Reflect_Xdgr[4]; /*4*u6:*/
int reg_LD_Vgain; /*u12*/
int reg_LD_Hgain; /*u12*/
int reg_LD_Litgain; /*u12*/
int reg_LD_Litshft;
/*u3 right shif of bits for the all Lit's sum*/
int reg_LD_BkLit_valid[32];
/*u1x32: valid bits for the 32 cell Bklit to contribut to current
* position (refer to the backlit padding pattern)
*/
/* region division index 1 2 3 4 5(0) 6(1) 7(2)
* 8(3) 9(4) 10(5)11(6)12(7)13(8) 14(9)15(10) 16 17 18 19
*/
int reg_LD_BLK_Hidx[LD_BLK_LEN_H]; /* S14* BLK_LEN*/
int reg_LD_BLK_Vidx[LD_BLK_LEN_V]; /* S14* BLK_LEN*/
/* Define the RAM Matrix*/
int reg_LD_LUT_Hdg[LD_LUT_LEN]; /*u10*/
int reg_LD_LUT_Vdg[LD_LUT_LEN]; /*u10*/
int reg_LD_LUT_VHk[LD_LUT_LEN]; /*u10*/
/* VHk positive and negative side gain, normalized to 128
* as "1" 20150428
*/
int reg_LD_LUT_VHk_pos[32]; /* u8*/
int reg_LD_LUT_VHk_neg[32]; /* u8*/
int reg_LD_LUT_HHk[32];
/* u8 side gain for LED direction hdist gain for different LED*/
/* VHo possitive and negative side offset, use with LS, (x<<LS)*/
int reg_LD_LUT_VHo_pos[32]; /* s8*/
int reg_LD_LUT_VHo_neg[32]; /* s8*/
int reg_LD_LUT_VHo_LS;/* u3:0~6,left shift bits of VH0_pos/neg*/
/* adding three cells for left boundary extend during
* Cubic interpolation
*/
int reg_LD_LUT_Hdg_LEXT;
int reg_LD_LUT_Vdg_LEXT;
int reg_LD_LUT_VHk_LEXT;
/* adding demo window mode for LD for RGB lut compensation*/
int reg_LD_xlut_demo_roi_xstart;
/* u14 start col index of the region of interest*/
int reg_LD_xlut_demo_roi_xend;
/* u14 end col index of the region of interest*/
int reg_LD_xlut_demo_roi_ystart;
/* u14 start row index of the region of interest*/
int reg_LD_xlut_demo_roi_yend;
/* u14 end row index of the region of interest*/
int reg_LD_xlut_iroi_enable;
/* u1: enable rgb LUT remapping inside regon of interest:
* 0: no rgb remapping; 1: enable rgb remapping
*/
int reg_LD_xlut_oroi_enable;
/* u1: enable rgb LUT remapping outside regon of interest:
* 0: no rgb remapping; 1: enable rgb remapping
*/
/* Register used in RGB remapping*/
int reg_LD_RGBmapping_demo;
/*u2: 0 no demo mode 1: display BL_fulpel on RGB*/
int reg_LD_X_LUT_interp_mode[3];
/*U1 0: using linear interpolation between to neighbour LUT;
* 1: use the nearest LUT results
*/
int X_idx[1][16];
/* Changed to 16 Lits define 32 Bin LUT to save cost*/
int X_nrm[1][16];
/* Changed to 16 Lits define 32 Bin LUT to save cost*/
int X_lut[3][16][32];
/* Changed to 16 Lits define 32 Bin LUT to save cost*/
/* only do the Lit modleing on the AC part*/
int X_lut2[3][16][16];
int fw_LD_BLEst_ACmode;
/*u2: 0: est on BLmatrix; 1: est on (BL-DC);
* 2: est on (BL-MIN); 3: est on (BL-MAX)
*/
unsigned long *val_1;
unsigned long *bin_1;
unsigned long *val_2;
unsigned long *bin_2;
};
struct FW_DAT {
/* for temporary Firmware algorithm */
unsigned int *TF_BL_alpha;
unsigned int *last_YUVsum;
unsigned int *last_RGBsum;
unsigned int *last_STA1_MaxRGB;
unsigned int *SF_BL_matrix;
unsigned int *TF_BL_matrix;
unsigned int *TF_BL_matrix_2;
};
/* #define LDIM_STTS_HIST_REGION_IDX 0x1aa0 */
#define LOCAL_DIM_STATISTIC_EN_BIT 31
#define LOCAL_DIM_STATISTIC_EN_WID 1
#define EOL_EN_BIT 28
#define EOL_EN_WID 1
/* 0: 17 pix, 1: 9 pix, 2: 5 pix, 3: 3 pix, 4: 0 pix */
#define HOVLP_NUM_SEL_BIT 21
#define HOVLP_NUM_SEL_WID 2
#define LPF_BEFORE_STATISTIC_EN_BIT 20
#define LPF_BEFORE_STATISTIC_EN_WID 1
#define BLK_HV_POS_IDXS_BIT 16
#define BLK_HV_POS_IDXS_WID 4
#define RD_INDEX_INC_MODE_BIT 14
#define RD_INDEX_INC_MODE_WID 2
#define REGION_RD_SUB_INDEX_BIT 8
#define REGION_RD_SUB_INDEX_WID 4
#define REGION_RD_INDEX_BIT 0
#define REGION_RD_INDEX_WID 7
extern void ldim_set_matrix_ycbcr2rgb(void);
extern void ldim_set_matrix_rgb2ycbcr(int mode);
#endif

43
drivers/amlogic/media/vout/backlight/aml_ldim/ldim_func.c
View File

@@ -20,38 +20,27 @@
#include <linux/io.h>
#include <linux/mm.h>
#include <linux/mutex.h>
#include <linux/device.h>
#include <linux/timer.h>
#include <linux/delay.h>
#include <linux/major.h>
#include <linux/sched.h>
#include <linux/vmalloc.h>
#include <linux/types.h>
#include <linux/init.h>
#include <linux/slab.h>
#include <linux/module.h>
#include <linux/kernel.h>
#include <linux/device.h>
#include <linux/interrupt.h>
#include <linux/fs.h>
#include <linux/miscdevice.h>
#include <linux/platform_device.h>
#include <linux/moduleparam.h>
#include <linux/timer.h>
/* #include <mach/am_regs.h> */
#include <linux/amlogic/media/vfm/vframe.h>
#include <linux/spinlock.h>
#include <linux/amlogic/iomap.h>
#include "ldim_drv.h"
#include "ldim_func.h"
#include "ldim_reg.h"
#include <linux/amlogic/media/vout/lcd/aml_bl.h>
#include <linux/amlogic/media/vout/lcd/aml_ldim.h>
#include "ldim_drv.h"
#include "ldim_reg.h"
#ifndef MIN
#define MIN(a, b) ((a < b) ? a:b)
#endif
#define Wr(reg, val) Wr_reg(reg, val)
#define Rd(reg) Rd_reg(reg)
static int LD_STA1max_Hidx[25] = {
/* U12* 25 */
0, 480, 960, 1440, 1920, 2400, 2880,
@@ -759,7 +748,7 @@ void LD_MtxInv(int *oDat, int *iDat, int nRow, int nCol)
}
}
static int Remap_lut[16][32] = {
int LD_remap_lut[16][32] = {
{
128, 258, 387, 517, 646, 776, 905, 1034,
1163, 1291, 1420, 1548, 1676, 1804, 1932, 2059,
@@ -859,7 +848,7 @@ static int Remap_lut[16][32] = {
};
static int Remap_lut2[16][16] = {};
void LD_LUTInit(struct LDReg *Reg)
void LD_LUTInit(struct LDReg_s *Reg)
{
int i, j, k, t;
struct aml_bl_drv_s *bl_drv = aml_bl_get_driver();
@@ -868,8 +857,8 @@ void LD_LUTInit(struct LDReg *Reg)
case BL_CHIP_TXLX:
for (i = 0; i < 16; i++) {
for (j = 0; j < 16; j++)
Remap_lut2[i][j] = Remap_lut[i][j * 2] |
(Remap_lut[i][j * 2 + 1] << 16);
Remap_lut2[i][j] = LD_remap_lut[i][j * 2] |
(LD_remap_lut[i][j * 2 + 1] << 16);
}
/* Emulate the FW to set the LUTs */
for (k = 0; k < 16; k++) {
@@ -892,9 +881,9 @@ void LD_LUTInit(struct LDReg *Reg)
Reg->X_idx[0][k] = 4095 - 256 * k;
Reg->X_nrm[0][k] = 8;
for (t = 0; t < 32; t++) {
Reg->X_lut[0][k][t] = Remap_lut[k][t];
Reg->X_lut[1][k][t] = Remap_lut[k][t];
Reg->X_lut[2][k][t] = Remap_lut[k][t];
Reg->X_lut[0][k][t] = LD_remap_lut[k][t];
Reg->X_lut[1][k][t] = LD_remap_lut[k][t];
Reg->X_lut[2][k][t] = LD_remap_lut[k][t];
}
}
break;
@@ -903,7 +892,7 @@ void LD_LUTInit(struct LDReg *Reg)
}
}
static void ConLDReg_GXTVBB(struct LDReg *Reg)
static void ConLDReg_GXTVBB(struct LDReg_s *Reg)
{
unsigned int T = 0;
unsigned int Vnum = 0;
@@ -1147,7 +1136,7 @@ static void ConLDReg_GXTVBB(struct LDReg *Reg)
}
static void ConLDReg_TXLX(struct LDReg *Reg)
static void ConLDReg_TXLX(struct LDReg_s *Reg)
{
int i, j;
unsigned int T = 0;
@@ -1402,7 +1391,7 @@ static void ConLDReg_TXLX(struct LDReg *Reg)
#if 1
void LD_ConLDReg(struct LDReg *Reg)
void LD_ConLDReg(struct LDReg_s *Reg)
{
struct aml_bl_drv_s *bl_drv = aml_bl_get_driver();
@@ -1422,7 +1411,7 @@ void LD_ConLDReg(struct LDReg *Reg)
/* 0: left/top side,
* 1: right/bot side, others: non-one-side
*/
void ld_fw_cfg_once(struct LDReg *nPRM)
void ld_fw_cfg_once(struct LDReg_s *nPRM)
{
int k, dlt, j, i;
int hofst = 4;

42
drivers/amlogic/media/vout/backlight/aml_ldim/ldim_func.h
View File

@@ -1,42 +0,0 @@
/*
* drivers/amlogic/media/vout/backlight/aml_ldim/ldim_func.h
*
* Copyright (C) 2017 Amlogic, Inc. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
*/
#include <linux/cdev.h>
#include <linux/amlogic/iomap.h>
#define Wr_reg_bits(adr, val, start, len) \
aml_vcbus_update_bits(adr, ((1<<len)-1)<<start, val<<start)
/* #define Rd_reg_bits(adr, start, len) \
* (aml_read_vcbus(adr)&(((1<<len)-1)<<start))
*/
#define Rd_reg_bits(adr, start, len) \
((aml_read_vcbus(adr)>>start)&((1<<len)-1))
extern int ldim_round(int ix, int ib);
extern void ldim_stts_en(unsigned int resolution, unsigned int pix_drop_mode,
unsigned int eol_en, unsigned int hist_mode, unsigned int lpf_en,
unsigned int rd_idx_auto_inc_mode, unsigned int one_ram_en);
extern void ldim_set_region(unsigned int resolution, unsigned int blk_height,
unsigned int blk_width, unsigned int row_start, unsigned int col_start,
unsigned int blk_hnum);
extern void LD_ConLDReg(struct LDReg *Reg);
extern void ld_fw_cfg_once(struct LDReg *nPRM);
extern void ldim_stts_read_region(unsigned int nrow, unsigned int ncol);
extern void ldim_set_matrix_ycbcr2rgb(void);
extern void ldim_set_matrix_rgb2ycbcr(int mode);

278
drivers/amlogic/media/vout/backlight/aml_ldim/ldim_reg.h
View File

@@ -15,42 +15,266 @@
*
*/
#define LDIM_BL_ADDR_PORT 0x144e
#define LDIM_BL_DATA_PORT 0x144f
#include <linux/amlogic/iomap.h>
#include <linux/amlogic/media/utils/vdec_reg.h>
#define LDIM_BL_ADDR_PORT 0x144e
#define LDIM_BL_DATA_PORT 0x144f
#define ASSIST_SPARE8_REG1 0x1f58
/*gxtvbb new add*/
#define LDIM_STTS_CTRL0 0x1ac1
#define LDIM_STTS_GCLK_CTRL0 0x1ac0
#define LDIM_STTS_WIDTHM1_HEIGHTM1 0x1ac2
#define LDIM_STTS_MATRIX_COEF00_01 0x1ac3
#define LDIM_STTS_MATRIX_COEF02_10 0x1ac4
#define LDIM_STTS_MATRIX_COEF11_12 0x1ac5
#define LDIM_STTS_MATRIX_COEF20_21 0x1ac6
#define LDIM_STTS_MATRIX_COEF22 0x1ac7
#define LDIM_STTS_MATRIX_OFFSET0_1 0x1ac8
#define LDIM_STTS_MATRIX_OFFSET2 0x1ac9
#define LDIM_STTS_MATRIX_PRE_OFFSET0_1 0x1aca
#define LDIM_STTS_CTRL0 0x1ac1
#define LDIM_STTS_GCLK_CTRL0 0x1ac0
#define LDIM_STTS_WIDTHM1_HEIGHTM1 0x1ac2
#define LDIM_STTS_MATRIX_COEF00_01 0x1ac3
#define LDIM_STTS_MATRIX_COEF02_10 0x1ac4
#define LDIM_STTS_MATRIX_COEF11_12 0x1ac5
#define LDIM_STTS_MATRIX_COEF20_21 0x1ac6
#define LDIM_STTS_MATRIX_COEF22 0x1ac7
#define LDIM_STTS_MATRIX_OFFSET0_1 0x1ac8
#define LDIM_STTS_MATRIX_OFFSET2 0x1ac9
#define LDIM_STTS_MATRIX_PRE_OFFSET0_1 0x1aca
#define LDIM_STTS_MATRIX_PRE_OFFSET2 0x1acb
#define LDIM_STTS_MATRIX_HL_COLOR 0x1acc
#define LDIM_STTS_MATRIX_PROBE_POS 0x1acd
#define LDIM_STTS_MATRIX_HL_COLOR 0x1acc
#define LDIM_STTS_MATRIX_PROBE_POS 0x1acd
#define LDIM_STTS_MATRIX_PROBE_COLOR 0x1ace
#define LDIM_STTS_HIST_REGION_IDX 0x1ad0
#define LDIM_STTS_HIST_SET_REGION 0x1ad1
#define LDIM_STTS_HIST_READ_REGION 0x1ad2
#define LDIM_STTS_HIST_START_RD_REGION 0x1ad3
#define LDIM_STTS_HIST_REGION_IDX 0x1ad0
#define LDIM_STTS_HIST_SET_REGION 0x1ad1
#define LDIM_STTS_HIST_READ_REGION 0x1ad2
#define LDIM_STTS_HIST_START_RD_REGION 0x1ad3
#define VDIN0_HIST_CTRL 0x1230
#define VDIN0_HIST_CTRL 0x1230
static inline void W_APB_BIT(unsigned int reg,
unsigned int value,
unsigned int start,
unsigned int len)
/*** GXTVBB & TXLX common use register*/
/* each base has 16 address space */
#define REG_LD_CFG_BASE 0x00
#define REG_LD_RGB_IDX_BASE 0x10
#define REG_LD_RGB_LUT_BASE 0x2000
#define REG_LD_MATRIX_BASE 0x3000
/* LD_CFG_BASE */
#define REG_LD_FRM_SIZE 0x0
#define REG_LD_RGB_MOD 0x1
#define REG_LD_BLK_HVNUM 0x2
#define REG_LD_HVGAIN 0x3
#define REG_LD_BKLIT_VLD 0x4
#define REG_LD_BKLIT_PARAM 0x5
#define REG_LD_LIT_GAIN_COMP 0x7
#define REG_LD_FRM_RST_POS 0x8
#define REG_LD_FRM_BL_START_POS 0x9
#define REG_LD_MISC_CTRL0 0xa
#define REG_LD_FRM_HBLAN_VHOLS 0xb
#define REG_LD_XLUT_DEMO_ROI_XPOS 0xc
#define REG_LD_XLUT_DEMO_ROI_YPOS 0xd
#define REG_LD_XLUT_DEMO_ROI_CTRL 0xe
/* each base has 16 address space */
/****** GXTVBB ******/
#define REG_LD_G_IDX_BASE 0x20
#define REG_LD_B_IDX_BASE 0x30
#define REG_LD_RGB_NRMW_BASE 0x40
#define REG_LD_LUT_HDG_BASE 0x50
#define REG_LD_LUT_VHK_BASE 0x60
#define REG_LD_LUT_VDG_BASE 0x70
#define REG_LD_BLK_HIDX_BASE 0x80
#define REG_LD_BLK_VIDX_BASE 0xa0
#define REG_LD_LUT_VHK_NEGPOS_BASE 0xc0
#define REG_LD_LUT_VHO_NEGPOS_BASE 0xd0
#define REG_LD_LUT_HHK_BASE 0xe0
#define REG_LD_REFLECT_DGR_BASE 0xf0
/* LD_CFG_BASE */
#define REG_LD_LUT_XDG_LEXT 0x6
/* each base has 16 address space */
/****** TXLX ******/
#define REG_LD_RGB_NRMW_BASE_TXLX 0x20
#define REG_LD_BLK_HIDX_BASE_TXLX 0x30
#define REG_LD_BLK_VIDX_BASE_TXLX 0x50
#define REG_LD_LUT_VHK_NEGPOS_BASE_TXLX 0x60
#define REG_LD_LUT_VHO_NEGPOS_BASE_TXLX 0x70
#define REG_LD_LUT_HHK_BASE_TXLX 0x80
#define REG_LD_REFLECT_DGR_BASE_TXLX 0x90
#define REG_LD_LUT_LEXT_BASE_TXLX 0xa0
#define REG_LD_LUT_HDG_BASE_TXLX 0x100
#define REG_LD_LUT_VDG_BASE_TXLX 0x180
#define REG_LD_LUT_VHK_BASE_TXLX 0x200
#define REG_LD_LUT_ID_BASE_TXLX 0x300
/* LD_CFG_BASE */
#define REG_LD_BLMAT_RAM_MISC 0xf
/* #define LDIM_STTS_HIST_REGION_IDX 0x1aa0 */
#define LOCAL_DIM_STATISTIC_EN_BIT 31
#define LOCAL_DIM_STATISTIC_EN_WID 1
#define EOL_EN_BIT 28
#define EOL_EN_WID 1
/* 0: 17 pix, 1: 9 pix, 2: 5 pix, 3: 3 pix, 4: 0 pix */
#define HOVLP_NUM_SEL_BIT 21
#define HOVLP_NUM_SEL_WID 2
#define LPF_BEFORE_STATISTIC_EN_BIT 20
#define LPF_BEFORE_STATISTIC_EN_WID 1
#define BLK_HV_POS_IDXS_BIT 16
#define BLK_HV_POS_IDXS_WID 4
#define RD_INDEX_INC_MODE_BIT 14
#define RD_INDEX_INC_MODE_WID 2
#define REGION_RD_SUB_INDEX_BIT 8
#define REGION_RD_SUB_INDEX_WID 4
#define REGION_RD_INDEX_BIT 0
#define REGION_RD_INDEX_WID 7
#ifndef CONFIG_AMLOGIC_MEDIA_RDMA
#define LDIM_VSYNC_RDMA 0
#else
#define LDIM_VSYNC_RDMA 0
#endif
#define Wr_reg_bits(adr, val, start, len) \
aml_vcbus_update_bits(adr, ((1<<len)-1)<<start, val<<start)
#define Rd_reg_bits(adr, start, len) \
((aml_read_vcbus(adr)>>start)&((1<<len)-1))
#define Wr_reg(reg, val) aml_write_vcbus(reg, val)
#define Rd_reg(reg) aml_read_vcbus(reg)
static inline void LDIM_WR_32Bits(unsigned int addr, unsigned int data)
{
aml_write_vcbus(reg, ((aml_read_vcbus(reg) &
~(((1L << (len)) - 1) << (start))) |
(((value) & ((1L << (len)) - 1)) << (start))));
#if (LDIM_VSYNC_RDMA == 1)
VSYNC_WR_MPEG_REG(LDIM_BL_ADDR_PORT, addr);
VSYNC_WR_MPEG_REG(LDIM_BL_DATA_PORT, data);
#else
aml_write_vcbus(LDIM_BL_ADDR_PORT, addr);
aml_write_vcbus(LDIM_BL_DATA_PORT, data);
#endif
}
static inline unsigned int LDIM_RD_32Bits(unsigned int addr)
{
aml_write_vcbus(LDIM_BL_ADDR_PORT, addr);
return aml_read_vcbus(LDIM_BL_DATA_PORT);
}
static inline void LDIM_wr_reg_bits(unsigned int addr, unsigned int val,
unsigned int start, unsigned int len)
{
unsigned int data;
data = LDIM_RD_32Bits(addr);
data = (data & (~((1 << len) - 1)<<start)) |
((val & ((1 << len) - 1)) << start);
LDIM_WR_32Bits(addr, data);
}
static inline void LDIM_WR_BASE_LUT(unsigned int base, unsigned int *pData,
unsigned int size_t, unsigned int len)
{
unsigned int i;
unsigned int addr, data;
unsigned int mask, subCnt;
unsigned int cnt;
addr = base;/* (base<<4); */
mask = (1 << size_t)-1;
subCnt = 32 / size_t;
cnt = 0;
data = 0;
aml_write_vcbus(LDIM_BL_ADDR_PORT, addr);
for (i = 0; i < len; i++) {
data = data | ((pData[i] & mask) << (size_t *cnt));
cnt++;
if (cnt == subCnt) {
aml_write_vcbus(LDIM_BL_DATA_PORT, data);
data = 0;
cnt = 0;
addr++;
}
}
if (cnt != 0)
aml_write_vcbus(LDIM_BL_DATA_PORT, data);
}
static inline void LDIM_RD_BASE_LUT(unsigned int base, unsigned int *pData,
unsigned int size_t, unsigned int len)
{
unsigned int i;
unsigned int addr, data;
unsigned int mask, subCnt;
unsigned int cnt;
addr = base;/* (base<<4); */
mask = (1 << size_t)-1;
subCnt = 32 / size_t;
cnt = 0;
data = 0;
aml_write_vcbus(LDIM_BL_ADDR_PORT, addr);
for (i = 0; i < len; i++) {
cnt++;
if (cnt == subCnt) {
data = aml_read_vcbus(LDIM_BL_DATA_PORT);
pData[i-1] = data & mask;
pData[i] = mask & (data >> size_t);
data = 0;
cnt = 0;
addr++;
}
}
if (cnt != 0)
data = aml_read_vcbus(LDIM_BL_DATA_PORT);
}
static inline void LDIM_RD_BASE_LUT_2(unsigned int base, unsigned int *pData,
unsigned int size_t, unsigned int len)
{
unsigned int i;
unsigned int addr, data;
unsigned int mask, subCnt;
unsigned int cnt;
addr = base;/* (base<<4); */
mask = (1 << size_t)-1;
subCnt = 2;
cnt = 0;
data = 0;
aml_write_vcbus(LDIM_BL_ADDR_PORT, addr);
for (i = 0; i < len; i++) {
cnt++;
if (cnt == subCnt) {
data = aml_read_vcbus(LDIM_BL_DATA_PORT);
pData[i-1] = data & mask;
pData[i] = mask & (data >> size_t);
data = 0;
cnt = 0;
addr++;
}
}
if (cnt != 0)
data = aml_read_vcbus(LDIM_BL_DATA_PORT);
}
static inline void LDIM_WR_BASE_LUT_DRT(int base, int *pData, int len)
{
int i;
int addr;
addr = base;/*(base<<4)*/
#if (LDIM_VSYNC_RDMA == 1)
VSYNC_WR_MPEG_REG(LDIM_BL_ADDR_PORT, addr);
for (i = 0; i < len; i++)
VSYNC_WR_MPEG_REG(LDIM_BL_DATA_PORT, pData[i]);
#else
aml_write_vcbus(LDIM_BL_ADDR_PORT, addr);
for (i = 0; i < len; i++)
aml_write_vcbus(LDIM_BL_DATA_PORT, pData[i]);
#endif
}

24
include/linux/amlogic/media/vout/lcd/aml_ldim.h
View File

@@ -24,6 +24,30 @@
#include <linux/amlogic/media/vout/lcd/aml_bl.h>
#include <linux/spi/spi.h>
/*#define LDIM_DEBUG_INFO*/
#define LDIMPR(fmt, args...) pr_info("ldim: "fmt"", ## args)
#define LDIMERR(fmt, args...) pr_err("ldim: error: "fmt"", ## args)
#define LD_STA_BIN_NUM 16
#define LD_STA_LEN_V 17
/* support maximum 16x4 regions for statistics (16+1) */
#define LD_STA_LEN_H 25
/* support maximum 16x4 regions for statistics (24+1)*/
#define LD_BLK_LEN_V 25
/* support maximum 16 led of each side left/right(16+4+4+1)*/
#define LD_BLK_LEN_H 33
/* support maximum 24 led of each side top/bot (24+4+4+1)*/
#define LD_LUT_LEN 32
#define LD_BLKHMAX 32
#define LD_BLKVMAX 32
#define LD_DATA_DEPTH 12
#define LD_DATA_MIN 10
#define LD_DATA_MAX 0xfff
extern int dirspi_write(struct spi_device *spi, u8 *buf, int len);
extern int dirspi_read(struct spi_device *spi, u8 *buf, int len);
extern void dirspi_start(struct spi_device *spi);

337
include/linux/amlogic/media/vout/lcd/ldim_alg.h Normal file
View File

@@ -0,0 +1,337 @@
/*
* include/linux/amlogic/media/vout/lcd/ldim_alg.h
*
* Copyright (C) 2017 Amlogic, Inc. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
*/
#ifndef _INC_AML_LDIM_ALG_H_
#define _INC_AML_LDIM_ALG_H_
#include <linux/amlogic/media/vout/lcd/aml_ldim.h>
/*========================================*/
#define LD_STA_BIN_NUM 16
#define LD_STA_LEN_V 17
/* support maximum 16x4 regions for statistics (16+1) */
#define LD_STA_LEN_H 25
/* support maximum 16x4 regions for statistics (24+1)*/
#define LD_BLK_LEN_V 25
/* support maximum 16 led of each side left/right(16+4+4+1)*/
#define LD_BLK_LEN_H 33
/* support maximum 24 led of each side top/bot (24+4+4+1)*/
#define LD_LUT_LEN 32
#define LD_BLKHMAX 32
#define LD_BLKVMAX 32
struct LDReg_s {
int reg_LD_pic_RowMax; /*u13*/
int reg_LD_pic_ColMax; /*u13*/
int reg_LD_pic_YUVsum[3];
/* only output u16*3, (internal ACC will be u32x3)*/
int reg_LD_pic_RGBsum[3];
/* Statistic options */
int reg_LD_STA_Vnum;
/*u8: statistic region number of V, maximum to (STA_LEN_V-1) (0~16)*/
int reg_LD_STA_Hnum;
/*u8: statistic region number of H, maximum to (STA_LEN_H-1) (0~24)*/
int reg_LD_BLK_Vnum;
/*u8: Maximum to 16*/
int reg_LD_BLK_Hnum;
/*u8: Maximum to 24*/
int reg_LD_STA1max_LPF;
/*u1: STA1max statistics on [1 2 1]/4 filtered results*/
int reg_LD_STA2max_LPF;
/*u1: STA2max statistics on [1 2 1]/4 filtered results*/
int reg_LD_STAhist_LPF;
/*u1: STAhist statistics on [1 2 1]/4 filtered results*/
int reg_LD_STA1max_Hdlt;
/* u2: (2^x) extra pixels into Max calculation*/
int reg_LD_STA1max_Vdlt;
/* u4: extra pixels into Max calculation vertically*/
int reg_LD_STA2max_Hdlt;
/* u2: (2^x) extra pixels into Max calculation*/
int reg_LD_STA2max_Vdlt;
/* u4: extra pixels into Max calculation vertically*/
int reg_LD_STA1max_Hidx[LD_STA_LEN_H]; /* U12* STA_LEN_H*/
int reg_LD_STA1max_Vidx[LD_STA_LEN_V]; /* u12x STA_LEN_V*/
int reg_LD_STA2max_Hidx[LD_STA_LEN_H]; /* U12* STA_LEN_H*/
int reg_LD_STA2max_Vidx[LD_STA_LEN_V]; /* u12x STA_LEN_V*/
int reg_LD_STAhist_mode;
/*u3: histogram statistics on XX separately 20bits*16bins:
*0: R-only,1:G-only 2:B-only 3:Y-only;
*4: MAX(R,G,B), 5/6/7: R&G&B
*/
int reg_LD_STAhist_pix_drop_mode;
/* u2:histogram statistics pixel drop mode:
* 0:no drop; 1:only statistic
* x%2=0; 2:only statistic x%4=0; 3: only statistic x%8=0;
*/
int reg_LD_STAhist_Hidx[LD_STA_LEN_H]; /* U12* STA_LEN_H*/
int reg_LD_STAhist_Vidx[LD_STA_LEN_V]; /* u12x STA_LEN_V*/
/***** FBC3 fw_hw_alg_frm *****/
int reg_ldfw_BLmax;/* maximum BL value*/
int reg_ldfw_blk_norm;
/*u8: normalization gain for blk number,
*1/blk_num= norm>>(rs+8), norm = (1<<(rs+8))/blk_num
*/
int reg_ldfw_blk_norm_rs;/*u3: 0~7, 1/blk_num= norm>>(rs+8) */
int reg_ldfw_sta_hdg_weight[8];
/* u8x8, weighting to each
* block's max to decide that block's ld.
*/
int reg_ldfw_sta_max_mode;
/* u2: maximum selection for
*components: 0: r_max, 1: g_max, 2: b_max; 3: max(r,g,b)
*/
int reg_ldfw_sta_max_hist_mode;
/* u2: mode of reference
* max/hist mode:0: MIN(max, hist), 1: MAX(max, hist)
* 2: (max+hist)/2, 3: (max(a,b)*3 + min(a,b))/4
*/
int reg_ldfw_hist_valid_rate;
/* u8, norm to 512 as "1", if hist_matrix[i]>(rate*histavg)>>9*/
int reg_ldfw_hist_valid_ofst;/*u8, hist valid bin upward offset*/
int reg_ldfw_sedglit_RL;/*u1: single edge lit right/bottom mode*/
int reg_ldfw_sf_thrd;/*u12: threshold of difference to enable the sf;*/
int reg_ldfw_boost_gain;
/* u8: boost gain for the region that
* is larger than the average, norm to 16 as "1"
*/
int reg_ldfw_tf_alpha_rate;
/*u8: rate to SFB_BL_matrix from
*last frame difference;
*/
int reg_ldfw_tf_alpha_ofst;
/*u8: ofset to alpha SFB_BL_matrix
*from last frame difference;
*/
int reg_ldfw_tf_disable_th;
/*u8: 4x is the threshod to disable
*tf to the alpha (SFB_BL_matrix from last frame difference;
*/
int reg_ldfw_blest_acmode;
/*u3: 0: est on BLmatrix;
*1: est on(BL-DC); 2: est on (BL-MIN);
*3: est on (BL-MAX) 4: 2048; 5:1024
*/
int reg_ldfw_sf_enable;
/*u1: enable signal for spatial filter on the tbl_matrix*/
int reg_ldfw_enable;
int reg_ldfw_sta_hdg_vflt;
int reg_ldfw_sta_norm;
int reg_ldfw_sta_norm_rs;
int reg_ldfw_tf_enable;
int reg_LD_LUT_Hdg_TXLX[8][32];
int reg_LD_LUT_Vdg_TXLX[8][32];
int reg_LD_LUT_VHk_TXLX[8][32];
int reg_LD_LUT_Id[16 * 24];
int reg_LD_LUT_Hdg_LEXT_TXLX[8];
int reg_LD_LUT_Vdg_LEXT_TXLX[8];
int reg_LD_LUT_VHk_LEXT_TXLX[8];
int reg_ldfw_boost_enable;
/*u1: enable signal for Boost
*filter on the tbl_matrix
*/
int ro_ldfw_bl_matrix_avg;/*u12: read-only register for bl_matrix*/
/* Backlit Modeling registers*/
int BL_matrix[LD_BLKREGNUM];
/* Define the RAM Matrix*/
int reg_LD_BackLit_Xtlk;
/*u1: 0 no block to block Xtalk model needed; 1: Xtalk model needed*/
int reg_LD_BackLit_mode;
/*u2: 0- LEFT/RIGHT Edge Lit; 1- Top/Bot Edge Lit; 2 - DirectLit
*modeled H/V independent; 3- DirectLit modeled HV Circle distribution
*/
int reg_LD_Reflect_Hnum;
/*u3: numbers of band reflection considered in Horizontal direction;
* 0~4
*/
int reg_LD_Reflect_Vnum;
/*u3: numbers of band reflection considered in Horizontal direction;
* 0~4
*/
int reg_LD_BkLit_curmod;
/*u1: 0: H/V separately, 1 Circle distribution*/
int reg_LD_BkLUT_Intmod;
/*u1: 0: linear interpolation, 1 cubical interpolation*/
int reg_LD_BkLit_Intmod;
/*u1: 0: linear interpolation, 1 cubical interpolation*/
int reg_LD_BkLit_LPFmod;
/*u3: 0: no LPF, 1:[1 14 1]/16;2:[1 6 1]/8; 3: [1 2 1]/4;
* 4:[9 14 9]/32 5/6/7: [5 6 5]/16;
*/
int reg_LD_BkLit_Celnum;
/*u8: 0: 1920~ 61*/
int reg_BL_matrix_AVG;
/*u12: DC of whole picture BL to be subtract from BL_matrix
* during modeling (Set by FW daynamically)
*/
int reg_BL_matrix_Compensate;
/*u12: DC of whole picture BL to be compensated back to
* Litfull after the model (Set by FW dynamically);
*/
int reg_LD_Reflect_Hdgr[20];
/*20*u6: cells 1~20 for H Gains of different dist of
* Left/Right;
*/
int reg_LD_Reflect_Vdgr[20];
/*20*u6: cells 1~20 for V Gains of different dist of Top/Bot;*/
int reg_LD_Reflect_Xdgr[4]; /*4*u6:*/
int reg_LD_Vgain; /*u12*/
int reg_LD_Hgain; /*u12*/
int reg_LD_Litgain; /*u12*/
int reg_LD_Litshft;
/*u3 right shif of bits for the all Lit's sum*/
int reg_LD_BkLit_valid[32];
/*u1x32: valid bits for the 32 cell Bklit to contribut to current
* position (refer to the backlit padding pattern)
*/
/* region division index 1 2 3 4 5(0) 6(1) 7(2)
* 8(3) 9(4) 10(5)11(6)12(7)13(8) 14(9)15(10) 16 17 18 19
*/
int reg_LD_BLK_Hidx[LD_BLK_LEN_H]; /* S14* BLK_LEN*/
int reg_LD_BLK_Vidx[LD_BLK_LEN_V]; /* S14* BLK_LEN*/
/* Define the RAM Matrix*/
int reg_LD_LUT_Hdg[LD_LUT_LEN]; /*u10*/
int reg_LD_LUT_Vdg[LD_LUT_LEN]; /*u10*/
int reg_LD_LUT_VHk[LD_LUT_LEN]; /*u10*/
/* VHk positive and negative side gain, normalized to 128
* as "1" 20150428
*/
int reg_LD_LUT_VHk_pos[32]; /* u8*/
int reg_LD_LUT_VHk_neg[32]; /* u8*/
int reg_LD_LUT_HHk[32];
/* u8 side gain for LED direction hdist gain for different LED*/
/* VHo possitive and negative side offset, use with LS, (x<<LS)*/
int reg_LD_LUT_VHo_pos[32]; /* s8*/
int reg_LD_LUT_VHo_neg[32]; /* s8*/
int reg_LD_LUT_VHo_LS;/* u3:0~6,left shift bits of VH0_pos/neg*/
/* adding three cells for left boundary extend during
* Cubic interpolation
*/
int reg_LD_LUT_Hdg_LEXT;
int reg_LD_LUT_Vdg_LEXT;
int reg_LD_LUT_VHk_LEXT;
/* adding demo window mode for LD for RGB lut compensation*/
int reg_LD_xlut_demo_roi_xstart;
/* u14 start col index of the region of interest*/
int reg_LD_xlut_demo_roi_xend;
/* u14 end col index of the region of interest*/
int reg_LD_xlut_demo_roi_ystart;
/* u14 start row index of the region of interest*/
int reg_LD_xlut_demo_roi_yend;
/* u14 end row index of the region of interest*/
int reg_LD_xlut_iroi_enable;
/* u1: enable rgb LUT remapping inside regon of interest:
* 0: no rgb remapping; 1: enable rgb remapping
*/
int reg_LD_xlut_oroi_enable;
/* u1: enable rgb LUT remapping outside regon of interest:
* 0: no rgb remapping; 1: enable rgb remapping
*/
/* Register used in RGB remapping*/
int reg_LD_RGBmapping_demo;
/*u2: 0 no demo mode 1: display BL_fulpel on RGB*/
int reg_LD_X_LUT_interp_mode[3];
/*U1 0: using linear interpolation between to neighbour LUT;
* 1: use the nearest LUT results
*/
int X_idx[1][16];
/* Changed to 16 Lits define 32 Bin LUT to save cost*/
int X_nrm[1][16];
/* Changed to 16 Lits define 32 Bin LUT to save cost*/
int X_lut[3][16][32];
/* Changed to 16 Lits define 32 Bin LUT to save cost*/
/* only do the Lit modleing on the AC part*/
int X_lut2[3][16][16];
int fw_LD_BLEst_ACmode;
/*u2: 0: est on BLmatrix; 1: est on (BL-DC);
* 2: est on (BL-MIN); 3: est on (BL-MAX)
*/
};
struct FW_DAT_s {
/* for temporary Firmware algorithm */
unsigned int *TF_BL_alpha;
unsigned int *last_YUVsum;
unsigned int *last_RGBsum;
unsigned int *last_STA1_MaxRGB;
unsigned int *SF_BL_matrix;
unsigned int *TF_BL_matrix;
unsigned int *TF_BL_matrix_2;
};
struct ldim_fw_para_s {
char ver_str[20];
unsigned char ver_num;
unsigned char hist_col;
unsigned char hist_row;
struct LDReg_s *nPRM;
struct FW_DAT_s *FDat;
unsigned long *bl_remap_curve; /* size: 16 */
unsigned long *fw_LD_Whist; /* size: 16 */
unsigned long fw_LD_ThSF_l;
unsigned long fw_LD_ThTF_l;
unsigned long boost_gain; /*norm 256 to 1,T960 finally use*/
unsigned long TF_alpha; /*256;*/
unsigned long lpf_gain; /* [0~128~256], norm 128 as 1*/
unsigned long boost_gain_neg;
unsigned long alpha_delta;
/*LPF tap: 0-lpf_res 41,1-lpf_res 114,...*/
unsigned long lpf_res; /* 1024/9*9 = 13,LPF_method=3 */
unsigned long rgb_base;
unsigned int ov_gain;
/*unsigned int incr_dif_gain; //16 */
unsigned long avg_gain;
unsigned int fw_rgb_diff_th;
unsigned int max_luma;
unsigned int lmh_avg_TH;/*for woman flicker*/
unsigned int fw_TF_sum_th;/*20180530*/
unsigned int LPF_method;
unsigned int LD_TF_STEP_TH;
unsigned int TF_step_method;
unsigned int TF_FRESH_BL;
unsigned int TF_BLK_FRESH_BL;
unsigned int side_blk_diff_th;
unsigned int bbd_th;
unsigned char bbd_detect_en;
unsigned char diff_blk_luma_en;
unsigned char Sf_bypass, Boost_light_bypass;
unsigned char Lpf_bypass, Ld_remap_bypass;
unsigned char black_frm;
/* for debug print */
unsigned char fw_hist_print;/*20180525*/
unsigned int fw_print_frequent;/*20180606,print every 8 frame*/
unsigned int Dbprint_lv;
void (*fw_alg_frm)(struct ldim_fw_para_s *fw_para,
unsigned int *max_matrix, unsigned int *hist_matrix);
};
extern struct ldim_fw_para_s *aml_ldim_get_fw_para(void);
#endif