shinys000114/linux
1
0
Fork 0
mirror of https://github.com/hardkernel/linux.git synced 2026-06-08 20:07:46 +09:00
Code Issues Packages Projects Releases Wiki Activity

arm64: dts: rockchip: set ACLK_VOP to 500M for rk3568

Browse Source 
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Change-Id: Ib96868c3a5bdebd9144d957e567318e57991cc3e
This commit is contained in:
Elaine Zhang
2020-12-16 10:53:28 +08:00
committed by Tao Huang
parent 74cc51c949
commit 6866058796
1 changed files with 4 additions and 2 deletions
Download Patch File Download Diff File Expand all files Collapse all files

6
arch/arm64/boot/dts/rockchip/rk3568.dtsi
View File

@@ -589,7 +589,8 @@
<&cru CLK_I2S0_8CH_RX_SRC>, <&cru CLK_I2S1_8CH_TX_SRC>,
<&cru CLK_I2S1_8CH_RX_SRC>, <&cru CLK_I2S2_2CH_SRC>,
<&cru CLK_I2S2_2CH_SRC>, <&cru CLK_I2S3_2CH_RX_SRC>,
<&cru CLK_I2S3_2CH_TX_SRC>, <&cru MCLK_SPDIF_8CH_SRC>;
<&cru CLK_I2S3_2CH_TX_SRC>, <&cru MCLK_SPDIF_8CH_SRC>,
<&cru ACLK_VOP>;
assigned-clock-rates =
<32768>, <300000000>,
<300000000>, <200000000>,
@@ -607,7 +608,8 @@
<1188000000>, <1188000000>,
<1188000000>, <1188000000>,
<1188000000>, <1188000000>,
<1188000000>, <1188000000>;
<1188000000>, <1188000000>,
<500000000>;
assigned-clock-parents =
<&pmucru CLK_RTC32K_FRAC>, <&cru PLL_GPLL>,
<&cru PLL_GPLL>;