mirror of
https://github.com/hardkernel/linux.git
synced 2026-06-10 04:48:04 +09:00
Merge commit '83ecc44c3702093c5857e4756e391c3310c461e9'
* commit '83ecc44c3702093c5857e4756e391c3310c461e9': video: rockchip: rga3: fix power off in isr-thread when job is running video: rockchip: rga3: fix hardware state has been cleared after timeout arm64: dts: rockchip: add rk3358m automotive board support ARM: configs: rk3506: Add gzip support for initrd drm/rockchip: gem: Set size of the allocated object when create gem mfd: rk806: Support power-supply grouping to enter sleep mode UPSTREAM: pinctrl: rockchip: fix pinmux reset in rockchip_pmx_set usb: dwc3: core: Add shutdown support mtd: spinand: HIKSEMI: Fix MFR id to 0x3C Change-Id: I5f405c401a0fba92ce4fc052b91ef5584a0c2300
This commit is contained in:
Tao Huang
@@ -8,7 +8,6 @@ CONFIG_HIGH_RES_TIMERS=y
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CONFIG_PREEMPT=y
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CONFIG_LOG_BUF_SHIFT=14
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CONFIG_BLK_DEV_INITRD=y
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# CONFIG_RD_GZIP is not set
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# CONFIG_RD_BZIP2 is not set
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# CONFIG_RD_LZMA is not set
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||||
# CONFIG_RD_XZ is not set
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@@ -47,6 +47,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-rock-pi-e.dtb
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dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-roc-cc.dtb
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dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-roc-pc.dtb
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dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3358-evb-ddr3-v10-linux.dtb
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dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3358m-automotive-ddr3-v11-linux.dtb
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dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3358m-vehicle-v10.dtb
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dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3368-evb-act8846.dtb
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dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3368-geekbox.dtb
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@@ -0,0 +1,60 @@
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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* Copyright (c) 2024 Rockchip Electronics Co., Ltd.
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*
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*/
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/dts-v1/;
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#include "rk3358m-automotive-ddr3-v11.dtsi"
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#include "rk3358-linux.dtsi"
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/ {
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model = "Rockchip RK3358M AUTOMOTIVE DDR3 V11 board";
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compatible = "rockchip,rk3358m-automotive-ddr3-v11-linux", "rockchip,px30", "rockchip,rk3358";
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chosen {
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bootargs = "earlycon=uart8250,mmio32,0xff160000 console=ttyFIQ0 skip_initramfs root=/dev/rd0 rootfstype=squashfs init=/sbin/init";
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};
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/*
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* This memory mapping range represents a 512MB memory space
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* starting from the physical address 0x00000000
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* where:
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* 0x00000000 - base address
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* 0x0 - address cells
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* 0x0 - size cells
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* 0x20000000 - memory size (512MB)
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* Note: The actual available memory size depends on the hardware design
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* and may differ from the 512MB defined here.
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* Adjustment is needed based on the specific hardware memory configuration.
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*/
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memory: memory {
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device_type = "memory";
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reg = <0x00000000 0x0 0x0 0x20000000>;
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};
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ramdisk: ramdisk {
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compatible = "rockchip,ramdisk";
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memory-region = <&ramdisk_r>;
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};
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reserved-memory {
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#address-cells = <2>;
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#size-cells = <2>;
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ranges;
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atf: atf@0 {
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reg = <0x0 0x00000 0x0 0x200000>;
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no-map;
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};
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mmc_dma_buf@200000 {
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reg = <0x0 0x200000 0x0 0x200000>;
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};
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ramdisk_r: ramdisk_r@4000000 {
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/* Do not exceed 132MB which used by TEE */
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reg = <0x0 0x4000000 0x0 0x2000000>;
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};
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};
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};
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730
arch/arm64/boot/dts/rockchip/rk3358m-automotive-ddr3-v11.dtsi
Normal file
730
arch/arm64/boot/dts/rockchip/rk3358m-automotive-ddr3-v11.dtsi
Normal file
@@ -0,0 +1,730 @@
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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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||||
/*
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* Copyright (c) 2024 Rockchip Electronics Co., Ltd
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*
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*/
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/pinctrl/rockchip.h>
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#include <dt-bindings/input/input.h>
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#include <dt-bindings/display/drm_mipi_dsi.h>
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#include "rk3358.dtsi"
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||||
|
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/ {
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||||
adc-keys {
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compatible = "adc-keys";
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io-channels = <&saradc 2>;
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io-channel-names = "buttons";
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||||
poll-interval = <100>;
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||||
keyup-threshold-microvolt = <1800000>;
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||||
|
||||
vol-down-key {
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linux,code = <KEY_VOLUMEDOWN>;
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||||
label = "volume down";
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||||
press-threshold-microvolt = <300000>;
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||||
};
|
||||
|
||||
vol-up-key {
|
||||
linux,code = <KEY_VOLUMEUP>;
|
||||
label = "volume up";
|
||||
press-threshold-microvolt = <17000>;
|
||||
};
|
||||
};
|
||||
|
||||
backlight: backlight {
|
||||
compatible = "pwm-backlight";
|
||||
pwms = <&pwm3 0 10000000 0>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&lcd0_pwren &lcd0_rst>;
|
||||
enable-gpios = <&gpio1 RK_PD6 GPIO_ACTIVE_HIGH>;
|
||||
brightness-levels = <
|
||||
0 1 2 3 4 5 6 7
|
||||
8 9 10 11 12 13 14 15
|
||||
16 17 18 19 20 21 22 23
|
||||
24 25 26 27 28 29 30 31
|
||||
32 33 34 35 36 37 38 39
|
||||
40 41 42 43 44 45 46 47
|
||||
48 49 50 51 52 53 54 55
|
||||
56 57 58 59 60 61 62 63
|
||||
64 65 66 67 68 69 70 71
|
||||
72 73 74 75 76 77 78 79
|
||||
80 81 82 83 84 85 86 87
|
||||
88 89 90 91 92 93 94 95
|
||||
96 97 98 99 100 101 102 103
|
||||
104 105 106 107 108 109 110 111
|
||||
112 113 114 115 116 117 118 119
|
||||
120 121 122 123 124 125 126 127
|
||||
128 129 130 131 132 133 134 135
|
||||
136 137 138 139 140 141 142 143
|
||||
144 145 146 147 148 149 150 151
|
||||
152 153 154 155 156 157 158 159
|
||||
160 161 162 163 164 165 166 167
|
||||
168 169 170 171 172 173 174 175
|
||||
176 177 178 179 180 181 182 183
|
||||
184 185 186 187 188 189 190 191
|
||||
192 193 194 195 196 197 198 199
|
||||
200 201 202 203 204 205 206 207
|
||||
208 209 210 211 212 213 214 215
|
||||
216 217 218 219 220 221 222 223
|
||||
224 225 226 227 228 229 230 231
|
||||
232 233 234 235 236 237 238 239
|
||||
240 241 242 243 244 245 246 247
|
||||
248 249 250 251 252 253 254 255>;
|
||||
default-brightness-level = <60>;
|
||||
};
|
||||
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||||
/* The THine 827-Q (rgb to dual lvds) don't need driver */
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||||
panel_rgb: panel-rgb {
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||||
compatible = "simple-panel";
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||||
#address-cells = <1>;
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||||
#size-cells = <0>;
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||||
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||||
pinctrl-names = "default";
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||||
pinctrl-0 = <&pwdn_rgb>; /* This the pwdn of THine-827-Q */
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||||
power-supply = <&vcc3v3_lcd>;
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||||
backlight = <&backlight>;
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||||
enable-gpios = <&gpio1 RK_PD4 GPIO_ACTIVE_HIGH>;
|
||||
reset-gpios = <&gpio1 RK_PD7 GPIO_ACTIVE_LOW>;
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||||
prepare-delay-ms = <0>;
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||||
reset-delay-ms = <0>;
|
||||
init-delay-ms = <0>;
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||||
enable-delay-ms = <5>;
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||||
disable-delay-ms = <10>;
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||||
unprepare-delay-ms = <0>;
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||||
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||||
width-mm = <292>;
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||||
height-mm = <109>;
|
||||
|
||||
bus-format = <MEDIA_BUS_FMT_RGB888_1X24>;
|
||||
|
||||
display-timings {
|
||||
native-mode = <&timing1>;
|
||||
|
||||
timing1: timing1 {
|
||||
clock-frequency = <88200000>;
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||||
hactive = <1920>;
|
||||
vactive = <720>;
|
||||
hfront-porch = <40>;
|
||||
hsync-len = <20>;
|
||||
hback-porch = <24>;
|
||||
vfront-porch = <5>;
|
||||
vsync-len = <4>;
|
||||
vback-porch = <4>;
|
||||
hsync-active = <0>;
|
||||
vsync-active = <0>;
|
||||
de-active = <0>;
|
||||
pixelclk-active = <1>;
|
||||
};
|
||||
};
|
||||
|
||||
ports {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
port@0 {
|
||||
reg = <0>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
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||||
panel_in_rgb: endpoint@0 {
|
||||
reg = <0>;
|
||||
remote-endpoint = <&rgb_out_panel>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
rk809_sound: rk809-sound {
|
||||
status = "okay";
|
||||
compatible = "rockchip,multicodecs-card";
|
||||
rockchip,card-name = "rockchip-rk809";
|
||||
poll-interval = <100>;
|
||||
rockchip,format = "i2s";
|
||||
rockchip,mclk-fs = <256>;
|
||||
rockchip,cpu = <&i2s1_2ch>;
|
||||
rockchip,codec = <&rk809_codec>;
|
||||
};
|
||||
|
||||
vcc5v0_sys: vcc5v0-sys {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "vcc5v0_sys";
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-min-microvolt = <5000000>;
|
||||
regulator-max-microvolt = <5000000>;
|
||||
};
|
||||
|
||||
vcc_phy: vcc-phy {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "vcc_phy";
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
};
|
||||
|
||||
/* It's just for compatibility with SDK script checks. */
|
||||
wireless-bluetooth {
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
|
||||
&cpu0 {
|
||||
cpu-supply = <&vdd_arm>;
|
||||
};
|
||||
|
||||
&dfi {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&display_subsystem {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&dmc {
|
||||
center-supply = <&vdd_logic>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&emmc {
|
||||
bus-width = <8>;
|
||||
cap-mmc-highspeed;
|
||||
mmc-hs200-1_8v;
|
||||
supports-emmc;
|
||||
disable-wp;
|
||||
non-removable;
|
||||
num-slots = <1>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&gmac {
|
||||
phy-supply = <&vcc_phy>;
|
||||
clock_in_out = "output";
|
||||
snps,reset-gpio = <&gpio2 12 GPIO_ACTIVE_LOW>;
|
||||
snps,reset-active-low;
|
||||
snps,reset-delays-us = <0 50000 50000>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&gpu {
|
||||
mali-supply = <&vdd_logic>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&hevc {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&hevc_mmu {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&i2c0 {
|
||||
status = "okay";
|
||||
clock-frequency = <400000>;
|
||||
|
||||
rk809: pmic@20 {
|
||||
compatible = "rockchip,rk809";
|
||||
reg = <0x20>;
|
||||
interrupt-parent = <&gpio0>;
|
||||
interrupts = <7 IRQ_TYPE_LEVEL_LOW>;
|
||||
pinctrl-names = "default", "pmic-sleep",
|
||||
"pmic-power-off", "pmic-reset";
|
||||
pinctrl-0 = <&pmic_int>;
|
||||
pinctrl-1 = <&soc_slppin_slp>, <&rk817_slppin_slp>;
|
||||
pinctrl-2 = <&soc_slppin_gpio>, <&rk817_slppin_pwrdn>;
|
||||
pinctrl-3 = <&soc_slppin_rst>, <&rk817_slppin_rst>;
|
||||
rockchip,system-power-controller;
|
||||
wakeup-source;
|
||||
#clock-cells = <1>;
|
||||
clock-output-names = "rk808-clkout1", "rk808-clkout2";
|
||||
//fb-inner-reg-idxs = <2>;
|
||||
/* 1: rst regs (default in codes), 0: rst the pmic */
|
||||
pmic-reset-func = <1>;
|
||||
|
||||
vcc1-supply = <&vcc5v0_sys>;
|
||||
vcc2-supply = <&vcc5v0_sys>;
|
||||
vcc3-supply = <&vcc5v0_sys>;
|
||||
vcc4-supply = <&vcc5v0_sys>;
|
||||
vcc5-supply = <&vcc3v3_sys>;
|
||||
vcc6-supply = <&vcc3v3_sys>;
|
||||
vcc7-supply = <&vcc3v3_sys>;
|
||||
vcc8-supply = <&vcc3v3_sys>;
|
||||
vcc9-supply = <&vcc5v0_sys>;
|
||||
|
||||
pwrkey {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
pinctrl_rk8xx: pinctrl_rk8xx {
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
|
||||
rk817_slppin_null: rk817_slppin_null {
|
||||
pins = "gpio_slp";
|
||||
function = "pin_fun0";
|
||||
};
|
||||
|
||||
rk817_slppin_slp: rk817_slppin_slp {
|
||||
pins = "gpio_slp";
|
||||
function = "pin_fun1";
|
||||
};
|
||||
|
||||
rk817_slppin_pwrdn: rk817_slppin_pwrdn {
|
||||
pins = "gpio_slp";
|
||||
function = "pin_fun2";
|
||||
};
|
||||
|
||||
rk817_slppin_rst: rk817_slppin_rst {
|
||||
pins = "gpio_slp";
|
||||
function = "pin_fun3";
|
||||
};
|
||||
};
|
||||
|
||||
regulators {
|
||||
vdd_logic: DCDC_REG1 {
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-min-microvolt = <950000>;
|
||||
regulator-max-microvolt = <1350000>;
|
||||
regulator-ramp-delay = <6001>;
|
||||
regulator-initial-mode = <0x2>;
|
||||
regulator-name = "vdd_logic";
|
||||
regulator-state-mem {
|
||||
regulator-on-in-suspend;
|
||||
regulator-suspend-microvolt = <950000>;
|
||||
};
|
||||
};
|
||||
|
||||
vdd_arm: DCDC_REG2 {
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-min-microvolt = <950000>;
|
||||
regulator-max-microvolt = <1350000>;
|
||||
regulator-ramp-delay = <6001>;
|
||||
regulator-initial-mode = <0x2>;
|
||||
regulator-name = "vdd_arm";
|
||||
regulator-state-mem {
|
||||
regulator-off-in-suspend;
|
||||
regulator-suspend-microvolt = <950000>;
|
||||
};
|
||||
};
|
||||
|
||||
vcc_ddr: DCDC_REG3 {
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-name = "vcc_ddr";
|
||||
regulator-initial-mode = <0x2>;
|
||||
regulator-state-mem {
|
||||
regulator-on-in-suspend;
|
||||
};
|
||||
};
|
||||
|
||||
vcc_3v3: DCDC_REG4 {
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
regulator-initial-mode = <0x2>;
|
||||
regulator-name = "vcc_3v3";
|
||||
regulator-state-mem {
|
||||
regulator-on-in-suspend;
|
||||
regulator-suspend-microvolt = <3300000>;
|
||||
};
|
||||
};
|
||||
|
||||
vcc_1v0: LDO_REG1 {
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-min-microvolt = <1000000>;
|
||||
regulator-max-microvolt = <1000000>;
|
||||
regulator-name = "vcc_1v0";
|
||||
regulator-state-mem {
|
||||
regulator-on-in-suspend;
|
||||
regulator-suspend-microvolt = <1000000>;
|
||||
};
|
||||
};
|
||||
|
||||
vcc_1v8: LDO_REG2 {
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
|
||||
regulator-name = "vcc_1v8";
|
||||
regulator-state-mem {
|
||||
regulator-on-in-suspend;
|
||||
regulator-suspend-microvolt = <1800000>;
|
||||
};
|
||||
};
|
||||
|
||||
vdd_1v0: LDO_REG3 {
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-min-microvolt = <1000000>;
|
||||
regulator-max-microvolt = <1000000>;
|
||||
|
||||
regulator-name = "vdd_1v0";
|
||||
regulator-state-mem {
|
||||
regulator-on-in-suspend;
|
||||
regulator-suspend-microvolt = <1000000>;
|
||||
};
|
||||
};
|
||||
|
||||
vcc3v3_pmu: LDO_REG4 {
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
|
||||
regulator-name = "vcc3v3_pmu";
|
||||
regulator-state-mem {
|
||||
regulator-on-in-suspend;
|
||||
regulator-suspend-microvolt = <3000000>;
|
||||
|
||||
};
|
||||
};
|
||||
|
||||
vcc3v3_ser: LDO_REG5 {
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
|
||||
regulator-name = "vcc3v3_ser";
|
||||
regulator-state-mem {
|
||||
regulator-on-in-suspend;
|
||||
regulator-suspend-microvolt = <3300000>;
|
||||
};
|
||||
};
|
||||
|
||||
vcc3v3_deser: LDO_REG6 {
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
regulator-boot-off;
|
||||
|
||||
regulator-name = "vcc3v3_deser";
|
||||
regulator-state-mem {
|
||||
regulator-off-in-suspend;
|
||||
regulator-suspend-microvolt = <3300000>;
|
||||
|
||||
};
|
||||
};
|
||||
|
||||
vcc1v8_thc: LDO_REG7 {
|
||||
regulator-boot-on;
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
|
||||
regulator-name = "vcc1v8_thc";
|
||||
regulator-state-mem {
|
||||
regulator-off-in-suspend;
|
||||
regulator-suspend-microvolt = <1800000>;
|
||||
};
|
||||
};
|
||||
|
||||
vcc1v8_ser: LDO_REG8 {
|
||||
regulator-boot-on;
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
|
||||
regulator-name = "vcc1v8_ser";
|
||||
regulator-state-mem {
|
||||
regulator-on-in-suspend;
|
||||
regulator-suspend-microvolt = <1800000>;
|
||||
};
|
||||
};
|
||||
|
||||
vdd1v2_ser: LDO_REG9 {
|
||||
regulator-boot-on;
|
||||
regulator-min-microvolt = <1200000>;
|
||||
regulator-max-microvolt = <1200000>;
|
||||
|
||||
regulator-name = "vdd1v2_ser";
|
||||
regulator-state-mem {
|
||||
regulator-off-in-suspend;
|
||||
regulator-suspend-microvolt = <1200000>;
|
||||
};
|
||||
};
|
||||
|
||||
vcc3v3_sys: DCDC_REG5 {
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
regulator-name = "vcc3v3_sys";
|
||||
regulator-state-mem {
|
||||
regulator-on-in-suspend;
|
||||
regulator-suspend-microvolt = <3300000>;
|
||||
};
|
||||
};
|
||||
|
||||
vcc5v0_host: SWITCH_REG1 {
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-name = "vcc5v0_host";
|
||||
};
|
||||
|
||||
vcc3v3_lcd: SWITCH_REG2 {
|
||||
regulator-boot-on;
|
||||
regulator-name = "vcc3v3_lcd";
|
||||
};
|
||||
};
|
||||
|
||||
rk809_codec: codec {
|
||||
#sound-dai-cells = <0>;
|
||||
compatible = "rockchip,rk809-codec", "rockchip,rk817-codec";
|
||||
clocks = <&cru SCLK_I2S1_OUT>;
|
||||
clock-names = "mclk";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&i2s1_2ch_mclk>;
|
||||
hp-volume = <20>;
|
||||
spk-volume = <3>;
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&i2c1 {
|
||||
status = "okay";
|
||||
clock-frequency = <400000>;
|
||||
|
||||
/* These are relatively safe rise/fall times; TODO: measure */
|
||||
i2c-scl-falling-time-ns = <50>;
|
||||
i2c-scl-rising-time-ns = <300>;
|
||||
};
|
||||
|
||||
&i2c2 {
|
||||
status = "okay";
|
||||
clock-frequency = <400000>;
|
||||
};
|
||||
|
||||
&i2s1_2ch {
|
||||
status = "okay";
|
||||
#sound-dai-cells = <0>;
|
||||
};
|
||||
|
||||
&io_domains {
|
||||
status = "okay";
|
||||
|
||||
vccio1-supply = <&vcc_3v3>;
|
||||
vccio2-supply = <&vcc_3v3>;
|
||||
vccio3-supply = <&vcc_3v3>;
|
||||
vccio4-supply = <&vcc3v3_pmu>;
|
||||
vccio5-supply = <&vcc3v3_pmu>;
|
||||
};
|
||||
|
||||
&isp_mmu {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&mipi_dphy_rx0 {
|
||||
status = "okay";
|
||||
|
||||
ports {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
port@0 {
|
||||
reg = <0>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
mipi_in_ucam: endpoint@1 {
|
||||
reg = <1>;
|
||||
// remote-endpoint = <&ucam_out>;
|
||||
data-lanes = <1 2>;
|
||||
};
|
||||
};
|
||||
|
||||
port@1 {
|
||||
reg = <1>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
dphy_rx0_out: endpoint@0 {
|
||||
reg = <0>;
|
||||
remote-endpoint = <&isp0_mipi_in>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&mpp_srv {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&pinctrl {
|
||||
lcd {
|
||||
lcd0_pwren: lcd0-pwren {
|
||||
rockchip,pins = <1 RK_PD6 RK_FUNC_GPIO &pcfg_output_high>;
|
||||
};
|
||||
lcd0_rst: lcd0-rst {
|
||||
rockchip,pins = <1 RK_PD7 RK_FUNC_GPIO &pcfg_output_high>;
|
||||
};
|
||||
pwdn_rgb: pwdn-rgb {
|
||||
rockchip,pins = <1 RK_PD4 RK_FUNC_GPIO &pcfg_output_high>;
|
||||
};
|
||||
};
|
||||
|
||||
pmic {
|
||||
pmic_int: pmic_int {
|
||||
rockchip,pins =
|
||||
<0 RK_PA7 RK_FUNC_GPIO &pcfg_pull_up>;
|
||||
};
|
||||
|
||||
soc_slppin_gpio: soc_slppin_gpio {
|
||||
rockchip,pins =
|
||||
<0 RK_PA4 RK_FUNC_GPIO &pcfg_output_low>;
|
||||
};
|
||||
|
||||
soc_slppin_slp: soc_slppin_slp {
|
||||
rockchip,pins =
|
||||
<0 RK_PA4 1 &pcfg_pull_none>;
|
||||
};
|
||||
|
||||
soc_slppin_rst: soc_slppin_rst {
|
||||
rockchip,pins =
|
||||
<0 RK_PA4 2 &pcfg_pull_none>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&pmu_io_domains {
|
||||
status = "okay";
|
||||
|
||||
pmuio1-supply = <&vcc3v3_pmu>;
|
||||
pmuio2-supply = <&vcc3v3_pmu>;
|
||||
};
|
||||
|
||||
&pwm1 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&pwm3 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&rgb {
|
||||
status = "okay";
|
||||
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
/delete-property/ phys;
|
||||
/delete-property/ phy-names;
|
||||
|
||||
pinctrl-0 = <&lcdc_m0_rgb_pins>;
|
||||
pinctrl-1 = <&lcdc_m0_sleep_pins>;
|
||||
|
||||
ports {
|
||||
port@1 {
|
||||
reg = <1>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
rgb_out_panel: endpoint@0 {
|
||||
reg = <0>;
|
||||
remote-endpoint = <&panel_in_rgb>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&rgb_in_vopb {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&rgb_in_vopl {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&rk_rga {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&rkisp1 {
|
||||
status = "okay";
|
||||
|
||||
port {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
isp0_mipi_in: endpoint@0 {
|
||||
reg = <0>;
|
||||
remote-endpoint = <&dphy_rx0_out>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&route_rgb {
|
||||
connect = <&vopb_out_rgb>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&saradc {
|
||||
status = "okay";
|
||||
vref-supply = <&vcc_1v8>;
|
||||
};
|
||||
|
||||
&spi0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&tsadc {
|
||||
pinctrl-names = "gpio", "otpout";
|
||||
pinctrl-0 = <&tsadc_otp_gpio>;
|
||||
pinctrl-1 = <&tsadc_otp_out>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&u2phy {
|
||||
status = "okay";
|
||||
|
||||
u2phy_host: host-port {
|
||||
status = "okay";
|
||||
phy-supply = <&vcc5v0_host>;
|
||||
};
|
||||
|
||||
u2phy_otg: otg-port {
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
|
||||
&usb20_otg {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usb_host0_ehci {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usb_host0_ohci {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&vdpu {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&vepu {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&vopb {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&vopb_mmu {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&vopl {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&vopl_mmu {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&vpu_mmu {
|
||||
status = "okay";
|
||||
};
|
||||
@@ -67,8 +67,6 @@ static int rockchip_gem_iommu_map(struct rockchip_gem_object *rk_obj)
|
||||
|
||||
iommu_flush_iotlb_all(private->domain);
|
||||
|
||||
rk_obj->size = ret;
|
||||
|
||||
return 0;
|
||||
|
||||
err_remove_node:
|
||||
@@ -730,6 +728,7 @@ rockchip_gem_create_with_handle(struct drm_file *file_priv,
|
||||
return ERR_CAST(rk_obj);
|
||||
|
||||
obj = &rk_obj->base;
|
||||
rk_obj->size = size;
|
||||
|
||||
/*
|
||||
* allocate a id of idr table where the obj is registered
|
||||
@@ -862,6 +861,7 @@ rockchip_gem_prime_import_sg_table(struct drm_device *drm,
|
||||
goto err_free_rk_obj;
|
||||
}
|
||||
|
||||
rk_obj->size = attach->dmabuf->size;
|
||||
rk_obj->num_pages = rk_obj->base.size >> PAGE_SHIFT;
|
||||
rk_obj->pages = drm_calloc_large(rk_obj->num_pages, sizeof(*rk_obj->pages));
|
||||
if (!rk_obj->pages) {
|
||||
|
||||
@@ -214,7 +214,7 @@ static const struct reg_field rk806_reg_fields[] = {
|
||||
[NLDO3_VSEL_CTR_SEL] = REG_FIELD(0x6a, 0, 1),
|
||||
/* SLEEP_VSEL_CTR_SEL4 */
|
||||
[PLDO4_VSEL_CTR_SEL] = REG_FIELD(0x6d, 4, 5),
|
||||
[PLDO3_VSEL_CTR_SEL] = REG_FIELD(0x6d, 0, 0),
|
||||
[PLDO3_VSEL_CTR_SEL] = REG_FIELD(0x6d, 0, 1),
|
||||
[PLDO2_VSEL_CTR_SEL] = REG_FIELD(0x6c, 4, 5),
|
||||
[PLDO1_VSEL_CTR_SEL] = REG_FIELD(0x6c, 0, 1),
|
||||
/* SLEEP_VSEL_CTR_SEL5 */
|
||||
@@ -820,6 +820,22 @@ static int rk806_parse_dt(struct rk806 *rk806)
|
||||
dev_info(dev, "vb-shutdown-sequence missing!\n");
|
||||
}
|
||||
|
||||
pdata->dvs_control_suspend = devm_kzalloc(dev,
|
||||
RK806_ID_END * sizeof(int),
|
||||
GFP_KERNEL);
|
||||
if (!pdata->dvs_control_suspend)
|
||||
return -EINVAL;
|
||||
|
||||
pdata->support_dvs_control_suspend = 1;
|
||||
ret = device_property_read_u32_array(dev,
|
||||
"dvs-suspend-control-by",
|
||||
pdata->dvs_control_suspend,
|
||||
RK806_ID_END);
|
||||
if (ret) {
|
||||
pdata->support_dvs_control_suspend = 0;
|
||||
dev_info(dev, "dvs-suspend-control-by missing!\n");
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
||||
@@ -10,7 +10,7 @@
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/mtd/spinand.h>
|
||||
|
||||
#define SPINAND_MFR_HIKSEMI 0x52
|
||||
#define SPINAND_MFR_HIKSEMI 0x3C
|
||||
|
||||
static SPINAND_OP_VARIANTS(read_cache_variants,
|
||||
SPINAND_PAGE_READ_FROM_CACHE_QUADIO_OP(0, 2, NULL, 0),
|
||||
|
||||
@@ -4220,8 +4220,10 @@ static int rockchip_pmx_set(struct pinctrl_dev *pctldev, unsigned selector,
|
||||
|
||||
if (ret && cnt) {
|
||||
/* revert the already done pin settings */
|
||||
for (cnt--; cnt >= 0 && !data[cnt].func; cnt--)
|
||||
for (cnt--; cnt >= 0; cnt--) {
|
||||
bank = pin_to_bank(info, pins[cnt]);
|
||||
rockchip_set_mux(bank, pins[cnt] - bank->pin_base, 0);
|
||||
}
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
@@ -1178,6 +1178,8 @@ static int rk806_regulator_probe(struct platform_device *pdev)
|
||||
static int __maybe_unused rk806_suspend(struct device *dev)
|
||||
{
|
||||
struct rk806 *rk806 = dev_get_drvdata(dev->parent);
|
||||
struct rk806_platform_data *pdata = rk806->pdata;
|
||||
int value;
|
||||
int i;
|
||||
|
||||
rk806_field_write(rk806, RST_FUN, 0x00);
|
||||
@@ -1186,10 +1188,35 @@ static int __maybe_unused rk806_suspend(struct device *dev)
|
||||
for (i = RK806_ID_DCDC1; i < RK806_ID_END; i++)
|
||||
rk806_field_write(rk806, BUCK1_VSEL_CTR_SEL + i, CTR_BY_NO_EFFECT);
|
||||
|
||||
rk806_field_write(rk806, PWRCTRL1_FUN, PWRCTRL_DVS_FUN);
|
||||
if (!pdata->dvs_control_suspend || !pdata->support_dvs_control_suspend) {
|
||||
rk806_field_write(rk806, PWRCTRL1_FUN, PWRCTRL_DVS_FUN);
|
||||
|
||||
for (i = RK806_ID_DCDC1; i < RK806_ID_END; i++)
|
||||
rk806_field_write(rk806, BUCK1_VSEL_CTR_SEL + i, CTR_BY_PWRCTRL1);
|
||||
for (i = RK806_ID_DCDC1; i < RK806_ID_END; i++)
|
||||
rk806_field_write(rk806, BUCK1_VSEL_CTR_SEL + i, CTR_BY_PWRCTRL1);
|
||||
} else {
|
||||
for (i = 0; i <= RK806_ID_PLDO6 - RK806_ID_PLDO1; i++) {
|
||||
value = rk806_field_read(rk806, PLDO1_ON_VSEL + i);
|
||||
rk806_field_write(rk806, PLDO1_SLP_VSEL + i, value);
|
||||
}
|
||||
|
||||
for (i = RK806_ID_DCDC1; i <= RK806_ID_NLDO5; i++)
|
||||
rk806_field_write(rk806, BUCK1_VSEL_CTR_SEL + i,
|
||||
pdata->dvs_control_suspend[i]);
|
||||
rk806_field_write(rk806, PLDO1_VSEL_CTR_SEL, pdata->dvs_control_suspend[RK806_ID_PLDO6]);
|
||||
rk806_field_write(rk806, PLDO2_VSEL_CTR_SEL, pdata->dvs_control_suspend[RK806_ID_PLDO1]);
|
||||
rk806_field_write(rk806, PLDO3_VSEL_CTR_SEL, pdata->dvs_control_suspend[RK806_ID_PLDO2]);
|
||||
rk806_field_write(rk806, PLDO4_VSEL_CTR_SEL, pdata->dvs_control_suspend[RK806_ID_PLDO3]);
|
||||
rk806_field_write(rk806, PLDO5_VSEL_CTR_SEL, pdata->dvs_control_suspend[RK806_ID_PLDO4]);
|
||||
rk806_field_write(rk806, PLDO6_VSEL_CTR_SEL, pdata->dvs_control_suspend[RK806_ID_PLDO5]);
|
||||
|
||||
for (i = RK806_ID_DCDC1; i < RK806_ID_END; i++) {
|
||||
if (pdata->dvs_control_suspend[i] == CTR_BY_PWRCTRL2)
|
||||
rk806_field_write(rk806, PWRCTRL2_FUN, PWRCTRL_DVS_FUN);
|
||||
if (pdata->dvs_control_suspend[i] == CTR_BY_PWRCTRL3)
|
||||
rk806_field_write(rk806, PWRCTRL3_FUN, PWRCTRL_DVS_FUN);
|
||||
}
|
||||
rk806_field_write(rk806, PWRCTRL1_FUN, PWRCTRL_SLP_FUN);
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
@@ -1203,6 +1230,9 @@ static int __maybe_unused rk806_resume(struct device *dev)
|
||||
rk806_field_write(rk806, BUCK1_VSEL_CTR_SEL + i, CTR_BY_NO_EFFECT);
|
||||
|
||||
rk806_field_write(rk806, PWRCTRL1_FUN, PWRCTRL_NULL_FUN);
|
||||
rk806_field_write(rk806, PWRCTRL2_FUN, PWRCTRL_NULL_FUN);
|
||||
rk806_field_write(rk806, PWRCTRL3_FUN, PWRCTRL_NULL_FUN);
|
||||
|
||||
rk806_field_write(rk806, RST_FUN, 0x01);
|
||||
|
||||
return 0;
|
||||
|
||||
@@ -2103,6 +2103,14 @@ static int dwc3_remove(struct platform_device *pdev)
|
||||
return 0;
|
||||
}
|
||||
|
||||
static void dwc3_shutdown(struct platform_device *pdev)
|
||||
{
|
||||
struct device *dev = &pdev->dev;
|
||||
|
||||
if (of_device_is_compatible(dev->of_node, "rockchip,rk3576-dwc3"))
|
||||
dwc3_remove(pdev);
|
||||
}
|
||||
|
||||
#ifdef CONFIG_PM
|
||||
static int dwc3_core_init_for_resume(struct dwc3 *dwc)
|
||||
{
|
||||
@@ -2418,6 +2426,7 @@ MODULE_DEVICE_TABLE(acpi, dwc3_acpi_match);
|
||||
static struct platform_driver dwc3_driver = {
|
||||
.probe = dwc3_probe,
|
||||
.remove = dwc3_remove,
|
||||
.shutdown = dwc3_shutdown,
|
||||
.driver = {
|
||||
.name = "dwc3",
|
||||
.of_match_table = of_match_ptr(of_dwc3_match),
|
||||
|
||||
@@ -3120,23 +3120,35 @@ static int rga2_read_status(struct rga_job *job, struct rga_scheduler_t *schedul
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int rga2_irq(struct rga_scheduler_t *scheduler)
|
||||
static void rga2_clear_intr(struct rga_scheduler_t *scheduler)
|
||||
{
|
||||
struct rga_job *job = scheduler->running_job;
|
||||
|
||||
/*clear INTR */
|
||||
rga_write(rga_read(RGA2_INT, scheduler) |
|
||||
(m_RGA2_INT_ERROR_CLEAR_MASK |
|
||||
m_RGA2_INT_ALL_CMD_DONE_INT_CLEAR | m_RGA2_INT_NOW_CMD_DONE_INT_CLEAR |
|
||||
m_RGA2_INT_LINE_RD_CLEAR | m_RGA2_INT_LINE_WR_CLEAR),
|
||||
RGA2_INT, scheduler);
|
||||
}
|
||||
|
||||
static int rga2_irq(struct rga_scheduler_t *scheduler)
|
||||
{
|
||||
struct rga_job *job = scheduler->running_job;
|
||||
|
||||
/* The hardware interrupt top-half don't need to lock the scheduler. */
|
||||
if (job == NULL)
|
||||
return IRQ_HANDLED;
|
||||
if (job == NULL) {
|
||||
rga2_clear_intr(scheduler);
|
||||
rga_err("core[%d], invalid job, INTR[0x%x], HW_STATUS[0x%x], CMD_STATUS[0x%x], WORK_CYCLE[0x%x(%d)]\n",
|
||||
scheduler->core, rga_read(RGA2_INT, scheduler),
|
||||
rga_read(RGA2_STATUS2, scheduler), rga_read(RGA2_STATUS1, scheduler),
|
||||
rga_read(RGA2_WORK_CNT, scheduler), rga_read(RGA2_WORK_CNT, scheduler));
|
||||
|
||||
return IRQ_HANDLED;
|
||||
}
|
||||
|
||||
if (test_bit(RGA_JOB_STATE_INTR_ERR, &job->state)) {
|
||||
rga2_clear_intr(scheduler);
|
||||
|
||||
if (test_bit(RGA_JOB_STATE_INTR_ERR, &job->state))
|
||||
return IRQ_WAKE_THREAD;
|
||||
}
|
||||
|
||||
scheduler->ops->read_status(job, scheduler);
|
||||
|
||||
@@ -3158,6 +3170,8 @@ static int rga2_irq(struct rga_scheduler_t *scheduler)
|
||||
scheduler->ops->soft_reset(scheduler);
|
||||
}
|
||||
|
||||
rga2_clear_intr(scheduler);
|
||||
|
||||
return IRQ_WAKE_THREAD;
|
||||
}
|
||||
|
||||
|
||||
@@ -233,6 +233,15 @@ struct rga_job *rga_job_done(struct rga_scheduler_t *scheduler)
|
||||
spin_unlock_irqrestore(&scheduler->irq_lock, flags);
|
||||
return NULL;
|
||||
}
|
||||
|
||||
if (!test_bit(RGA_JOB_STATE_FINISH, &job->state)) {
|
||||
rga_err("%s(%#x) running job has not yet been completed.",
|
||||
rga_get_core_name(scheduler->core), scheduler->core);
|
||||
|
||||
spin_unlock_irqrestore(&scheduler->irq_lock, flags);
|
||||
return NULL;
|
||||
}
|
||||
|
||||
scheduler->running_job = NULL;
|
||||
|
||||
scheduler->timer.busy_time +=
|
||||
@@ -263,27 +272,29 @@ static int rga_job_timeout_query_state(struct rga_job *job, int orig_ret)
|
||||
{
|
||||
struct rga_scheduler_t *scheduler = job->scheduler;
|
||||
|
||||
if (scheduler->ops->read_status) {
|
||||
scheduler->ops->read_status(job, scheduler);
|
||||
rga_job_err(job, "core[%d]: INTR[0x%x], HW_STATUS[0x%x], CMD_STATUS[0x%x], WORK_CYCLE[0x%x(%d)]\n",
|
||||
scheduler->core,
|
||||
job->intr_status, job->hw_status, job->cmd_status,
|
||||
job->work_cycle, job->work_cycle);
|
||||
}
|
||||
|
||||
if (test_bit(RGA_JOB_STATE_DONE, &job->state) &&
|
||||
test_bit(RGA_JOB_STATE_FINISH, &job->state)) {
|
||||
return orig_ret;
|
||||
} else if (!test_bit(RGA_JOB_STATE_DONE, &job->state) &&
|
||||
test_bit(RGA_JOB_STATE_FINISH, &job->state)) {
|
||||
rga_job_err(job, "job hardware has finished, but the software has timeout!\n");
|
||||
|
||||
return -EBUSY;
|
||||
} else if (!test_bit(RGA_JOB_STATE_DONE, &job->state) &&
|
||||
!test_bit(RGA_JOB_STATE_FINISH, &job->state)) {
|
||||
rga_job_err(job, "job hardware has timeout.\n");
|
||||
|
||||
if (scheduler->ops->read_status)
|
||||
scheduler->ops->read_status(job, scheduler);
|
||||
|
||||
return -EBUSY;
|
||||
}
|
||||
|
||||
rga_job_err(job, "timeout core[%d]: INTR[0x%x], HW_STATUS[0x%x], CMD_STATUS[0x%x], WORK_CYCLE[0x%x(%d)]\n",
|
||||
scheduler->core,
|
||||
job->intr_status, job->hw_status, job->cmd_status,
|
||||
job->work_cycle, job->work_cycle);
|
||||
|
||||
return orig_ret;
|
||||
}
|
||||
|
||||
|
||||
@@ -505,9 +505,11 @@ struct rk806_platform_data {
|
||||
|
||||
int *shutdown_sequence;
|
||||
int *vb_shutdown_sequence;
|
||||
int *dvs_control_suspend;
|
||||
|
||||
int support_shutdown_sequence;
|
||||
int support_vb_sequence;
|
||||
int support_dvs_control_suspend;
|
||||
};
|
||||
|
||||
struct rk806_pin_info {
|
||||
|
||||
Reference in New Issue
Block a user