arm64: dts: rockchip: rk3576 evb1 add rk628 hdmi2csi config

Signed-off-by: Jianwei Fan <jianwei.fan@rock-chips.com>
Signed-off-by: Shunhua Lan <lsh@rock-chips.com>
Change-Id: Ibfd04a8d50c2d08eaaa03433be547e26c0a5391c
This commit is contained in:
Jianwei Fan
2024-01-25 08:04:31 +00:00
committed by Tao Huang
parent 90fb714b9f
commit 6903953d84
2 changed files with 199 additions and 0 deletions

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@@ -236,6 +236,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568m-serdes-v1-evb-display-super-frame-dsi0-co
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568m-serdes-v1-evb-display-super-frame-dsi0-command2lvds0-lp4x-v10.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3576-evb1-v10.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3576-evb1-v10-linux.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3576-evb1-v10-rk628-hdmi2csi.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3576-evb1-v10-tp2815-ahd2csi.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3576-test1-v10.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3576-test1-v10-eink.dtb

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@@ -0,0 +1,198 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (c) 2024 Rockchip Electronics Co., Ltd.
*
*/
/dts-v1/;
#include "rk3576-evb1.dtsi"
#include "rk3576-android.dtsi"
/ {
model = "Rockchip RK3576 EVB1 V10 Board + Rockchip RK628 HDMI to MIPI Extboard";
compatible = "rockchip,rk3576-evb1-v10", "rockchip,rk3576";
rk628_dc: rk628-dc {
compatible = "rockchip,dummy-codec";
#sound-dai-cells = <0>;
};
rkvtunnel: rkvtunnel {
compatible = "rockchip,video-tunnel";
status = "okay";
};
hdmiin-sound {
compatible = "simple-audio-card";
simple-audio-card,format = "i2s";
simple-audio-card,name = "rockchip,hdmiin";
simple-audio-card,bitclock-master = <&dailink0_master>;
simple-audio-card,frame-master = <&dailink0_master>;
status = "okay";
simple-audio-card,cpu {
sound-dai = <&sai4>;
};
dailink0_master: simple-audio-card,codec {
sound-dai = <&rk628_dc>;
};
};
};
&csi2_dphy0 {
status = "okay";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
#address-cells = <1>;
#size-cells = <0>;
hdmi_mipi_in: endpoint@1 {
reg = <1>;
remote-endpoint = <&hdmiin_out>;
data-lanes = <1 2 3 4>;
};
};
port@1 {
reg = <1>;
#address-cells = <1>;
#size-cells = <0>;
csidphy0_out: endpoint@0 {
reg = <0>;
remote-endpoint = <&mipi1_csi2_input>;
};
};
};
};
&csi2_dphy0_hw {
status = "okay";
};
&csi2_dphy1_hw {
status = "okay";
};
&i2c5 {
status = "okay";
pinctrl-0 = <&i2c5m3_xfer>;
clock-frequency = <400000>;
rk628_csi: rk628_csi@50 {
reg = <0x50>;
compatible = "rockchip,rk628-csi-v4l2";
status = "okay";
power-domains = <&power RK3576_PD_VI>;
pinctrl-names = "default";
pinctrl-0 = <&rk628_pin>;
interrupt-parent = <&gpio3>;
interrupts = <RK_PB0 IRQ_TYPE_EDGE_RISING>;
enable-gpios = <&gpio3 RK_PD0 GPIO_ACTIVE_HIGH>;
reset-gpios = <&gpio3 RK_PC5 GPIO_ACTIVE_HIGH>;
plugin-det-gpios = <&gpio3 RK_PD5 GPIO_ACTIVE_LOW>;
continues-clk = <1>;
rockchip,camera-module-index = <0>;
rockchip,camera-module-facing = "back";
rockchip,camera-module-name = "HDMI-MIPI1";
rockchip,camera-module-lens-name = "RK628-CSI";
multi-dev-info {
dev-idx-l = <1>;
dev-idx-r = <3>;
combine-idx = <1>;
pixel-offset = <0>;
dev-num = <2>;
};
port {
hdmiin_out: endpoint {
remote-endpoint = <&hdmi_mipi_in>;
data-lanes = <1 2 3 4>;
};
};
};
};
&mipi1_csi2 {
status = "okay";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
#address-cells = <1>;
#size-cells = <0>;
mipi1_csi2_input: endpoint@1 {
reg = <1>;
remote-endpoint = <&csidphy0_out>;
};
};
port@1 {
reg = <1>;
#address-cells = <1>;
#size-cells = <0>;
mipi1_csi2_output: endpoint@0 {
reg = <0>;
remote-endpoint = <&cif_mipi_in1>;
};
};
};
};
&rkcif {
status = "okay";
};
&rkcif_mipi_lvds1 {
status = "okay";
port {
cif_mipi_in1: endpoint {
remote-endpoint = <&mipi1_csi2_output>;
};
};
};
&rkcif_mmu {
status = "okay";
};
&sai4 {
dmas = <&dmac2 1>;
dma-names = "rx";
pinctrl-0 = <&sai4m2_lrck
&sai4m2_sclk
&sai4m2_sdi>;
status = "okay";
};
&vcc_mipicsi0 {
/delete-property/ gpio;
/delete-property/ pinctrl-0;
};
&vcc_mipicsi1 {
/delete-property/ gpio;
/delete-property/ pinctrl-0;
};
&pinctrl {
hdmiin {
rk628_pin: rk628-pin {
rockchip,pins = <3 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>,
<3 RK_PC0 RK_FUNC_GPIO &pcfg_pull_none>,
<3 RK_PD0 RK_FUNC_GPIO &pcfg_pull_none>,
<3 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
};