ARM64: dts: rk3399: add raw data for EAS

Change-Id: I7203936494c7886ef86c60688e545589f3c6f930
Signed-off-by: Chen Liang <cl@rock-chips.com>
This commit is contained in:
Chen Liang
2016-05-30 16:05:11 +08:00
committed by Huang, Tao
parent e6fb7d4964
commit 6959b1dd99
2 changed files with 145 additions and 0 deletions

View File

@@ -0,0 +1,136 @@
/* static struct idle_state idle_states_cluster_a53[] = { */
/* { .power = 56 }, /\* WFI *\/ */
/* { .power = 56 }, /\* cpu-sleep-0 *\/ */
/* }; */
/* static struct idle_state idle_states_cluster_a72[] = { */
/* { .power = 65 }, /\* WFI *\/ */
/* { .power = 65 }, /\* cpu-sleep-0 *\/ */
/* }; */
/* static struct capacity_state cap_states_cluster_a53[] = { */
/* /\* Power per cluster *\/ */
/* { .cap = 121, .power = 26, }, /\* 408 MHz *\/ */
/* { .cap = 179, .power = 30, }, /\* 600 MHz *\/ */
/* { .cap = 243, .power = 39, }, /\* 816 MHz *\/ */
/* { .cap = 300, .power = 47, }, /\* 1008 MHz *\/ */
/* { .cap = 357, .power = 57, }, /\* 1200 Mhz *\/ */
/* { .cap = 421, .power = 67, }, /\* 1416 Mhz *\/ */
/* }; */
/* static struct capacity_state cap_states_cluster_a72[] = { */
/* /\* Power per cluster *\/ */
/* { .cap = 232, .power = 24, }, /\* 408 MHz *\/ */
/* { .cap = 341, .power = 32, }, /\* 600 MHz *\/ */
/* { .cap = 464, .power = 43, }, /\* 816 MHz *\/ */
/* { .cap = 573, .power = 49, }, /\* 1008 MHz *\/ */
/* { .cap = 683, .power = 64, }, /\* 1200 MHz *\/ */
/* { .cap = 805, .power = 74, }, /\* 1416 MHz *\/ */
/* { .cap = 915, .power = 84, }, /\* 1608 MHz *\/ */
/* { .cap = 1024, .power = 94, }, /\* 1800 MHz *\/ */
/* }; */
/* static struct sched_group_energy energy_cluster_a53 = { */
/* .nr_idle_states = ARRAY_SIZE(idle_states_cluster_a53), */
/* .idle_states = idle_states_cluster_a53, */
/* .nr_cap_states = ARRAY_SIZE(cap_states_cluster_a53), */
/* .cap_states = cap_states_cluster_a53, */
/* }; */
/* static struct sched_group_energy energy_cluster_a57 = { */
/* .nr_idle_states = ARRAY_SIZE(idle_states_cluster_a72), */
/* .idle_states = idle_states_cluster_a72, */
/* .nr_cap_states = ARRAY_SIZE(cap_states_cluster_a72), */
/* .cap_states = cap_states_cluster_a72, */
/* }; */
/* static struct idle_state idle_states_core_a53[] = { */
/* { .power = 6 }, /\* WFI *\/ */
/* { .power = 0 }, /\* cpu-sleep-0 *\/ */
/* }; */
/* static struct idle_state idle_states_core_a72[] = { */
/* { .power = 15 }, /\* WFI *\/ */
/* { .power = 0 }, /\* cpu-sleep-0 *\/ */
/* }; */
/* static struct capacity_state cap_states_core_a53[] = { */
/* /\* Power per cpu *\/ */
/* { .cap = 121, .power = 40, }, /\* 408 MHz *\/ */
/* { .cap = 179, .power = 62, }, /\* 600 MHz *\/ */
/* { .cap = 243, .power = 90, }, /\* 816 MHz *\/ */
/* { .cap = 300, .power = 126, }, /\* 1008 MHz *\/ */
/* { .cap = 357, .power = 196, }, /\* 1200 Mhz *\/ */
/* { .cap = 421, .power = 246, }, /\* 1416 Mhz *\/ */
/* }; */
/* static struct capacity_state cap_states_core_a72[] = { */
/* /\* Power per cpu *\/ */
/* { .cap = 232, .power = 349, }, /\* 408 MHz *\/ */
/* { .cap = 341, .power = 547, }, /\* 600 MHz *\/ */
/* { .cap = 464, .power = 794, }, /\* 816 MHz *\/ */
/* { .cap = 573, .power = 1141, }, /\* 1008 MHz *\/ */
/* { .cap = 683, .power = 1850, }, /\* 1200 MHz *\/ */
/* { .cap = 805, .power = 2499, }, /\* 1416 MHz *\/ */
/* { .cap = 915, .power = 2922, }, /\* 1608 MHz *\/ */
/* { .cap = 1024, .power = 3416, }, /\* 1800 MHz *\/ */
/* }; */
energy-costs {
CPU_COST_A72: core-cost0 {
busy-cost-data = <
232 349
341 547
464 794
573 1141
683 1850
// 805 2499
// 915 2922
// 1024 3416
>;
idle-cost-data = <
15
0
>;
};
CPU_COST_A53: core-cost1 {
busy-cost-data = <
121 40
179 62
243 90
300 126
357 196
421 246
>;
idle-cost-data = <
6
0
>;
};
CLUSTER_COST_A72: cluster-cost0 {
busy-cost-data = <
417 24
579 32
744 43
883 49
1024 64
>;
idle-cost-data = <
65
65
>;
};
CLUSTER_COST_A53: cluster-cost1 {
busy-cost-data = <
235 26
303 30
368 39
406 47
447 57
>;
idle-cost-data = <
56
56
>;
};
};

View File

@@ -118,6 +118,7 @@
clocks = <&cru ARMCLKL>;
cpu-idle-states = <&cpu_sleep>;
operating-points-v2 = <&cluster0_opp>;
sched-energy-costs = <&CPU_COST_A53 &CLUSTER_COST_A53>;
};
cpu_l1: cpu@1 {
@@ -128,6 +129,7 @@
clocks = <&cru ARMCLKL>;
cpu-idle-states = <&cpu_sleep>;
operating-points-v2 = <&cluster0_opp>;
sched-energy-costs = <&CPU_COST_A53 &CLUSTER_COST_A53>;
};
cpu_l2: cpu@2 {
@@ -138,6 +140,7 @@
clocks = <&cru ARMCLKL>;
cpu-idle-states = <&cpu_sleep>;
operating-points-v2 = <&cluster0_opp>;
sched-energy-costs = <&CPU_COST_A53 &CLUSTER_COST_A53>;
};
cpu_l3: cpu@3 {
@@ -148,6 +151,7 @@
clocks = <&cru ARMCLKL>;
cpu-idle-states = <&cpu_sleep>;
operating-points-v2 = <&cluster0_opp>;
sched-energy-costs = <&CPU_COST_A53 &CLUSTER_COST_A53>;
};
cpu_b0: cpu@100 {
@@ -160,6 +164,7 @@
clocks = <&cru ARMCLKB>;
cpu-idle-states = <&cpu_sleep>;
operating-points-v2 = <&cluster1_opp>;
sched-energy-costs = <&CPU_COST_A72 &CLUSTER_COST_A72>;
};
cpu_b1: cpu@101 {
@@ -170,6 +175,7 @@
clocks = <&cru ARMCLKB>;
cpu-idle-states = <&cpu_sleep>;
operating-points-v2 = <&cluster1_opp>;
sched-energy-costs = <&CPU_COST_A72 &CLUSTER_COST_A72>;
};
idle-states {
@@ -183,6 +189,9 @@
min-residency-us = <1150>;
};
};
/include/ "rk3399-sched-energy.dtsi"
};
cluster0_opp: opp_table0 {