mirror of
https://github.com/hardkernel/linux.git
synced 2026-03-24 19:40:21 +09:00
Amlogic: sync the code from mainline. [1/1]
PD#SWPL-17246 Problem: sync the code from mainline. Solution: sync the code from mainline. 7c03859983c2 OSS vulnerability found in [boot.img]:[linux_kernel] (CVE-2018-12232) Risk:[] [1/1] ba89a3d9c791 OSS vulnerability found in [boot.img]:[linux_kernel] (CVE-2019-8912) Risk:[] [1/1] c434d0530610 Android Security Bulletin - November 2019-11 - Kernel components binder driver - CVE-2019-2214 [1/1] ff8d9012fbd4 Android Security Bulletin - November 2019-11 - Kernel components ext4 filesystem - CVE-2019-11833 [1/1] 3c52e964495e cec: store msg after bootup from st [1/2] 94198a56ee10 lcd: support tcon vac and demura data [2/2] 1add1a008a03 vout: spi: porting lcd driver and SPI to Linux [1/1] 3e8d7b0e5f97 hdmirx: add hpd recovery logic when input clk is unstable [1/1] f92e7ba21c62 ppmgr: Add 10bit, dolby and HDR video rotation. [1/1] dab2cc37cd95 dvb: fix dmx2 interrupt bug [1/1] 9d31efae4a55 dv: add dv target output mode [1/1] e86eb9d1b5c5 hdmirx: add rx phy tdr enable control [1/1] 8ea66f645bf6 dts: enable spi for gva [1/1] baf6e74528ef drm: add drm support for tm2 [1/1] Verify: verify by newton Change-Id: I9415060a4b39895b5d624117271a72fc6a1fd187 Signed-off-by: Luan Yuan <luan.yuan@amlogic.com>
This commit is contained in:
Luan Yuan
@@ -25,6 +25,9 @@ Required Properties:
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||||
"amlogic,sm1-clkc-1" - for sm1 ee part1 clock
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"amlogic,sm1-clkc-2" - for sm1 ee part2 clock
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"amlogic,sm1-aoclkc" - for sm1 ao clock
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"amlogic,tm2-clkc" - for tm2 additional ee clock
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"amlogic,tm2-clkc" - for tm2 additional ee clock
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"amlogic,tm2-measure" - for tm2 clock measurement
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- reg: physical base address of the clock controller and length of memory
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mapped region.
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@@ -2,10 +2,12 @@
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These are the HW cryptographic accelerators found on Amlogic products.
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*For S805 series and S905 series
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* Advanced Encryption Standard (AES)
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Required properties:
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- compatible : Should be "amlogic,aes" for aes-128/192/256 or "amlogic,aes_g12a_dma" for aes-128/256
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- compatible : Should be "amlogic,aes" for aes-128/192/256
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- dev_name : Should be "aml_aes"
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- interrupts: Should contain the IRQ line for the AES.
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- resets: Should contain the clock to enable the module
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@@ -25,10 +27,10 @@ aml_aes{
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Required properties:
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- compatible : Should be "amlogic,des,tdes".
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- dev_name : Should be "aml_aes"
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- dev_name : Should be "aml_tdes"
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- interrupts: Should contain the IRQ line for the TDES.
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- resets: Should contain the clock to enable the module
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- reg: Should contain the base address of regs
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- reg: Should contain the base address of regs
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Example:
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aml_tdes{
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@@ -40,29 +42,16 @@ aml_tdes{
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0x0 0xda832000 0x0 0xe4>;
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};
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* Secure Hash Algorithm (SHA1/SHA224/SHA256)
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********************************************************************************
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Required properties:
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- compatible : Should be "amlogic,sha".
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- dev_name : Should be "aml_sha"
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- interrupts: Should contain the IRQ line for the SHA.
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- resets: Should contain the clock to enable the module
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- reg: Should contain the base address of regs
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* For S905X series and beyond
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* S905X series use gxl
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* T962X series use txlx
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* S905X2 series use g12a
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Example:
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aml_sha{
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compatible = "amlogic,sha";
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dev_name = "aml_sha";
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interrupts = <0 36 1>;
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resets = <&clock GCLK_IDX_BLK_MOV>;
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reg = <0x0 0xc8832000 0x0 0x2c4
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0x0 0xda832000 0x0 0xe4>;
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};
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* New DMA for GXL and beyond
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* Dma engine for crypto operations
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Required properties:
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- compatible : Should be "amlogic,aml_gxl_dma" or "amlogic,aml_txlx_dma".
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- compatible : Should be "amlogic,aml_gxl_dma" or "amlogic,aml_txlx_dma"
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- reg: Should contain the base address of regs
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- interrupts: Should contain the IRQ line for DMA.
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@@ -76,8 +65,9 @@ aml_dma {
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* Advanced Encryption Standard (AES)
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Required properties:
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- compatible : Should be "amlogic,aes".
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- dev_name : Should be "aml_aes"
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- compatible : Should be "amlogic,aes_dma" for aes-128/192/256
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or "amlogic,aes_g12a_dma" for aes-128/256
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- dev_name : Should be "aml_aes_dma"
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Example:
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aml_aes{
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@@ -89,8 +79,9 @@ aml_aes{
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* Triple Data Encryption Standard (Triple DES)
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Required properties:
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- compatible : Should be "amlogic,des,tdes".
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- dev_name : Should be "aml_aes"
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- compatible : Should be "amlogic,des_dma,tdes_dma" for gxl
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or "amlogic,tdes_dma" for other series.
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- dev_name : Should be "aml_tdes_dma"
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Example:
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aml_tdes{
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@@ -100,8 +91,8 @@ aml_tdes{
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* Secure Hash Algorithm (SHA1/SHA224/SHA256/HMAC)
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Required properties:
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- compatible : Should be "amlogic,sha".
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- dev_name : Should be "aml_sha"
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- compatible : Should be "amlogic,sha_dma".
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- dev_name : Should be "aml_sha_dma"
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Example:
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aml_sha{
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@@ -1,7 +1,9 @@
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Amlogic Meson I2C controller
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Required properties:
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- compatible: must be "amlogic,meson6-i2c" or "amlogic,meson-gxbb-i2c"
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- compatible: must be "amlogic,meson6-i2c" or
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"amlogic,meson-gxbb-i2c" or
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"amlogic,meson-i2c"
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- reg: physical address and length of the device registers
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- interrupts: a single interrupt specifier
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- clocks: clock for the device
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@@ -20,6 +20,7 @@ Required properties:
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“amlogic,meson-txl-gpio-intc” for TXL SoCs (T950, T952, T960, T962)
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“amlogic,meson-tl1-gpio-intc” for TL1 SoCs (T962X2)
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“amlogic,meson-sm1-gpio-intc” for SM1 SoCs (S905D3, S905X3, S905Y3)
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“amlogic,meson-tm2-gpio-intc” for TM2 SoCs (T962X3, T962E2)
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- interrupt-parent : a phandle to the GIC the interrupts are routed to.
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Usually this is provided at the root level of the device tree as it is
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common to most of the SoC.
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@@ -19,6 +19,9 @@ Required properties for the root node:
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"amlogic,meson-txl-aobus-pinctrl"
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"amlogic,meson-tl1-periphs-pinctrl"
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"amlogic,meson-tl1-aobus-pinctrl"
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"amlogic,meson-tm2-periphs-pinctrl"
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"amlogic,meson-tm2-aobus-pinctrl"
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"amlogic,meson-tm2-testn-pinctrl"
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- reg: address and size of registers controlling irq functionality
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=== GPIO sub-nodes ===
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@@ -36,6 +36,8 @@ Required properties:
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"amlogic,meson-g12a-spicc" on Amlogic G12A and compatible SoCs
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"amlogic,meson-g12b-spicc", "amlogic,meson-g12a-spicc"
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on Amlogic G12B and compatible SoCs
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"amlogic,meson-tl1-spicc", "amlogic,meson-g12a-spicc"
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on Amlogic TL1 and compatible SoCs
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- reg: physical base address and length of the controller registers
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- interrupts: The interrupt specifier
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- clock-names: Must contain "core"
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@@ -120,4 +122,4 @@ Example :
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clock-names = "core";
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#address-cells = <1>;
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#size-cells = <0>;
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};
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};
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334
MAINTAINERS
334
MAINTAINERS
@@ -13527,6 +13527,8 @@ F: drivers/amlogic/memory_ext/*
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F: include/linux/amlogic/ramdump.h
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F: include/linux/amlogic/vmap_stack.h
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F: drivers/amlogic/memory_ext/vmap_stack.c
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F: drivers/amlogic/memory_ext/watch_point.c
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F: include/linux/amlogic/watch_point.h
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AMLOGIC driver for memory extend
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M: Tao Zeng <tao.zeng@amlogic.com>
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@@ -13562,6 +13564,7 @@ F: drivers/amlogic/esm/*
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AMLOGIC DWC_OTG USB
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M: Yue Wang <yue.wang@amlogic.com>
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F: drivers/amlogic/usb/*
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F: drivers/amlogic/usb/phy/phy-aml-new-otg.c
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F: drivers/usb/phy/phy-aml-new-usb.h
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F: drivers/usb/phy/phy-aml-new-usb.c
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F: drivers/usb/phy/phy-aml-new-usb2.c
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@@ -13570,6 +13573,7 @@ F: drivers/usb/phy/phy-aml-new-usb-v2.h
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F: drivers/usb/phy/phy-aml-new-usb-v2.c
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F: drivers/usb/phy/phy-aml-new-usb2-v2.c
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F: drivers/usb/phy/phy-aml-new-usb3-v2.c
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F: drivers/amlogic/usb/phy/phy-aml-new-usb3-v3.c
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F: drivers/usb/phy/phy-aml-usb.h
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F: drivers/usb/phy/phy-aml-usb.c
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F: drivers/usb/phy/phy-aml-usb2.c
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@@ -13802,7 +13806,7 @@ AMLOGIC M8b
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M: Jianxin Pan <jianxin.pan@amlogic.com>
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F: arch/arm/boot/dts/amlogic>
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ANLOGIC AUDIO
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ANLOGIC AUDIO DRIVER
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M: Xing Wang <xing.wang@amlogic.com>
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M: Zhe Wang <Zhe.Wang@amlogic.com>
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M: Shuai Li <shuai.li@amlogic.com>
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@@ -13810,14 +13814,12 @@ M: Jian Xu <jian.xu@amlogic.com>
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F: arch/arm64/boot/dts/amlogic/*
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F: arch/arm/boot/dts/amlogic/*
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F: arch/arm64/configs/meson64_defconfig
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F: drivers/amlogic/clk/clk-mpll.c
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F: drivers/amlogic/clk/clk_misc.c
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F: drivers/amlogic/clk/clkc.h
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F: drivers/amlogic/clk/gxl.c
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F: drivers/amlogic/clk/*
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F: drivers/amlogic/media/vout/hdmitx/hdmi_tx_20/hdmi_tx_main.c
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F: drivers/amlogic/pinctrl/pinctrl_gxl.c
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F: include/dt-bindings/clock/amlogic,gxl-clkc.h
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F: include/linux/amlogic/media/sound/audin_regs.h
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F: drivers/amlogic/pinctrl/*
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F: drivers/amlogic/*
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F: include/dt-bindings/clock/*
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F: include/linux/amlogic/media/sound/*
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F: sound/soc/Kconfig
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F: sound/soc/Makefile
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F: sound/soc/amlogic/auge/*
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@@ -13928,7 +13930,7 @@ F: drivers/amlogic/media/enhancement/amvecm/arch/*
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F: drivers/amlogic/media/enhancement/amvecm/dnlp_algorithm/*
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F: include/linux/amlogic/media/amvecm/*
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F: drivers/amlogic/media/enhancement/amvecm/hdr/*
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F: drivers/amlogic/media/enhancement/amvecm/amprime_sl/*
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F: drivers/amlogic/media/enhancement/amvecm/amprime_sl/*
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AMLOGIC GXL ADD SKT DTS
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M: Yun Cai <yun.cai@amlogic.com>
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@@ -14018,6 +14020,7 @@ F: include/linux/amlogic/aml_sd_emmc_v3.h
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AMLOGIC Asoc driver
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M: shuai li <shuai.li@amlogic.com>
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M: xing wang <xing.wang@amlogic.com>
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M: Zhe Wang <zhe.wang@amlogic.com>
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F: sound/soc/amlogic/meson/*
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F: sound/soc/amlogic/auge/*
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F: sound/soc/codecs/amlogic/*
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@@ -14371,6 +14374,8 @@ F: drivers/amlogic/media/vout/vout_serve/vout2_notify.c
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F: drivers/amlogic/media/vout/vout_serve/vout2_serve.c
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F: drivers/amlogic/media/vout/vout_serve/vout_func.c
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F: drivers/amlogic/media/vout/vout_serve/vout_func.h
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F: drivers/amlogic/media/vout/vout_serve/vout_reg.h
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F: drivers/amlogic/media/vout/vout_serve/dummy_lcd.c
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AMLOGIC GPIO IRQ
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M: Xingyu Chen <xingyu.chen@amlogic.com>
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@@ -14481,8 +14486,8 @@ F: drivers/amlogic/media/vout/lcd/lcd_extern/mipi_TL050FHV02CT.c
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AMLOGIC ATV DEMOD DRIVER
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M: nengwen.chen <nengwen.chen@amlogic.com>
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F: include/linux/amlogic/aml_atvdemod.h
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F: drivers/amlogic/atv_demod/*
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F: include/linux/amlogic/aml_atvdemod.h
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AMLOGIC ADD EXT MIPI DEFAULT DRIVER
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M: Weiming Liu <weiming.liu@amlogic.com>
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@@ -14588,6 +14593,10 @@ AMLOGIC G12B w400 buildroot dts
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M: liangzhuo xie <liangzhuo.xie@amlogic.com>
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F: arch/arm64/boot/dts/amlogic/g12b_a311d_w400_buildroot.dts
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AMLOGIC G12B w411 buildroot dts
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M: dianzhong.huo <dianzhong.huo@amlogic.com>
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F: arch/arm64/boot/dts/amlogic/g12b_a311d_w411_buildroot.dts
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AMLOGIC P PARTITION DTSI
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M: Xindong Xu <xindong.xu@amlogic.com>
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F: arch/arm64/boot/dts/amlogic/firmware_avb.dtsi
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@@ -14732,6 +14741,10 @@ M: Xuhua Zhang <xuhua.zhang@amlogic.com>
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F: drivers/amlogic/media/vin/tvin/vdin/vdin_afbce.c
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F: drivers/amlogic/media/vin/tvin/vdin/vdin_afbce.h
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AMLOGIC VDIN DRIVERS
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M: Yong Qin <yong.qin@amlogic.com>
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F: drivers/amlogic/media/vin/tvin/vdin/vdin_trace.h
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AMLOGIC MESONAXG S400 DTS
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M: Yuegui He <yuegui.he@amlogic.com>
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F: arch/arm64/boot/dts/amlogic/axg_s400_v03.dts
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@@ -14763,6 +14776,29 @@ F: arch/arm64/boot/dts/amlogic/partition_mbox_ab_P_32.dtsi
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AMLOGIC BACKLIGHT LDIM DRIVER
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M: Evoke Zhang <evoke.zhang@amlogic.com>
|
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F: drivers/amlogic/media/vout/backlight/aml_ldim/ldim_spi.c
|
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F: drivers/amlogic/media/vout/backlight/aml_ldim/ldim_hw.c
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AMLOGIC MESON TL1 DTS
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M: Xingyu Chen <xingyu.chen@amlogic.com>
|
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M: Bo Yang <bo.yang@amlogic.com>
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F: arch/arm/boot/dts/amlogic/tl1_t962x2_skt.dts
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F: arch/arm/boot/dts/amlogic/tl1_t962x2_x301.dts
|
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F: arch/arm/boot/dts/amlogic/tl1_t962x2_t309.dts
|
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F: arch/arm64/boot/dts/amlogic/mesontl1*
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F: arch/arm64/boot/dts/amlogic/tl1_t962x2_*
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AMLOGIC MESON TL1 PANEL DTS
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M: Evoke Zhang <evoke.zhang@amlogic.com>
|
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F: arch/arm/boot/dts/amlogic/mesontl1_skt-panel.dtsi
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F: arch/arm/boot/dts/amlogic/mesontl1_x301-panel.dtsi
|
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F: arch/arm/boot/dts/amlogic/mesontl1_t309-panel.dtsi
|
||||
F: drivers/amlogic/media/vout/lcd/lcd_phy_config.c
|
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F: drivers/amlogic/media/vout/lcd/lcd_phy_config.h
|
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|
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AMLOGIC MESONAXG RSR DTS
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M: Yeping Miao <yeping.miao@amlogic.com>
|
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F: arch/arm64/boot/dts/amlogic/axg_rsr.dts
|
||||
F: arch/arm64/boot/dts/amlogic/axg_rsr_v03.dts
|
||||
|
||||
AMLOGIC CAMERA DRIVER
|
||||
M: Guosong Zhou <guosong.zhou@amlogic.com>
|
||||
@@ -14788,6 +14824,10 @@ F: drivers/amlogic/media/gdc/app/gdc_dmabuf.c
|
||||
F: drivers/amlogic/media/gdc/app/gdc_dmabuf.h
|
||||
F: drivers/amlogic/media/gdc/src/platform/system_log.c
|
||||
|
||||
AMLOGIC IRCUT DRIVER
|
||||
M: Dianzhong Huo <dianzhong.huo@amlogic.com>
|
||||
F: drivers/amlogic/ircut/
|
||||
|
||||
AMLOGIC VIDEOSYNC
|
||||
M: Jintao Xu <jintao.xu@amlogic.com>
|
||||
F: drivers/amlogic/media/video_processor/videosync/Kconfig
|
||||
@@ -14810,6 +14850,7 @@ F: arch/arm/boot/dts/amlogic/axg_s400_v03sbr.dts
|
||||
F: sound/soc/codecs/amlogic/tas5782m.c
|
||||
F: sound/soc/codecs/amlogic/tas5782m.h
|
||||
|
||||
AMLOGIC SM1 DTS
|
||||
M: Zhiqiang Liang <Zhiqiang.Liang@amlogic.com>
|
||||
F: arch/arm64/boot/dts/amlogic/mesongsm1.dtsi
|
||||
F: arch/arm64/boot/dts/amlogic/sm1_pxp.dts
|
||||
@@ -14820,19 +14861,48 @@ AMLOGIC SM1 CLOCK DRIVERS
|
||||
M: Shunzhou Jiang <shunzhou.jiang@amlogic.com>
|
||||
F: drivers/amlogic/clk/sm1/*
|
||||
|
||||
AMLOGIC SM1 AND AXG DTS
|
||||
M: shaochan.liu <shaochan.liu@amlogic.com>
|
||||
F: arch/arm64/boot/dts/amlogic/mesonsm1_skt-panel.dtsi
|
||||
F: arch/arm/boot/dts/amlogic/mesonsm1_skt-panel.dtsi
|
||||
F: arch/arm64/boot/dts/amlogic/mesonaxg_skt-panel.dtsi
|
||||
F: arch/arm/boot/dts/amlogic/mesonaxg_skt-panel.dtsi
|
||||
F: drivers/amlogic/media/vout/spi/
|
||||
F: include/linux/amlogic/media/vout/lcd/lcd_spi.h
|
||||
F: arch/arm64/boot/dts/amlogic/lcd_spi_g12a.dtsi
|
||||
|
||||
AMLOGIC SM1 POWER CTRL DRIVERS
|
||||
M: Shunzhou Jiang <shunzhou.jiang@amlogic.com>
|
||||
F: drivers/amlogic/power/power_ctrl.c
|
||||
F: include/linux/amlogic/power_ctrl.h
|
||||
|
||||
AMLOGIC SM1 DTS
|
||||
M: shaochan.liu <shaochan.liu@amlogic.com>
|
||||
F: arch/arm64/boot/dts/amlogic/mesonsm1_skt-panel.dtsi
|
||||
F: arch/arm/boot/dts/amlogic/mesonsm1_skt-panel.dtsi
|
||||
AMLOGIC MESONAXG S400 GVA SBR DTS
|
||||
M: Yeping Miao <yeping.miao@amlogic.com>
|
||||
F: arch/arm64/boot/dts/amlogic/axg_s400_v03gva_sbr.dts
|
||||
F: arch/arm/boot/dts/amlogic/axg_s400_v03gva_sbr.dts
|
||||
|
||||
AMLOGIC TL1 VAD
|
||||
M: Wenbiao Zhang <wenbiao.zhang@amlogic.com>
|
||||
F: include/linux/amlogic/vad_api.h
|
||||
AMLOGIC TL1 DTS
|
||||
M: Huijie Huang <huijie.huang@amlogic.com>
|
||||
F: arch/arm/boot/dts/amlogic/tl1_t962x2_x301_1g.dts
|
||||
F: arch/arm/boot/dts/amlogic/tl1_t962x2_x301_2g.dts
|
||||
F: arch/arm64/boot/dts/amlogic/tl1_t962x2_x301_1g.dts
|
||||
F: arch/arm64/boot/dts/amlogic/tl1_t962x2_x301_2g.dts
|
||||
|
||||
AMLOGIC TM2 PINCTRL DRIVER
|
||||
M: Qianggui Song <qianggui.song@amlogic.com>
|
||||
F: drivers/amlogic/pinctrl/pinctrl-meson-tm2.c
|
||||
F: include/dt-bindings/gpio/meson-tm2-gpio.h
|
||||
|
||||
AMLOGIC MESON TM2 CLOCK DRIVER
|
||||
M: Jian Hu <jian.hu@amlogic.com>
|
||||
F: driver/amlogic/clk/tm2/*
|
||||
|
||||
AMLOGIC MESON TM2 LCD DTS
|
||||
M: Shaochan Liu <shaochan.liu@amlogic.com>
|
||||
F: arch/arm64/boot/dts/amlogic/mesontm2_t962x3_ab301-panel.dtsi
|
||||
F: arch/arm64/boot/dts/amlogic/mesontm2_t962x3_ab309-panel.dtsi
|
||||
F: arch/arm/boot/dts/amlogic/mesontm2_t962x3_ab301-panel.dtsi
|
||||
F: arch/arm/boot/dts/amlogic/mesontm2_t962x3_ab309-panel.dtsi
|
||||
|
||||
AMLOGIC SM1 S905X3 DTS
|
||||
M: Xiaoliang Wang <xiaoliang.wang@amlogic.com>
|
||||
@@ -14870,10 +14940,22 @@ AMLOGIC SM1 S905D3 AC202
|
||||
M: LUAN YUAN <luan.yuan@amlogic.com>
|
||||
F: arch/arm64/boot/dts/amlogic/sm1_s905d3_ac202*
|
||||
|
||||
AMLOGIC S905Y2 U223_LP DTS
|
||||
M: Qingwei Xu <qingwei.xu@amlogic.com>
|
||||
F: arm/boot/dts/amlogic/g12a_s905y2_u223_lp.dts
|
||||
F: arm64/boot/dts/amlogic/g12a_s905y2_u223_lp.dts
|
||||
|
||||
AMLOGIC HYN_CST2XX TOUCHSCREEN
|
||||
M: XINLIANG ZHANG <xinliang.zhang@amlogic.com>
|
||||
F: drivers/amlogic/input/touchscreen/hyn_cst2xx/*
|
||||
|
||||
AMLOGIC WEEKLY CHANGE GENERATOR
|
||||
M: JIAMIN MA <jiamin.ma@amlogic.com>
|
||||
F: scripts/amlogic/weekly_change.py
|
||||
|
||||
ANLOGIC HIFI4DSP
|
||||
M: Shuyu Li <Shuyu.Li@amlogic.com>
|
||||
F: drivers/amlogic/hifi4dsp/*
|
||||
|
||||
AMLOGIC SM1 AC200/AC213/AC214 BUILDROOT DTS
|
||||
M: Guofeang Tang <guofeng.tang@amlogic.com>
|
||||
@@ -14884,6 +14966,13 @@ F: arch/arm64/boot/dts/amlogic/sm1_s905d3_ac200_buildroot.dts
|
||||
F: arch/arm64/boot/dts/amlogic/sm1_s905x3_ac213_buildroot.dts
|
||||
F: arch/arm64/boot/dts/amlogic/sm1_s905x3_ac214_buildroot.dts
|
||||
|
||||
AMLOGIC G12B W400 DRM BUILDROOT DTS
|
||||
M: Guofeang Tang <guofeng.tang@amlogic.com>
|
||||
F: arch/arm/boot/dts/amlogic/g12b_a311d_w400_drm_buildroot.dts
|
||||
F: arch/arm/boot/dts/amlogic/g12b_a311d_w400_drm_buildroot_a.dts
|
||||
F: arch/arm64/boot/dts/amlogic/g12b_a311d_w400_drm_buildroot.dts
|
||||
F: arch/arm64/boot/dts/amlogic/g12b_a311d_w400_drm_buildroot_a.dts
|
||||
|
||||
AMLOGIC GXL P281 DTS
|
||||
M: Luan Yuan <luan.yuan@amlogic.com>
|
||||
F: arch/arm/boot/dts/amlogic/gxl_p281_1g.dts
|
||||
@@ -14923,6 +15012,205 @@ HARDKERNEL S922D odroidn2
|
||||
M: charles park <charles.park@hardkernel.com>
|
||||
F: Documentation/devicetree/binding/input/touchscreen/sx8650.txt
|
||||
|
||||
AMLOGIC GDC DRIVER
|
||||
M: Pengcheng Chen <pengcheng.chen@amlogic.com>
|
||||
F: drivers/amlogic/media/gdc/app/gdc_wq.c
|
||||
F: drivers/amlogic/media/gdc/app/gdc_wq.h
|
||||
|
||||
LAB126 PRIVACY
|
||||
M: LAB126
|
||||
F: drivers/misc/amz_priv*
|
||||
|
||||
LAB126 lifecycle and log
|
||||
M: LAB126
|
||||
F: drivers/staging/amazon/*
|
||||
|
||||
LAB126 tmp103
|
||||
M: LAB126
|
||||
F: drivers/hwmon/tmp103.c
|
||||
|
||||
LAB126 RAVEN DTS
|
||||
M: Yong Yu <yonyu@lab126.com>
|
||||
F: arch/arm64/boot/dts/amlogic/raven.dts
|
||||
F: arch/arm64/boot/dts/amlogic/raven_proto.dts
|
||||
F: Documentation/devicetree/bindings/iio/light/tsl2540.txt
|
||||
|
||||
LAB126 RAVEN DEFCONFIG
|
||||
M: Yong Yu <yonyu@lab126.com>
|
||||
F: arch/arm64/configs/raven_defconfig
|
||||
F: arch/arm64/configs/raven_debug_defconfig
|
||||
|
||||
LAB126 RAVEN THERMISTOR
|
||||
M: Kevin Ow <krow@amazon.com>
|
||||
F: Documentation/devicetree/bindings/thermal/ntc-bts-thermistor.txt
|
||||
F: drivers/amlogic/iio/adc/saradc_ntc_bts.c
|
||||
F: drivers/amlogic/iio/adc/Makefile
|
||||
F: drivers/amlogic/iio/adc/Kconfig
|
||||
|
||||
LAB126 RAVEN VIRTUAL THERMAL SENSOR
|
||||
M: Kevin Ow <krow@amazon.com>
|
||||
F: arch/arm64/boot/dts/amlogic/raven_thermal_zones.dtsi
|
||||
F: Documentation/devicetree/bindings/thermal/virtual_sensor_thermal.txt
|
||||
F: drivers/thermal/Kconfig
|
||||
F: drivers/thermal/Makefile
|
||||
F: drivers/thermal/trip_step_wise.c
|
||||
F: drivers/thermal/virtual_sensor_thermal.c
|
||||
F: include/linux/virtual_sensor_thermal.h
|
||||
|
||||
LAB126 RAVEN WIFI_COOLING
|
||||
M: Kevin Ow <krow@amazon.com>
|
||||
F: Documentation/devicetree/bindings/thermal/wifi-temp-sensor.txt
|
||||
F: drivers/thermal/wifi_cooling.c
|
||||
F: drivers/amlogic/thermal/aml_thermal_cooling.c
|
||||
F: drivers/amlogic/thermal/aml_thermal_hw.c
|
||||
F: include/linux/amlogic/aml_thermal_cooling.h
|
||||
F: include/linux/amlogic/aml_thermal_hw.h
|
||||
|
||||
THIRD PARTY AUDIO CODEC TLV320DAC3203
|
||||
M: Xing Fang <xing.fang@amlogic.com>
|
||||
F: sound/soc/codecs/tlv320dac3203.c
|
||||
F: sound/soc/codecs/tlv320dac3203.h
|
||||
|
||||
LAB126 PERFORMANCE BOOST DRIVER
|
||||
M: Yong Yu <yonyu@lab126.com>
|
||||
F: drivers/amlogic/cpufreq/cpufreq-boost.c
|
||||
F: include/linux/cpufreq-boost.h
|
||||
|
||||
ADD OSD SW_SYNC DRIVER
|
||||
M: Pengcheng Chen <pengcheng.chen@amlogic.com>
|
||||
F: drivers/amlogic/media/osd/osd_sw_sync.c
|
||||
F: drivers/amlogic/media/osd/osd_sw_sync.h
|
||||
|
||||
AMLOGIC VIRTUAL_FB DRIVER
|
||||
M: Pengcheng Chen <pengcheng.chen@amlogic.com>
|
||||
F: drivers/amlogic/media/osd/osd_virtual.c
|
||||
F: drivers/amlogic/media/osd/osd_virtual.h
|
||||
|
||||
AMLOGIC TL1 PIXEL PROBE
|
||||
M: Yan Wang <yan.wang@amlogic.com>
|
||||
F: drivers/amlogic/pixel_probe/*
|
||||
F: include/linux/amlogic/pixel_probe.h
|
||||
|
||||
AMLOGIC ADD HDR10+ TO SDR FUNCTION
|
||||
M: Cheng Wang <cheng.wang@amlogic.com>
|
||||
F: drivers/amlogic/media/enhancement/amvecm/hdr/am_hdr10_plus_ootf.c
|
||||
F: drivers/amlogic/media/enhancement/amvecm/hdr/am_hdr10_plus_ootf.h
|
||||
|
||||
AMLOGIC PATTERN DETECTION FUNCTION
|
||||
M: Xihai ZHu <xihai.zhu@amlogic.com>
|
||||
F: drivers/amlogic/media/enhancement/amvecm/pattern_detection.c
|
||||
F: drivers/amlogic/media/enhancement/amvecm/pattern_detection.h
|
||||
F: drivers/amlogic/media/enhancement/amvecm/pattern_detection_bar_settings.h
|
||||
F: drivers/amlogic/media/enhancement/amvecm/pattern_detection_corn_settings.h
|
||||
F: drivers/amlogic/media/enhancement/amvecm/pattern_detection_face_settings.h
|
||||
|
||||
AMLOGIC DRM
|
||||
M: Ao Xu <ao.xu@amlogic.com>
|
||||
M: Dezhi Kong <dezhi.kong@amlogic.com>
|
||||
F: include/linux/meson_ion.h
|
||||
F: include/uapi/drm/meson_drm.h
|
||||
F: include/uapi/drm/drm_fourcc.c
|
||||
F: drivers/gpu/Makefile
|
||||
F: drivers/amlogic/Kconfig
|
||||
F: drivers/amlogic/Makefile
|
||||
F: drivers/amlogic/drm/*
|
||||
F: drivers/staging/android/ion/ion.h
|
||||
F: drivers/staging/android/ion/ion_cma_heap.c
|
||||
F: drivers/amlogic/media/osd/osd_fb.c
|
||||
F: drivers/amlogic/media/common/ion_dev/dev_ion.c
|
||||
F: drivers/amlogic/media/common/ion_dev/dev_ion.h
|
||||
F: arch/arm/boot/dts/amlogic/meson-g12a-u200.dts
|
||||
F: arch/arm/boot/dts/amlogic/mesong12a_drm.dtsi
|
||||
F: arch/arm/boot/dts/amlogic/sm1_s905d3_ac200.dts
|
||||
F: arch/arm/boot/dts/amlogic/sm1_s905x3_ac213.dts
|
||||
F: arch/arm64/boot/dts/amlogic/meson-g12a-u200.dts
|
||||
F: arch/arm64/boot/dts/amlogic/mesong12a_drm.dtsi
|
||||
F: arch/arm64/boot/dts/amlogic/sm1_s905d3_ac200.dts
|
||||
F: arch/arm64/boot/dts/amlogic/sm1_s905x3_ac213.dts
|
||||
F: arch/arm/configs/meson64_a32_defconfig
|
||||
F: arch/arm64/configs/meson64_a64_defconfig
|
||||
F: arch/arm/boot/dts/amlogic/Makefile
|
||||
F: arch/arm64/boot/dts/amlogic/Makefile
|
||||
|
||||
AMLOGIC VDAC
|
||||
M: Evoke Zhang <evoke.zhang@amlogic.com>
|
||||
F: drivers/amlogic/media/vout/vdac/vdac_dev.h
|
||||
F: drivers/amlogic/media/vout/vdac/vdac_config.c
|
||||
|
||||
AMLOGIC DRM
|
||||
M: Dezhi Kong <dezhi.kong@amlogic.com>
|
||||
F: arch/arm/boot/dts/amlogic/mesonsm1_drm.dtsi
|
||||
F: arch/arm64/boot/dts/amlogic/mesonsm1_drm.dtsi
|
||||
F: arch/arm/boot/dts/amlogic/sm1_s905d3_ac200_drm_buildroot.dts
|
||||
F: arch/arm64/boot/dts/amlogic/sm1_s905d3_ac200_drm_buildroot.dts
|
||||
F: drivers/amlogic/drm/meson_vpu.c
|
||||
|
||||
AMLOGIC ADD DTS FOR T312 PLATFORM
|
||||
M: hualing chen <hualing.chen@amlogic.com>
|
||||
F: arch/arm64/boot/dts/amlogic/mesontm2_t962x3_t312-panel.dtsi
|
||||
F: arch/arm/boot/dts/amlogic/mesontm2_t962x3_t312-panel.dtsi
|
||||
|
||||
AMLOGIC ADD DRM FOR P212
|
||||
M: lingjie li <lingjie.li@amlogic.com>
|
||||
F: arch/arm/boot/dts/amlogic/gxl_p212_2g_drm_buildroot.dts
|
||||
|
||||
AMLOGIC ADD DTS FOR AC223 PLATFORM
|
||||
M: huijie huang <huijie.huang@amlogic.com>
|
||||
F: arch/arm/boot/dts/amlogic/sm1_s905y3_ac223.dts
|
||||
F: arch/arm64/boot/dts/amlogic/sm1_s905y3_ac223.dts
|
||||
|
||||
AMLOGIC TVAFE DRIVER
|
||||
M: Evoke Zhang <evoke.zhang@amlogic.com>
|
||||
F: drivers/amlogic/media/vin/tvin/tvafe/tvafe_pq_table.c
|
||||
|
||||
AMLOGIC DEINTERLACE DRIVER
|
||||
M: Jihong Sui <jihong.sui@amlogic.com>
|
||||
F: drivers/amlogic/media/deinterlace/di_pqa.h
|
||||
F: drivers/amlogic/media/di_local/*
|
||||
|
||||
AMLOGIC ADD DI_MULTI DRIVER
|
||||
M: Jihong Sui <jihong.sui@amlogic.com>
|
||||
F: drivers/amlogic/media/di_multi/*
|
||||
|
||||
AMLOGIC DRM
|
||||
M: Ao Xu <ao.xu@amlogic.com>
|
||||
F: drivers/amlogic/drm/meson_debugfs.c
|
||||
|
||||
AMLOGIC DRM
|
||||
M: Dezhi Kong <dezhi.kong@amlogic.com>
|
||||
F: arch/arm/boot/dts/amlogic/mesontl1_drm.dtsi
|
||||
F: arch/arm/boot/dts/amlogic/tl1_t962x2_x301_1g_drm.dts
|
||||
F: arch/arm/boot/dts/amlogic/tl1_t962x2_x301_2g_drm.dts
|
||||
F: arch/arm64/boot/dts/amlogic/mesontl1_drm.dtsi
|
||||
F: arch/arm64/boot/dts/amlogic/tl1_t962x2_x301_1g_drm.dts
|
||||
F: arch/arm64/boot/dts/amlogic/tl1_t962x2_x301_2g_drm.dts
|
||||
F: drivers/amlogic/drm/meson_lcd.c
|
||||
F: drivers/amlogic/drm/meson_vpu.c
|
||||
F: drivers/amlogic/drm/meson_vpu_pipeline.c
|
||||
F: drivers/amlogic/drm/meson_vpu_pipeline_traverse.c
|
||||
F: include/dt-bindings/display/meson-drm-ids.h
|
||||
|
||||
AMLOGIC LCD EXTERN DRIVER
|
||||
M: Shaochan Liu <shaochan.liu@amlogic.com>
|
||||
F: drivers/amlogic/media/vout/lcd/lcd_extern/i2c_CS602.c
|
||||
|
||||
AMLOGIC SM1/G12A BL40 BOOTUP DRIVER
|
||||
M: shunzhou jiang <shunzhou.jiang@amlogic.com>
|
||||
F: drivers/amlogic/firmware/bl40_module.c
|
||||
F: drivers/amlogic/firmware/Makefile
|
||||
F: drivers/amlogic/firmware/Kconfig
|
||||
|
||||
AMLOGIC VAD WAKEUP POWER
|
||||
M: Zhiqiang Liang <zhiqiang.liang@amlogic.com>
|
||||
F: drivers/amlogic/pm/vad_power.c
|
||||
F: drivers/amlogic/pm/vad_power.h
|
||||
|
||||
AMLOGIC T962E2 SBR DTS
|
||||
M: Bing Jiang <Bing.Jiang@amlogic.com>
|
||||
F: arch/arm/boot/dts/amlogic/tm2_t962e2_ab311_sbr.dts
|
||||
F: arch/arm64/boot/dts/amlogic/tm2_t962e2_ab311_sbr.dts
|
||||
>>>>>>> 54b1d7a3db4c... Amlogic: sync the code from mainline. [1/1]
|
||||
|
||||
AMLOGIC S805Y DTS
|
||||
M: Luan Yuan <luan.yuan@amlogic.com>
|
||||
F: arch/arm/boot/dts/amlogic/gxl_p244_1g.dts
|
||||
@@ -14930,3 +15218,15 @@ F: arch/arm/boot/dts/amlogic/gxl_p244_2g.dts
|
||||
F: arch/arm64/boot/dts/amlogic/gxl_p244_1g.dts
|
||||
F: arch/arm64/boot/dts/amlogic/gxl_p244_2g.dts
|
||||
|
||||
AMLOGIC VPP DRIVER
|
||||
M: Brian Zhu <brian.zhu@amlogic.com>
|
||||
F: drivers/amlogic/media/video_sink/video_hw.c
|
||||
|
||||
AMLOGIC T962X3 DRM DTS
|
||||
M: Dezhi Kong <dezhi.kong@amlogic.com>
|
||||
F: arch/arm/boot/dts/amlogic/tm2_t962x3_ab301_drm.dts
|
||||
F: arch/arm/boot/dts/amlogic/tm2_t962e2_ab311_drm.dts
|
||||
F: arch/arm64/boot/dts/amlogic/tm2_t962x3_ab301_drm.dts
|
||||
F: arch/arm64/boot/dts/amlogic/tm2_t962e2_ab311_drm.dts
|
||||
F: arch/arm64/boot/dts/amlogic/mesontm2_drm.dtsi
|
||||
F: arch/arm/boot/dts/amlogic/mesontm2_drm.dtsi
|
||||
|
||||
@@ -339,6 +339,9 @@ $(BOOT_TARGETS): vmlinux
|
||||
$(INSTALL_TARGETS):
|
||||
$(Q)$(MAKE) $(build)=$(boot) MACHINE=$(MACHINE) $@
|
||||
|
||||
amlogic/%.dtb: | scripts
|
||||
$(Q)$(MAKE) $(build)=$(boot)/dts MACHINE=$(MACHINE) $(boot)/dts/$@
|
||||
|
||||
%.dtb: | scripts
|
||||
$(Q)$(MAKE) $(build)=$(boot)/dts/amlogic MACHINE=$(MACHINE) $(boot)/dts/amlogic/$@
|
||||
ifeq ($(CONFIG_AMLOGIC_MODIFY),y)
|
||||
|
||||
@@ -245,7 +245,7 @@
|
||||
reg = <0xff3f0000 0x10000
|
||||
0xff634540 0x8
|
||||
0xff634558 0xc
|
||||
0xffd01084 0x4>;
|
||||
0xffd01008 0x4>;
|
||||
interrupts = <0 8 1
|
||||
0 9 1>;
|
||||
|
||||
|
||||
@@ -18,6 +18,7 @@
|
||||
/dts-v1/;
|
||||
|
||||
#include "mesonaxg.dtsi"
|
||||
#include "mesonaxg_skt-panel.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Amlogic";
|
||||
@@ -160,7 +161,9 @@
|
||||
compatible = "amlogic, gxbb-eth-dwmac";
|
||||
status = "disable";
|
||||
reg = <0xff3f0000 0x10000
|
||||
0xff634540 0x8>;
|
||||
0xff634540 0x8
|
||||
0xff634558 0xc
|
||||
0xffd01008 0x4>;
|
||||
interrupts = <0 8 1>;
|
||||
pinctrl-names = "external_eth_pins";
|
||||
pinctrl-0 = <&external_eth_pins>;
|
||||
|
||||
@@ -170,7 +170,9 @@
|
||||
ethmac: ethernet@0xff3f0000 {
|
||||
compatible = "amlogic, gxbb-eth-dwmac";
|
||||
reg = <0xff3f0000 0x10000
|
||||
0xff634540 0x8>;
|
||||
0xff634540 0x8
|
||||
0xff634558 0xc
|
||||
0xffd01008 0x4>;
|
||||
interrupts = <0 8 1>;
|
||||
pinctrl-names = "external_eth_pins";
|
||||
pinctrl-0 = <&external_eth_pins>;
|
||||
|
||||
@@ -170,7 +170,9 @@
|
||||
ethmac: ethernet@0xff3f0000 {
|
||||
compatible = "amlogic, gxbb-eth-dwmac";
|
||||
reg = <0xff3f0000 0x10000
|
||||
0xff634540 0x8>;
|
||||
0xff634540 0x8
|
||||
0xff634558 0xc
|
||||
0xffd01008 0x4>;
|
||||
interrupts = <0 8 1>;
|
||||
pinctrl-names = "external_eth_pins";
|
||||
pinctrl-0 = <&external_eth_pins>;
|
||||
|
||||
@@ -166,7 +166,9 @@
|
||||
ethmac: ethernet@0xff3f0000 {
|
||||
compatible = "amlogic, gxbb-eth-dwmac";
|
||||
reg = <0xff3f0000 0x10000
|
||||
0xff634540 0x8>;
|
||||
0xff634540 0x8
|
||||
0xff634558 0xc
|
||||
0xffd01008 0x4>;
|
||||
interrupts = <0 8 1>;
|
||||
pinctrl-names = "external_eth_pins";
|
||||
pinctrl-0 = <&external_eth_pins>;
|
||||
@@ -420,14 +422,6 @@
|
||||
pinctrl-0 = <&b_uart_pins>;
|
||||
};
|
||||
|
||||
meson-irblaster {
|
||||
compatible = "amlogic, am_irblaster";
|
||||
dev_name = "meson-irblaster";
|
||||
status = "disable";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&irblaster_pins>;
|
||||
};
|
||||
|
||||
vpu {
|
||||
compatible = "amlogic, vpu-axg";
|
||||
dev_name = "vpu";
|
||||
@@ -848,13 +842,17 @@
|
||||
compatible = "amlogic, unifykey";
|
||||
status = "ok";
|
||||
|
||||
unifykey-num = <6>;
|
||||
unifykey-num = <11>;
|
||||
unifykey-index-0 = <&keysn_0>;
|
||||
unifykey-index-1 = <&keysn_1>;
|
||||
unifykey-index-2 = <&keysn_2>;
|
||||
unifykey-index-3 = <&keysn_3>;
|
||||
unifykey-index-4 = <&keysn_4>;
|
||||
unifykey-index-5 = <&keysn_5>;
|
||||
unifykey-index-7 = <&keysn_7>;
|
||||
unifykey-index-8 = <&keysn_8>;
|
||||
unifykey-index-9 = <&keysn_9>;
|
||||
unifykey-index-10 = <&keysn_10>;
|
||||
|
||||
keysn_0: key_0{
|
||||
key-name = "usid";
|
||||
@@ -887,6 +885,26 @@
|
||||
key-name = "deviceid";
|
||||
key-device = "normal";
|
||||
key-permit = "read","write","del";
|
||||
};
|
||||
keysn_7:key_7{
|
||||
key-name = "lang";
|
||||
key-device = "normal";
|
||||
key-permit = "read","write","del";
|
||||
};
|
||||
keysn_8:key_8{
|
||||
key-name = "country";
|
||||
key-device = "normal";
|
||||
key-permit = "read","write","del";
|
||||
};
|
||||
keysn_9:key_9{
|
||||
key-name = "locale_lang";
|
||||
key-device = "normal";
|
||||
key-permit = "read","write","del";
|
||||
};
|
||||
keysn_10:key_10{
|
||||
key-name = "locale_region";
|
||||
key-device = "normal";
|
||||
key-permit = "read","write","del";
|
||||
};
|
||||
};//End unifykey
|
||||
audio_data: audio_data {
|
||||
@@ -1378,3 +1396,16 @@
|
||||
&audio_data{
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&spicc0 {
|
||||
status = "okay";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&spi0_pins>;
|
||||
// cs-gpios = <&gpio GPIOH_20 0>;
|
||||
spidev {
|
||||
compatible = "rohm,dh2228fv";
|
||||
status = "okay";
|
||||
reg = <0>;
|
||||
spi-max-frequency = <3340000>;
|
||||
};
|
||||
};
|
||||
|
||||
1739
arch/arm/boot/dts/amlogic/axg_s400_v03gva_sbr.dts
Normal file
1739
arch/arm/boot/dts/amlogic/axg_s400_v03gva_sbr.dts
Normal file
File diff suppressed because it is too large
Load Diff
@@ -170,7 +170,9 @@
|
||||
ethmac: ethernet@0xff3f0000 {
|
||||
compatible = "amlogic, gxbb-eth-dwmac";
|
||||
reg = <0xff3f0000 0x10000
|
||||
0xff634540 0x8>;
|
||||
0xff634540 0x8
|
||||
0xff634558 0xc
|
||||
0xffd01008 0x4>;
|
||||
interrupts = <0 8 1>;
|
||||
pinctrl-names = "external_eth_pins";
|
||||
pinctrl-0 = <&external_eth_pins>;
|
||||
@@ -848,15 +850,15 @@
|
||||
adc_keypad {
|
||||
compatible = "amlogic, adc_keypad";
|
||||
status = "okay";
|
||||
key_name = "power", "vol-", "vol+", "wifi", "<<", ">>";
|
||||
key_num = <6>;
|
||||
key_name = "power", "vol-", "sos+", "wifi", "<<", ">>", "vol+";
|
||||
key_num = <7>;
|
||||
io-channels = <&saradc SARADC_CH0>;
|
||||
io-channel-names = "key-chan-0";
|
||||
key_chan = <SARADC_CH0 SARADC_CH0 SARADC_CH0
|
||||
SARADC_CH0 SARADC_CH0 SARADC_CH0>;
|
||||
key_code = <116 114 115 139 105 106>;
|
||||
key_val = <0 143 266 389 512 635>; //val=voltage/1800mV*1023
|
||||
key_tolerance = <40 40 40 40 40 40>;
|
||||
SARADC_CH0 SARADC_CH0 SARADC_CH0 SARADC_CH0>;
|
||||
key_code = <116 114 115 139 105 106 107>;
|
||||
key_val = <0 143 266 389 512 635 840>; //val=voltage/1800mV*1023
|
||||
key_tolerance = <40 40 40 40 40 40 40>;
|
||||
};
|
||||
|
||||
unifykey{
|
||||
@@ -1299,7 +1301,7 @@
|
||||
* 6: "Enable:176K",
|
||||
* 7: "Enable:192K",
|
||||
*/
|
||||
auto_asrc = <3>;
|
||||
auto_asrc = <0>;
|
||||
status = "okay";
|
||||
};
|
||||
aml_pdm: pdm {
|
||||
@@ -1348,10 +1350,10 @@
|
||||
* 4: pdmin;
|
||||
*/
|
||||
datain_src = <4>;
|
||||
datain_chnum = <6>;
|
||||
datain_chmask = <0x3f>;
|
||||
datain_chnum = <8>;
|
||||
datain_chmask = <0xff>;
|
||||
/* config which data pin for loopback */
|
||||
datain-lane-mask-in = <1 1 1 0>;
|
||||
datain-lane-mask-in = <1 1 1 1>;
|
||||
|
||||
/* calc mclk for datalb */
|
||||
mclk-fs = <256>;
|
||||
@@ -1368,10 +1370,10 @@
|
||||
*/
|
||||
/* if tdmin_lb >= 3, use external loopback */
|
||||
datalb_src = <2>;
|
||||
datalb_chnum = <2>;
|
||||
datalb_chmask = <0x3>;
|
||||
datalb_chnum = <8>;
|
||||
datalb_chmask = <0xff>;
|
||||
/* config which data pin as loopback */
|
||||
datalb-lane-mask-in = <1 0 0 0>;
|
||||
datalb-lane-mask-in = <1 1 1 1>;
|
||||
|
||||
status = "okay";
|
||||
};
|
||||
@@ -1393,7 +1395,7 @@
|
||||
* LOOPBACK,
|
||||
*/
|
||||
resample_module = <3>;
|
||||
status = "okay";
|
||||
status = "disabled";
|
||||
};
|
||||
aml_pwrdet: pwrdet {
|
||||
compatible = "amlogic, axg-power-detect";
|
||||
@@ -1724,7 +1726,7 @@
|
||||
mapname = "amlogic-remote-3";
|
||||
customcode = <0xa4e8>; /* Reference Remote Control */
|
||||
release_delay = <80>;
|
||||
size = <22>;
|
||||
size = <45>;
|
||||
keymap = <
|
||||
REMOTE_KEY(0xc7, 200) /* power */
|
||||
REMOTE_KEY(0x93, 201) /* eject-->input source */
|
||||
@@ -1748,6 +1750,29 @@
|
||||
REMOTE_KEY(0x68, 219) /* HFILT */
|
||||
REMOTE_KEY(0x69, 220) /* Loundness */
|
||||
REMOTE_KEY(0x60, 221) /* Audio_info */
|
||||
REMOTE_KEY(0xb1, 222) /* CD */
|
||||
REMOTE_KEY(0xb4, 223) /* CD */
|
||||
REMOTE_KEY(0xb9, 224) /* CD */
|
||||
REMOTE_KEY(0xab, 225) /* CD */
|
||||
REMOTE_KEY(0x91, 226) /* CD */
|
||||
REMOTE_KEY(0x92, 227) /* CD */
|
||||
REMOTE_KEY(0x89, 228) /* CD */
|
||||
REMOTE_KEY(0x88, 229) /* CD */
|
||||
REMOTE_KEY(0xa5, 230) /* CD */
|
||||
REMOTE_KEY(0x84, 231) /* CD */
|
||||
REMOTE_KEY(0x72, 232) /* CD */
|
||||
REMOTE_KEY(0x73, 233) /* CD */
|
||||
REMOTE_KEY(0x9a, 234) /* CD */
|
||||
REMOTE_KEY(0x9b, 235) /* CD */
|
||||
REMOTE_KEY(0xa0, 236) /* CD */
|
||||
REMOTE_KEY(0x71, 237) /* CD */
|
||||
REMOTE_KEY(0x74, 238) /* CD */
|
||||
REMOTE_KEY(0x75, 239) /* CD */
|
||||
REMOTE_KEY(0x7e, 240) /* CD */
|
||||
REMOTE_KEY(0x7f, 241) /* CD */
|
||||
REMOTE_KEY(0x7a, 242) /* CD */
|
||||
REMOTE_KEY(0xa7, 243) /* CD */
|
||||
REMOTE_KEY(0xa9, 244) /* CD */
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
||||
@@ -179,7 +179,9 @@
|
||||
ethmac: ethernet@0xff3f0000 {
|
||||
compatible = "amlogic, gxbb-eth-dwmac";
|
||||
reg = <0xff3f0000 0x10000
|
||||
0xff634540 0x8>;
|
||||
0xff634540 0x8
|
||||
0xff634558 0xc
|
||||
0xffd01008 0x4>;
|
||||
interrupts = <0 8 1>;
|
||||
pinctrl-names = "external_eth_pins";
|
||||
pinctrl-0 = <&external_eth_pins>;
|
||||
|
||||
@@ -315,14 +315,6 @@
|
||||
pinctrl-0 = <&b_uart_pins>;
|
||||
};
|
||||
|
||||
meson-irblaster {
|
||||
compatible = "amlogic, am_irblaster";
|
||||
dev_name = "meson-irblaster";
|
||||
status = "disable";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&irblaster_pins>;
|
||||
};
|
||||
|
||||
/* Sound iomap */
|
||||
aml_snd_iomap {
|
||||
compatible = "amlogic, snd-iomap";
|
||||
@@ -668,13 +660,17 @@
|
||||
compatible = "amlogic, unifykey";
|
||||
status = "ok";
|
||||
|
||||
unifykey-num = <6>;
|
||||
unifykey-num = <11>;
|
||||
unifykey-index-0 = <&keysn_0>;
|
||||
unifykey-index-1 = <&keysn_1>;
|
||||
unifykey-index-2 = <&keysn_2>;
|
||||
unifykey-index-3 = <&keysn_3>;
|
||||
unifykey-index-4 = <&keysn_4>;
|
||||
unifykey-index-5 = <&keysn_5>;
|
||||
unifykey-index-7 = <&keysn_7>;
|
||||
unifykey-index-8 = <&keysn_8>;
|
||||
unifykey-index-9 = <&keysn_9>;
|
||||
unifykey-index-10 = <&keysn_10>;
|
||||
|
||||
keysn_0: key_0{
|
||||
key-name = "usid";
|
||||
@@ -708,6 +704,26 @@
|
||||
key-device = "normal";
|
||||
key-permit = "read","write","del";
|
||||
};
|
||||
keysn_7:key_7{
|
||||
key-name = "lang";
|
||||
key-device = "normal";
|
||||
key-permit = "read","write","del";
|
||||
};
|
||||
keysn_8:key_8{
|
||||
key-name = "country";
|
||||
key-device = "normal";
|
||||
key-permit = "read","write","del";
|
||||
};
|
||||
keysn_9:key_9{
|
||||
key-name = "locale_lang";
|
||||
key-device = "normal";
|
||||
key-permit = "read","write","del";
|
||||
};
|
||||
keysn_10:key_10{
|
||||
key-name = "locale_region";
|
||||
key-device = "normal";
|
||||
key-permit = "read","write","del";
|
||||
};
|
||||
};//End unifykey
|
||||
audio_data: audio_data {
|
||||
compatible = "amlogic, audio_data";
|
||||
@@ -1193,3 +1209,16 @@
|
||||
&audio_data{
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&spicc0 {
|
||||
status = "okay";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&spi0_pins>;
|
||||
// cs-gpios = <&gpio GPIOH_20 0>;
|
||||
spidev {
|
||||
compatible = "rohm,dh2228fv";
|
||||
status = "okay";
|
||||
reg = <0>;
|
||||
spi-max-frequency = <3340000>;
|
||||
};
|
||||
};
|
||||
|
||||
@@ -604,7 +604,7 @@
|
||||
/* suffix-name, sync with android audio hal
|
||||
* what's the dai link used for
|
||||
*/
|
||||
suffix-name = "alsaPORT-spdifb2hdmi";
|
||||
suffix-name = "alsaPORT-spdifb";
|
||||
cpu {
|
||||
sound-dai = <&aml_spdif_b>;
|
||||
system-clock-frequency = <6144000>;
|
||||
|
||||
@@ -379,7 +379,7 @@
|
||||
unifykey{
|
||||
compatible = "amlogic, unifykey";
|
||||
status = "ok";
|
||||
unifykey-num = <17>;
|
||||
unifykey-num = <18>;
|
||||
unifykey-index-0 = <&keysn_0>;
|
||||
unifykey-index-1 = <&keysn_1>;
|
||||
unifykey-index-2 = <&keysn_2>;
|
||||
@@ -397,6 +397,7 @@
|
||||
unifykey-index-14= <&keysn_14>;
|
||||
unifykey-index-15= <&keysn_15>;
|
||||
unifykey-index-16= <&keysn_16>;
|
||||
unifykey-index-17= <&keysn_17>;
|
||||
|
||||
keysn_0: key_0{
|
||||
key-name = "usid";
|
||||
@@ -486,6 +487,11 @@
|
||||
key-device = "secure";
|
||||
key-permit = "read","write","del";
|
||||
};
|
||||
keysn_17:key_17{
|
||||
key-name = "attestationdevidbox";// attest dev id box
|
||||
key-device = "secure";
|
||||
key-permit = "read","write","del";
|
||||
};
|
||||
};//End unifykey
|
||||
|
||||
efusekey:efusekey{
|
||||
@@ -689,7 +695,7 @@
|
||||
/* suffix-name, sync with android audio hal
|
||||
* what's the dai link used for
|
||||
*/
|
||||
suffix-name = "alsaPORT-spdifb2hdmi";
|
||||
suffix-name = "alsaPORT-spdif";
|
||||
cpu {
|
||||
sound-dai = <&aml_spdif>;
|
||||
system-clock-frequency = <6144000>;
|
||||
@@ -705,7 +711,7 @@
|
||||
/* suffix-name, sync with android audio hal
|
||||
* what's the dai link used for
|
||||
*/
|
||||
suffix-name = "alsaPORT-spdif";
|
||||
suffix-name = "alsaPORT-spdifb";
|
||||
cpu {
|
||||
sound-dai = <&aml_spdif_b>;
|
||||
system-clock-frequency = <6144000>;
|
||||
@@ -950,44 +956,32 @@
|
||||
}; /* end of / */
|
||||
|
||||
&CPU0 {
|
||||
/*set differents table cpufreq max*/
|
||||
diff_tables_supply;
|
||||
hispeed_cpufreq_max = <2100>;
|
||||
medspeed_cpufreq_max = <1908>;
|
||||
lospeed_cpufreq_max = <1800>;
|
||||
/*set multi table cpufreq max*/
|
||||
/*multi_tables_available;*/
|
||||
operating-points-v2 = <&cpu_opp_table0>,
|
||||
<&cpu_opp_table1>,
|
||||
<&cpu_opp_table2>;
|
||||
};
|
||||
|
||||
&CPU1 {
|
||||
/*set differents table cpufreq max*/
|
||||
diff_tables_supply;
|
||||
hispeed_cpufreq_max = <2100>;
|
||||
medspeed_cpufreq_max = <1908>;
|
||||
lospeed_cpufreq_max = <1800>;
|
||||
/*set multi table cpufreq max*/
|
||||
/*multi_tables_available;*/
|
||||
operating-points-v2 = <&cpu_opp_table0>,
|
||||
<&cpu_opp_table1>,
|
||||
<&cpu_opp_table2>;
|
||||
};
|
||||
|
||||
&CPU2 {
|
||||
/*set differents table cpufreq max*/
|
||||
diff_tables_supply;
|
||||
hispeed_cpufreq_max = <2100>;
|
||||
medspeed_cpufreq_max = <1908>;
|
||||
lospeed_cpufreq_max = <1800>;
|
||||
/*set multi table cpufreq max*/
|
||||
/*multi_tables_available;*/
|
||||
operating-points-v2 = <&cpu_opp_table0>,
|
||||
<&cpu_opp_table1>,
|
||||
<&cpu_opp_table2>;
|
||||
};
|
||||
|
||||
&CPU3 {
|
||||
/*set differents table cpufreq max*/
|
||||
diff_tables_supply;
|
||||
hispeed_cpufreq_max = <2100>;
|
||||
medspeed_cpufreq_max = <1908>;
|
||||
lospeed_cpufreq_max = <1800>;
|
||||
/*set multi table cpufreq max*/
|
||||
/*multi_tables_available;*/
|
||||
operating-points-v2 = <&cpu_opp_table0>,
|
||||
<&cpu_opp_table1>,
|
||||
<&cpu_opp_table2>;
|
||||
|
||||
@@ -383,7 +383,7 @@
|
||||
unifykey{
|
||||
compatible = "amlogic, unifykey";
|
||||
status = "ok";
|
||||
unifykey-num = <17>;
|
||||
unifykey-num = <18>;
|
||||
unifykey-index-0 = <&keysn_0>;
|
||||
unifykey-index-1 = <&keysn_1>;
|
||||
unifykey-index-2 = <&keysn_2>;
|
||||
@@ -401,6 +401,7 @@
|
||||
unifykey-index-14= <&keysn_14>;
|
||||
unifykey-index-15= <&keysn_15>;
|
||||
unifykey-index-16= <&keysn_16>;
|
||||
unifykey-index-17= <&keysn_17>;
|
||||
|
||||
keysn_0: key_0{
|
||||
key-name = "usid";
|
||||
@@ -490,6 +491,11 @@
|
||||
key-device = "secure";
|
||||
key-permit = "read","write","del";
|
||||
};
|
||||
keysn_17:key_17{
|
||||
key-name = "attestationdevidbox";// attest dev id box
|
||||
key-device = "secure";
|
||||
key-permit = "read","write","del";
|
||||
};
|
||||
};//End unifykey
|
||||
|
||||
efusekey:efusekey{
|
||||
@@ -706,7 +712,7 @@
|
||||
/* suffix-name, sync with android audio hal
|
||||
* what's the dai link used for
|
||||
*/
|
||||
suffix-name = "alsaPORT-spdifb2hdmi";
|
||||
suffix-name = "alsaPORT-spdifb";
|
||||
cpu {
|
||||
sound-dai = <&aml_spdif_b>;
|
||||
system-clock-frequency = <6144000>;
|
||||
|
||||
@@ -19,6 +19,7 @@
|
||||
|
||||
#include "mesong12a.dtsi"
|
||||
#include "mesong12a_skt-panel.dtsi"
|
||||
#include "mesong12a_drm.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Amlogic";
|
||||
@@ -706,7 +707,7 @@
|
||||
/* suffix-name, sync with android audio hal
|
||||
* what's the dai link used for
|
||||
*/
|
||||
suffix-name = "alsaPORT-spdifb2hdmi";
|
||||
suffix-name = "alsaPORT-spdifb";
|
||||
cpu {
|
||||
sound-dai = <&aml_spdif_b>;
|
||||
system-clock-frequency = <6144000>;
|
||||
|
||||
@@ -19,6 +19,7 @@
|
||||
|
||||
#include "mesong12a.dtsi"
|
||||
#include "mesong12a_skt-panel.dtsi"
|
||||
#include "mesong12a_drm.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Amlogic";
|
||||
@@ -692,7 +693,7 @@
|
||||
/* suffix-name, sync with android audio hal
|
||||
* what's the dai link used for
|
||||
*/
|
||||
suffix-name = "alsaPORT-spdifb2hdmi";
|
||||
suffix-name = "alsaPORT-spdifb";
|
||||
cpu {
|
||||
sound-dai = <&aml_spdif_b>;
|
||||
system-clock-frequency = <6144000>;
|
||||
|
||||
@@ -707,7 +707,7 @@
|
||||
/* suffix-name, sync with android audio hal
|
||||
* what's the dai link used for
|
||||
*/
|
||||
suffix-name = "alsaPORT-spdifb2hdmi";
|
||||
suffix-name = "alsaPORT-spdifb";
|
||||
cpu {
|
||||
sound-dai = <&aml_spdif_b>;
|
||||
system-clock-frequency = <6144000>;
|
||||
@@ -819,6 +819,7 @@
|
||||
&drm_vpu {
|
||||
status = "okay";
|
||||
logo_addr = "0x7f800000";
|
||||
osd_ver = /bits/ 8 <OSD_V1>;
|
||||
};
|
||||
|
||||
&drm_amhdmitx {
|
||||
|
||||
@@ -687,7 +687,7 @@
|
||||
/* suffix-name, sync with android audio hal
|
||||
* what's the dai link used for
|
||||
*/
|
||||
suffix-name = "alsaPORT-spdifb2hdmi";
|
||||
suffix-name = "alsaPORT-spdif";
|
||||
cpu {
|
||||
sound-dai = <&aml_spdif>;
|
||||
system-clock-frequency = <6144000>;
|
||||
@@ -703,7 +703,7 @@
|
||||
/* suffix-name, sync with android audio hal
|
||||
* what's the dai link used for
|
||||
*/
|
||||
suffix-name = "alsaPORT-spdif";
|
||||
suffix-name = "alsaPORT-spdifb";
|
||||
cpu {
|
||||
sound-dai = <&aml_spdif_b>;
|
||||
system-clock-frequency = <6144000>;
|
||||
@@ -1656,9 +1656,9 @@
|
||||
|
||||
&gpu{
|
||||
tbl = <&dvfs285_cfg
|
||||
&dvfs400_cfg
|
||||
&dvfs500_cfg
|
||||
&dvfs666_cfg
|
||||
&dvfs800_cfg
|
||||
&dvfs800_cfg>;
|
||||
&dvfs400_cfg
|
||||
&dvfs500_cfg
|
||||
&dvfs666_cfg
|
||||
&dvfs800_cfg
|
||||
&dvfs800_cfg>;
|
||||
};
|
||||
|
||||
@@ -307,6 +307,23 @@
|
||||
dev_name = "ionvideo";
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
amlvideo2_0 {
|
||||
compatible = "amlogic, amlvideo2";
|
||||
dev_name = "amlvideo2";
|
||||
status = "okay";
|
||||
amlvideo2_id = <0>;
|
||||
cma_mode = <1>;
|
||||
};
|
||||
|
||||
amlvideo2_1 {
|
||||
compatible = "amlogic, amlvideo2";
|
||||
dev_name = "amlvideo2";
|
||||
status = "okay";
|
||||
amlvideo2_id = <1>;
|
||||
cma_mode = <1>;
|
||||
};
|
||||
|
||||
vm0 {
|
||||
compatible = "amlogic, vm";
|
||||
memory-region = <&vm0_cma_reserved>;
|
||||
@@ -707,7 +724,7 @@
|
||||
/* suffix-name, sync with android audio hal
|
||||
* what's the dai link used for
|
||||
*/
|
||||
suffix-name = "alsaPORT-spdifb2hdmi";
|
||||
suffix-name = "alsaPORT-spdifb";
|
||||
cpu {
|
||||
sound-dai = <&aml_spdif_b>;
|
||||
system-clock-frequency = <6144000>;
|
||||
@@ -1500,9 +1517,9 @@
|
||||
|
||||
&gpu{
|
||||
tbl = <&dvfs285_cfg
|
||||
&dvfs400_cfg
|
||||
&dvfs500_cfg
|
||||
&dvfs666_cfg
|
||||
&dvfs800_cfg
|
||||
&dvfs800_cfg>;
|
||||
&dvfs400_cfg
|
||||
&dvfs500_cfg
|
||||
&dvfs666_cfg
|
||||
&dvfs800_cfg
|
||||
&dvfs800_cfg>;
|
||||
};
|
||||
|
||||
@@ -631,7 +631,7 @@
|
||||
/* suffix-name, sync with android audio hal
|
||||
* what's the dai link used for
|
||||
*/
|
||||
suffix-name = "alsaPORT-spdifb2hdmi";
|
||||
suffix-name = "alsaPORT-spdif";
|
||||
cpu {
|
||||
sound-dai = <&aml_spdif>;
|
||||
system-clock-frequency = <6144000>;
|
||||
@@ -647,7 +647,7 @@
|
||||
/* suffix-name, sync with android audio hal
|
||||
* what's the dai link used for
|
||||
*/
|
||||
suffix-name = "alsaPORT-spdif";
|
||||
suffix-name = "alsaPORT-spdifb";
|
||||
cpu {
|
||||
sound-dai = <&aml_spdif_b>;
|
||||
system-clock-frequency = <6144000>;
|
||||
|
||||
@@ -623,7 +623,7 @@
|
||||
/* suffix-name, sync with android audio hal
|
||||
* what's the dai link used for
|
||||
*/
|
||||
suffix-name = "alsaPORT-spdifb2hdmi";
|
||||
suffix-name = "alsaPORT-spdif";
|
||||
cpu {
|
||||
sound-dai = <&aml_spdif>;
|
||||
system-clock-frequency = <6144000>;
|
||||
@@ -639,7 +639,7 @@
|
||||
/* suffix-name, sync with android audio hal
|
||||
* what's the dai link used for
|
||||
*/
|
||||
suffix-name = "alsaPORT-spdif";
|
||||
suffix-name = "alsaPORT-spdifb";
|
||||
cpu {
|
||||
sound-dai = <&aml_spdif_b>;
|
||||
system-clock-frequency = <6144000>;
|
||||
|
||||
@@ -618,7 +618,7 @@
|
||||
/* suffix-name, sync with android audio hal
|
||||
* what's the dai link used for
|
||||
*/
|
||||
suffix-name = "alsaPORT-spdifb2hdmi";
|
||||
suffix-name = "alsaPORT-spdif";
|
||||
cpu {
|
||||
sound-dai = <&aml_spdif>;
|
||||
system-clock-frequency = <6144000>;
|
||||
@@ -634,7 +634,7 @@
|
||||
/* suffix-name, sync with android audio hal
|
||||
* what's the dai link used for
|
||||
*/
|
||||
suffix-name = "alsaPORT-spdif";
|
||||
suffix-name = "alsaPORT-spdifb";
|
||||
cpu {
|
||||
sound-dai = <&aml_spdif_b>;
|
||||
system-clock-frequency = <6144000>;
|
||||
|
||||
@@ -18,9 +18,11 @@
|
||||
/dts-v1/;
|
||||
|
||||
#include "mesong12a.dtsi"
|
||||
#include "mesong12a_drm.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Amlogic";
|
||||
amlogic-dt-id = "g12a_u211_2g";
|
||||
compatible = "amlogic, g12a";
|
||||
interrupt-parent = <&gic>;
|
||||
#address-cells = <1>;
|
||||
@@ -724,7 +726,7 @@
|
||||
/* suffix-name, sync with android audio hal
|
||||
* what's the dai link used for
|
||||
*/
|
||||
suffix-name = "alsaPORT-spdifb2hdmi";
|
||||
suffix-name = "alsaPORT-spdifb";
|
||||
cpu {
|
||||
sound-dai = <&aml_spdif_b>;
|
||||
system-clock-frequency = <6144000>;
|
||||
|
||||
@@ -318,47 +318,126 @@
|
||||
dev_name = "ionvideo";
|
||||
status = "okay";
|
||||
};
|
||||
/*dvb {
|
||||
* compatible = "amlogic, dvb";
|
||||
* dev_name = "dvb";
|
||||
*
|
||||
* fe0_mode = "external";
|
||||
* fe0_demod = "Atbm8881";
|
||||
* fe0_i2c_adap_id = <&i2c2>;
|
||||
* fe0_demod_i2c_addr = <0xc0>;
|
||||
* fe0_ts = <1>;
|
||||
* fe0_reset_value = <0>;
|
||||
* fe0_reset_gpio = <&gpio GPIOZ_1 GPIO_ACTIVE_HIGH>;
|
||||
*
|
||||
* ts1 = "parallel";
|
||||
* ts1_control = <0>;
|
||||
* ts1_invert = <0>;
|
||||
* interrupts = <0 23 1
|
||||
* 0 5 1
|
||||
* 0 21 1
|
||||
* 0 19 1
|
||||
* 0 25 1
|
||||
* 0 18 1
|
||||
* 0 24 1>;
|
||||
* interrupt-names = "demux0_irq",
|
||||
* "demux1_irq",
|
||||
* "demux2_irq",
|
||||
* "dvr0_irq",
|
||||
* "dvr1_irq",
|
||||
* "dvrfill0_fill",
|
||||
* "dvrfill1_flush";
|
||||
* pinctrl-names = "p_ts1";
|
||||
* pinctrl-0 = <&dvb_p_ts1_pins>;
|
||||
* clocks = <&clkc CLKID_DEMUX
|
||||
* &clkc CLKID_AHB_ARB0
|
||||
* &clkc CLKID_DOS_PARSER>;
|
||||
* clock-names = "demux", "ahbarb0", "parser_top";
|
||||
*};
|
||||
|
||||
amlvideo2_0 {
|
||||
compatible = "amlogic, amlvideo2";
|
||||
dev_name = "amlvideo2";
|
||||
status = "okay";
|
||||
amlvideo2_id = <0>;
|
||||
cma_mode = <1>;
|
||||
};
|
||||
|
||||
amlvideo2_1 {
|
||||
compatible = "amlogic, amlvideo2";
|
||||
dev_name = "amlvideo2";
|
||||
status = "okay";
|
||||
amlvideo2_id = <1>;
|
||||
cma_mode = <1>;
|
||||
};
|
||||
|
||||
dvb {
|
||||
compatible = "amlogic, dvb";
|
||||
dev_name = "dvb";
|
||||
|
||||
// fe0_mode = "external";
|
||||
// fe0_demod = "Atbm8881";
|
||||
// fe0_i2c_adap_id = <&i2c2>;
|
||||
// fe0_demod_i2c_addr = <0xc0>;
|
||||
// fe0_ts = <1>;
|
||||
// fe0_reset_value = <0>;
|
||||
// fe0_reset_gpio = <&gpio GPIOZ_1 GPIO_ACTIVE_HIGH>;
|
||||
|
||||
// ts1 = "parallel";
|
||||
// ts1_control = <0>;
|
||||
// ts1_invert = <0>;
|
||||
interrupts = <0 23 1
|
||||
0 5 1
|
||||
0 21 1
|
||||
0 19 1
|
||||
0 25 1
|
||||
0 18 1
|
||||
0 24 1>;
|
||||
interrupt-names = "demux0_irq",
|
||||
"demux1_irq",
|
||||
"demux2_irq",
|
||||
"dvr0_irq",
|
||||
"dvr1_irq",
|
||||
"dvrfill0_fill",
|
||||
"dvrfill1_flush";
|
||||
// pinctrl-names = "p_ts1";
|
||||
// pinctrl-0 = <&dvb_p_ts1_pins>;
|
||||
clocks = <&clkc CLKID_DEMUX
|
||||
&clkc CLKID_AHB_ARB0
|
||||
&clkc CLKID_DOS_PARSER>;
|
||||
clock-names = "demux", "ahbarb0", "parser_top";
|
||||
};
|
||||
|
||||
/*this just for U212-D814(dual demod)*/
|
||||
/* dvb {
|
||||
* compatible = "amlogic, dvb";
|
||||
* dev_name = "dvb";
|
||||
|
||||
* fe0_mode = "external";
|
||||
* fe0_demod = "Si2168";
|
||||
* fe0_i2c_adap_id = <&i2c2>;
|
||||
* fe0_demod_i2c_addr = <0x64>;
|
||||
* fe0_ts = <1>;
|
||||
* fe0_reset_value = <0>;
|
||||
* fe0_reset_gpio = <&gpio GPIOZ_1 GPIO_ACTIVE_HIGH>;
|
||||
* fe0_tuner0_i2c_addr = <0x61>;//dvb-t addr
|
||||
* fe0_tuner1_i2c_addr = <0x62>;//dvb-s addr
|
||||
* fe0_tuner0_code = <0x2151>;
|
||||
* fe0_tuner1_code = <0xA2018>;
|
||||
|
||||
* ts1 = "parallel";
|
||||
* ts1_control = <0>;
|
||||
* ts1_invert = <0>;
|
||||
|
||||
* fe1_mode = "external";
|
||||
* fe1_demod = "Si2168-1";
|
||||
* fe1_i2c_adap_id = <&i2c2>;
|
||||
* fe1_demod_i2c_addr = <0x67>;
|
||||
* fe1_ts = <0>;
|
||||
* fe1_reset_value = <0>;
|
||||
* fe1_reset_gpio = <&gpio GPIOZ_0 GPIO_ACTIVE_HIGH>;
|
||||
* fe1_tuner0_i2c_addr = <0x62>;//dvb-t addr
|
||||
* fe1_tuner1_i2c_addr = <0x63>;//dvb-s addr
|
||||
* fe1_tuner_code0 = <0x2151>;
|
||||
* fe1_tuner_code1 = <0xA2018>;
|
||||
|
||||
* ts0 = "serial";
|
||||
* ts0_control = <0x800>;
|
||||
* ts0_invert = <0>;
|
||||
|
||||
* interrupts = <0 23 1
|
||||
* 0 5 1
|
||||
* 0 21 1
|
||||
* 0 19 1
|
||||
* 0 25 1
|
||||
* 0 18 1
|
||||
* 0 24 1>;
|
||||
* interrupt-names = "demux0_irq",
|
||||
* "demux1_irq",
|
||||
* "demux2_irq",
|
||||
* "dvr0_irq",
|
||||
* "dvr1_irq",
|
||||
* "dvrfill0_fill",
|
||||
* "dvrfill1_flush";
|
||||
* pinctrl-names = "s_ts0","p_ts1";
|
||||
* pinctrl-0 = <&dvb_s_ts0_pins>;
|
||||
* pinctrl-1 = <&dvb_p_ts1_pins>;
|
||||
|
||||
* clocks = <&clkc CLKID_DEMUX
|
||||
* &clkc CLKID_AHB_ARB0
|
||||
* &clkc CLKID_DOS_PARSER>;
|
||||
* clock-names = "demux", "ahbarb0", "parser_top";
|
||||
* };
|
||||
*/
|
||||
|
||||
unifykey{
|
||||
compatible = "amlogic, unifykey";
|
||||
status = "ok";
|
||||
unifykey-num = <16>;
|
||||
unifykey-num = <17>;
|
||||
unifykey-index-0 = <&keysn_0>;
|
||||
unifykey-index-1 = <&keysn_1>;
|
||||
unifykey-index-2 = <&keysn_2>;
|
||||
@@ -375,6 +454,7 @@
|
||||
unifykey-index-13= <&keysn_13>;
|
||||
unifykey-index-14= <&keysn_14>;
|
||||
unifykey-index-15= <&keysn_15>;
|
||||
unifykey-index-16= <&keysn_16>;
|
||||
keysn_0: key_0{
|
||||
key-name = "usid";
|
||||
key-device = "normal";
|
||||
@@ -458,6 +538,11 @@
|
||||
key-device = "secure";
|
||||
key-permit = "read","write","del";
|
||||
};
|
||||
keysn_16:key_16{
|
||||
key-name = "attestationdevidbox";// attest dev id box
|
||||
key-device = "secure";
|
||||
key-permit = "read","write","del";
|
||||
};
|
||||
};//End unifykey
|
||||
|
||||
efusekey:efusekey{
|
||||
@@ -658,7 +743,7 @@
|
||||
/* suffix-name, sync with android audio hal
|
||||
* what's the dai link used for
|
||||
*/
|
||||
suffix-name = "alsaPORT-spdifb2hdmi";
|
||||
suffix-name = "alsaPORT-spdif";
|
||||
cpu {
|
||||
sound-dai = <&aml_spdif>;
|
||||
system-clock-frequency = <6144000>;
|
||||
@@ -674,7 +759,7 @@
|
||||
/* suffix-name, sync with android audio hal
|
||||
* what's the dai link used for
|
||||
*/
|
||||
suffix-name = "alsaPORT-spdif";
|
||||
suffix-name = "alsaPORT-spdifb";
|
||||
cpu {
|
||||
sound-dai = <&aml_spdif_b>;
|
||||
system-clock-frequency = <6144000>;
|
||||
@@ -815,6 +900,9 @@
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/*
|
||||
* it's conflict with TSIN_B reset pin
|
||||
*/
|
||||
&i2c0 {
|
||||
status = "okay";
|
||||
pinctrl-names="default";
|
||||
@@ -1235,8 +1323,6 @@
|
||||
function = "pdm";
|
||||
};
|
||||
};
|
||||
|
||||
|
||||
}; /* end of pinctrl_periphs */
|
||||
&pinctrl_aobus {
|
||||
/*gpiao_10*/
|
||||
@@ -1246,6 +1332,17 @@
|
||||
/* function = "spdif_out_ao";*/
|
||||
/* }; */
|
||||
/*}; */
|
||||
|
||||
/*dvb_s_ts0_pins: dvb_s_ts0_pins {*/
|
||||
/* tsin_a{ */
|
||||
/* groups = "tsin_a_din0_ao",*/
|
||||
/* "tsin_a_clk_ao", */
|
||||
/* "tsin_a_sop_ao", */
|
||||
/* "tsin_a_valid_ao"; */
|
||||
/* function = "tsin_a_ao"; */
|
||||
/* }; */
|
||||
/*}; */
|
||||
|
||||
}; /* end of pinctrl_aobus */
|
||||
|
||||
&audio_data {
|
||||
@@ -1278,6 +1375,7 @@
|
||||
/** 0: normal, 1: otg+dwc3 host only, 2: otg+dwc3 device only*/
|
||||
controller-type = <1>;
|
||||
};
|
||||
|
||||
ðmac {
|
||||
status = "okay";
|
||||
pinctrl-names = "internal_eth_pins", "internal_gpio_pins";
|
||||
|
||||
@@ -316,43 +316,60 @@
|
||||
dev_name = "ionvideo";
|
||||
status = "okay";
|
||||
};
|
||||
/*dvb {
|
||||
* compatible = "amlogic, dvb";
|
||||
* dev_name = "dvb";
|
||||
*
|
||||
* fe0_mode = "external";
|
||||
* fe0_demod = "Atbm8881";
|
||||
* fe0_i2c_adap_id = <&i2c2>;
|
||||
* fe0_demod_i2c_addr = <0xc0>;
|
||||
* fe0_ts = <1>;
|
||||
* fe0_reset_value = <0>;
|
||||
* fe0_reset_gpio = <&gpio GPIOZ_1 GPIO_ACTIVE_HIGH>;
|
||||
*
|
||||
* ts1 = "parallel";
|
||||
* ts1_control = <0>;
|
||||
* ts1_invert = <0>;
|
||||
* interrupts = <0 23 1
|
||||
* 0 5 1
|
||||
* 0 21 1
|
||||
* 0 19 1
|
||||
* 0 25 1
|
||||
* 0 18 1
|
||||
* 0 24 1>;
|
||||
* interrupt-names = "demux0_irq",
|
||||
* "demux1_irq",
|
||||
* "demux2_irq",
|
||||
* "dvr0_irq",
|
||||
* "dvr1_irq",
|
||||
* "dvrfill0_fill",
|
||||
* "dvrfill1_flush";
|
||||
* pinctrl-names = "p_ts1";
|
||||
* pinctrl-0 = <&dvb_p_ts1_pins>;
|
||||
* clocks = <&clkc CLKID_DEMUX
|
||||
* &clkc CLKID_AHB_ARB0
|
||||
* &clkc CLKID_DOS_PARSER>;
|
||||
* clock-names = "demux", "ahbarb0", "parser_top";
|
||||
*};
|
||||
*/
|
||||
|
||||
amlvideo2_0 {
|
||||
compatible = "amlogic, amlvideo2";
|
||||
dev_name = "amlvideo2";
|
||||
status = "okay";
|
||||
amlvideo2_id = <0>;
|
||||
cma_mode = <1>;
|
||||
};
|
||||
|
||||
amlvideo2_1 {
|
||||
compatible = "amlogic, amlvideo2";
|
||||
dev_name = "amlvideo2";
|
||||
status = "okay";
|
||||
amlvideo2_id = <1>;
|
||||
cma_mode = <1>;
|
||||
};
|
||||
|
||||
dvb {
|
||||
compatible = "amlogic, dvb";
|
||||
dev_name = "dvb";
|
||||
|
||||
// fe0_mode = "external";
|
||||
// fe0_demod = "Atbm8881";
|
||||
// fe0_i2c_adap_id = <&i2c2>;
|
||||
// fe0_demod_i2c_addr = <0xc0>;
|
||||
// fe0_ts = <1>;
|
||||
// fe0_reset_value = <0>;
|
||||
// fe0_reset_gpio = <&gpio GPIOZ_1 GPIO_ACTIVE_HIGH>;
|
||||
|
||||
// ts1 = "parallel";
|
||||
// ts1_control = <0>;
|
||||
// ts1_invert = <0>;
|
||||
interrupts = <0 23 1
|
||||
0 5 1
|
||||
0 21 1
|
||||
0 19 1
|
||||
0 25 1
|
||||
0 18 1
|
||||
0 24 1>;
|
||||
interrupt-names = "demux0_irq",
|
||||
"demux1_irq",
|
||||
"demux2_irq",
|
||||
"dvr0_irq",
|
||||
"dvr1_irq",
|
||||
"dvrfill0_fill",
|
||||
"dvrfill1_flush";
|
||||
// pinctrl-names = "p_ts1";
|
||||
// pinctrl-0 = <&dvb_p_ts1_pins>;
|
||||
clocks = <&clkc CLKID_DEMUX
|
||||
&clkc CLKID_AHB_ARB0
|
||||
&clkc CLKID_DOS_PARSER>;
|
||||
clock-names = "demux", "ahbarb0", "parser_top";
|
||||
};
|
||||
|
||||
unifykey{
|
||||
compatible = "amlogic, unifykey";
|
||||
status = "ok";
|
||||
@@ -655,7 +672,7 @@
|
||||
/* suffix-name, sync with android audio hal
|
||||
* what's the dai link used for
|
||||
*/
|
||||
suffix-name = "alsaPORT-spdifb2hdmi";
|
||||
suffix-name = "alsaPORT-spdif";
|
||||
cpu {
|
||||
sound-dai = <&aml_spdif>;
|
||||
system-clock-frequency = <6144000>;
|
||||
@@ -671,7 +688,7 @@
|
||||
/* suffix-name, sync with android audio hal
|
||||
* what's the dai link used for
|
||||
*/
|
||||
suffix-name = "alsaPORT-spdif";
|
||||
suffix-name = "alsaPORT-spdifb";
|
||||
cpu {
|
||||
sound-dai = <&aml_spdif_b>;
|
||||
system-clock-frequency = <6144000>;
|
||||
|
||||
@@ -18,6 +18,7 @@
|
||||
/dts-v1/;
|
||||
|
||||
#include "mesong12a.dtsi"
|
||||
#include "mesong12a_drm.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Amlogic";
|
||||
@@ -724,7 +725,7 @@
|
||||
/* suffix-name, sync with android audio hal
|
||||
* what's the dai link used for
|
||||
*/
|
||||
suffix-name = "alsaPORT-spdifb2hdmi";
|
||||
suffix-name = "alsaPORT-spdifb";
|
||||
cpu {
|
||||
sound-dai = <&aml_spdif_b>;
|
||||
system-clock-frequency = <6144000>;
|
||||
|
||||
1456
arch/arm/boot/dts/amlogic/g12a_s905x2_u212_drm_buildroot.dts
Normal file
1456
arch/arm/boot/dts/amlogic/g12a_s905x2_u212_drm_buildroot.dts
Normal file
File diff suppressed because it is too large
Load Diff
@@ -606,7 +606,7 @@
|
||||
/* suffix-name, sync with android audio hal
|
||||
* what's the dai link used for
|
||||
*/
|
||||
suffix-name = "alsaPORT-spdifb2hdmi";
|
||||
suffix-name = "alsaPORT-spdif";
|
||||
cpu {
|
||||
sound-dai = <&aml_spdif>;
|
||||
system-clock-frequency = <6144000>;
|
||||
@@ -622,7 +622,7 @@
|
||||
/* suffix-name, sync with android audio hal
|
||||
* what's the dai link used for
|
||||
*/
|
||||
suffix-name = "alsaPORT-spdif";
|
||||
suffix-name = "alsaPORT-spdifb";
|
||||
cpu {
|
||||
sound-dai = <&aml_spdif_b>;
|
||||
system-clock-frequency = <6144000>;
|
||||
|
||||
@@ -591,7 +591,7 @@
|
||||
/* suffix-name, sync with android audio hal
|
||||
* what's the dai link used for
|
||||
*/
|
||||
suffix-name = "alsaPORT-spdifb2hdmi";
|
||||
suffix-name = "alsaPORT-spdifb";
|
||||
cpu {
|
||||
sound-dai = <&aml_spdif_b>;
|
||||
system-clock-frequency = <6144000>;
|
||||
@@ -696,20 +696,18 @@
|
||||
opp-hz = /bits/ 64 <1512000000>;
|
||||
opp-microvolt = <831000>;
|
||||
};
|
||||
/*
|
||||
* opp08 {
|
||||
* opp-hz = /bits/ 64 <1608000000>;
|
||||
* opp-microvolt = <871000>;
|
||||
* };
|
||||
* opp09 {
|
||||
* opp-hz = /bits/ 64 <1704000000>;
|
||||
* opp-microvolt = <921000>;
|
||||
* };
|
||||
* opp10 {
|
||||
* opp-hz = /bits/ 64 <1800000000>;
|
||||
* opp-microvolt = <981000>;
|
||||
* };
|
||||
*/
|
||||
opp08 {
|
||||
opp-hz = /bits/ 64 <1608000000>;
|
||||
opp-microvolt = <871000>;
|
||||
};
|
||||
opp09 {
|
||||
opp-hz = /bits/ 64 <1704000000>;
|
||||
opp-microvolt = <921000>;
|
||||
};
|
||||
opp10 {
|
||||
opp-hz = /bits/ 64 <1800000000>;
|
||||
opp-microvolt = <981000>;
|
||||
};
|
||||
};
|
||||
|
||||
cpufreq-meson {
|
||||
@@ -1170,7 +1168,7 @@
|
||||
&usb3_phy_v2 {
|
||||
status = "okay";
|
||||
portnum = <0>;
|
||||
otg = <1>;
|
||||
otg = <0>;
|
||||
gpio-vbus-power = "GPIOH_6";
|
||||
gpios = <&gpio GPIOH_6 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
@@ -1178,7 +1176,7 @@
|
||||
&dwc2_a {
|
||||
status = "okay";
|
||||
/** 0: normal, 1: otg+dwc3 host only, 2: otg+dwc3 device only*/
|
||||
controller-type = <3>;
|
||||
controller-type = <1>;
|
||||
};
|
||||
ðmac {
|
||||
status = "disabled";
|
||||
@@ -1374,13 +1372,6 @@
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&gpu{
|
||||
/*max gpu is 500MHz*/
|
||||
tbl = <&dvfs285_cfg
|
||||
&dvfs400_cfg
|
||||
&dvfs500_cfg>;
|
||||
};
|
||||
|
||||
&amhdmitx {
|
||||
dongle_mode = <1>;
|
||||
dongle_mode = <0>;
|
||||
};
|
||||
|
||||
1386
arch/arm/boot/dts/amlogic/g12a_s905y2_u223_lp.dts
Normal file
1386
arch/arm/boot/dts/amlogic/g12a_s905y2_u223_lp.dts
Normal file
File diff suppressed because it is too large
Load Diff
@@ -483,11 +483,11 @@
|
||||
};
|
||||
amlogic_codec:t9015{
|
||||
#sound-dai-cells = <0>;
|
||||
/*compatible = "amlogic, aml_codec_T9015";*/
|
||||
compatible = "amlogic, aml_codec_T9015";
|
||||
reg = <0xFF632000 0x2000>;
|
||||
is_auge_used = <1>; /* meson or auge chipset used */
|
||||
tdmout_index = <1>;
|
||||
status = "disabled";
|
||||
status = "okay";
|
||||
};
|
||||
audio_effect:eqdrc{
|
||||
/*eq_enable = <1>;*/
|
||||
@@ -566,7 +566,7 @@
|
||||
};
|
||||
tdmbcodec: codec {
|
||||
sound-dai = <&dummy_codec &dummy_codec
|
||||
&dummy_codec &ad82584f_62>;
|
||||
&amlogic_codec &ad82584f_62>;
|
||||
};
|
||||
};
|
||||
|
||||
@@ -942,7 +942,7 @@
|
||||
* 3: spdifout;
|
||||
* 4: spdifout_b;
|
||||
*/
|
||||
samesource_sel = <4>;
|
||||
/*samesource_sel = <4>; */
|
||||
};
|
||||
|
||||
aml_tdmc: tdmc {
|
||||
@@ -1307,8 +1307,7 @@
|
||||
"MMC_CAP_HW_RESET",
|
||||
"MMC_CAP_ERASE",
|
||||
"MMC_CAP_CMD23";
|
||||
caps2 = "MMC_CAP2_HS200";
|
||||
/* "MMC_CAP2_HS400";*/
|
||||
caps2 = "MMC_CAP2_HS200", "MMC_CAP2_HS400";
|
||||
f_min = <400000>;
|
||||
f_max = <200000000>;
|
||||
};
|
||||
|
||||
@@ -1343,8 +1343,7 @@
|
||||
"MMC_CAP_ERASE",
|
||||
"MMC_CAP_CMD23",
|
||||
"MMC_CAP_DRIVER_TYPE_A";
|
||||
caps2 = "MMC_CAP2_HS200";
|
||||
/*MMC_CAP2_HS400"*/
|
||||
caps2 = "MMC_CAP2_HS200", "MMC_CAP2_HS400";
|
||||
f_min = <400000>;
|
||||
f_max = <200000000>;
|
||||
};
|
||||
@@ -1469,10 +1468,6 @@
|
||||
};
|
||||
ðmac {
|
||||
status = "okay";
|
||||
/* //conflict with isp i2c
|
||||
pinctrl-names = "internal_eth_pins";
|
||||
pinctrl-0 = <&internal_eth_pins>;
|
||||
*/
|
||||
mc_val = <0x4be04>;
|
||||
|
||||
internal_phy=<1>;
|
||||
|
||||
@@ -1445,10 +1445,6 @@
|
||||
};
|
||||
ðmac {
|
||||
status = "okay";
|
||||
/* //conflict with isp i2c
|
||||
pinctrl-names = "internal_eth_pins";
|
||||
pinctrl-0 = <&internal_eth_pins>;
|
||||
*/
|
||||
mc_val = <0x4be04>;
|
||||
|
||||
internal_phy=<1>;
|
||||
|
||||
@@ -344,7 +344,7 @@
|
||||
unifykey{
|
||||
compatible = "amlogic, unifykey";
|
||||
status = "ok";
|
||||
unifykey-num = <16>;
|
||||
unifykey-num = <17>;
|
||||
unifykey-index-0 = <&keysn_0>;
|
||||
unifykey-index-1 = <&keysn_1>;
|
||||
unifykey-index-2 = <&keysn_2>;
|
||||
@@ -361,6 +361,7 @@
|
||||
unifykey-index-13= <&keysn_13>;
|
||||
unifykey-index-14= <&keysn_14>;
|
||||
unifykey-index-15= <&keysn_15>;
|
||||
unifykey-index-16= <&keysn_16>;
|
||||
|
||||
keysn_0: key_0{
|
||||
key-name = "usid";
|
||||
@@ -445,6 +446,11 @@
|
||||
key-device = "secure";
|
||||
key-permit = "read","write","del";
|
||||
};
|
||||
keysn_16:key_16{
|
||||
key-name = "attestationdevidbox";// attest dev id box
|
||||
key-device = "secure";
|
||||
key-permit = "read","write","del";
|
||||
};
|
||||
};//End unifykey
|
||||
|
||||
efusekey:efusekey{
|
||||
@@ -1329,8 +1335,7 @@
|
||||
"MMC_CAP_ERASE",
|
||||
"MMC_CAP_CMD23",
|
||||
"MMC_CAP_DRIVER_TYPE_A";
|
||||
caps2 = "MMC_CAP2_HS200";
|
||||
/*MMC_CAP2_HS400"*/
|
||||
caps2 = "MMC_CAP2_HS200", "MMC_CAP2_HS400";
|
||||
f_min = <400000>;
|
||||
f_max = <200000000>;
|
||||
};
|
||||
|
||||
@@ -847,6 +847,8 @@
|
||||
clocks = <&clkc CLKID_24M>;
|
||||
clock-names = "g12a_24m";
|
||||
reset = <&gpio GPIOZ_12 GPIO_ACTIVE_HIGH>;
|
||||
ir_cut_gpio = <&gpio GPIOZ_11 GPIO_ACTIVE_HIGH
|
||||
&gpio GPIOZ_7 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
iq: iq {
|
||||
@@ -1471,7 +1473,7 @@
|
||||
|
||||
&usb3_phy_v2 {
|
||||
status = "okay";
|
||||
portnum = <0>;
|
||||
portnum = <1>;
|
||||
otg = <1>;
|
||||
gpio-vbus-power = "GPIOH_6";
|
||||
gpios = <&gpio GPIOH_6 GPIO_ACTIVE_HIGH>;
|
||||
@@ -1499,7 +1501,7 @@
|
||||
|
||||
&pcie_A {
|
||||
reset-gpio = <&gpio GPIOX_7 GPIO_ACTIVE_HIGH>;
|
||||
status = "okay";
|
||||
status = "disable";
|
||||
};
|
||||
|
||||
&saradc {
|
||||
|
||||
@@ -1439,7 +1439,7 @@
|
||||
|
||||
&usb3_phy_v2 {
|
||||
status = "okay";
|
||||
portnum = <0>;
|
||||
portnum = <1>;
|
||||
otg = <1>;
|
||||
gpio-vbus-power = "GPIOH_6";
|
||||
gpios = <&gpio GPIOH_6 GPIO_ACTIVE_HIGH>;
|
||||
@@ -1467,7 +1467,7 @@
|
||||
|
||||
&pcie_A {
|
||||
reset-gpio = <&gpio GPIOX_7 GPIO_ACTIVE_HIGH>;
|
||||
status = "okay";
|
||||
status = "disable";
|
||||
};
|
||||
|
||||
&saradc {
|
||||
|
||||
1529
arch/arm/boot/dts/amlogic/g12b_a311d_w400_drm_buildroot.dts
Normal file
1529
arch/arm/boot/dts/amlogic/g12b_a311d_w400_drm_buildroot.dts
Normal file
File diff suppressed because it is too large
Load Diff
1494
arch/arm/boot/dts/amlogic/g12b_a311d_w400_drm_buildroot_a.dts
Normal file
1494
arch/arm/boot/dts/amlogic/g12b_a311d_w400_drm_buildroot_a.dts
Normal file
File diff suppressed because it is too large
Load Diff
1469
arch/arm/boot/dts/amlogic/g12b_revb_a311d_w400_drm_buildroot.dts
Normal file
1469
arch/arm/boot/dts/amlogic/g12b_revb_a311d_w400_drm_buildroot.dts
Normal file
File diff suppressed because it is too large
Load Diff
@@ -411,7 +411,8 @@
|
||||
compatible = "amlogic, gxbb-eth-dwmac";
|
||||
reg = <0xc9410000 0x10000
|
||||
0xc8834540 0x8
|
||||
0xc8834558 0xc>;
|
||||
0xc8834558 0xc
|
||||
0xc1104408 0x4>;
|
||||
interrupts = <0 8 1>;
|
||||
pinctrl-names = "external_eth_pins";
|
||||
pinctrl-0 = <&external_eth_pins>;
|
||||
@@ -450,7 +451,7 @@
|
||||
min_state = <500>;
|
||||
dyn_coeff = <437>;
|
||||
cluster_id = <0>;
|
||||
node_name = "gpufreq_cool0";
|
||||
node_name = "mali";
|
||||
device_type = "gpufreq";
|
||||
};
|
||||
gpucore_cool {
|
||||
@@ -467,9 +468,6 @@
|
||||
cpucore_cool0:cpucore_cool0 {
|
||||
#cooling-cells = <2>; /* min followed by max */
|
||||
};
|
||||
gpufreq_cool0:gpufreq_cool0 {
|
||||
#cooling-cells = <2>; /* min followed by max */
|
||||
};
|
||||
gpucore_cool0:gpucore_cool0 {
|
||||
#cooling-cells = <2>; /* min followed by max */
|
||||
};
|
||||
@@ -518,7 +516,7 @@
|
||||
};
|
||||
gpufreq_cooling_map {
|
||||
trip = <&control>;
|
||||
cooling-device = <&gpufreq_cool0 0 4>;
|
||||
cooling-device = <&gpu 0 4>;
|
||||
contribution = <1024>;
|
||||
};
|
||||
gpucore_cooling_map {
|
||||
@@ -943,6 +941,15 @@
|
||||
sound-dai = <&pcm_codec>;
|
||||
};
|
||||
};
|
||||
|
||||
amlkaraoke {
|
||||
compatible = "amlogic, aml_karaoke";
|
||||
dev_name = "aml_karaoke";
|
||||
status = "okay";
|
||||
interrupts = <0 48 1>;
|
||||
interrupt-names = "aml_karaoke";
|
||||
};
|
||||
|
||||
/* END OF AUDIO board specific */
|
||||
rdma{
|
||||
compatible = "amlogic, meson, rdma";
|
||||
@@ -1107,7 +1114,7 @@
|
||||
compatible = "amlogic, unifykey";
|
||||
status = "ok";
|
||||
|
||||
unifykey-num = <17>;
|
||||
unifykey-num = <18>;
|
||||
unifykey-index-0 = <&keysn_0>;
|
||||
unifykey-index-1 = <&keysn_1>;
|
||||
unifykey-index-2 = <&keysn_2>;
|
||||
@@ -1125,6 +1132,7 @@
|
||||
unifykey-index-14= <&keysn_14>;
|
||||
unifykey-index-15= <&keysn_15>;
|
||||
unifykey-index-16= <&keysn_16>;
|
||||
unifykey-index-17= <&keysn_17>;
|
||||
|
||||
|
||||
keysn_0: key_0{
|
||||
@@ -1215,8 +1223,50 @@
|
||||
key-device = "secure";
|
||||
key-permit = "read","write","del";
|
||||
};
|
||||
keysn_17:key_17{
|
||||
key-name = "attestationdevidbox";// attest dev id box
|
||||
key-device = "secure";
|
||||
key-permit = "read","write","del";
|
||||
};
|
||||
};//End unifykey
|
||||
dvb {
|
||||
compatible = "amlogic, dvb";
|
||||
dev_name = "dvb";
|
||||
|
||||
// fe0_mode = "external";
|
||||
// fe0_demod = "Atbm8881";
|
||||
// fe0_i2c_adap_id = <&i2c1>;
|
||||
// fe0_demod_i2c_addr = <0xc0>;
|
||||
// fe0_ts = <0>;
|
||||
// fe0_reset_value = <0>;
|
||||
// fe0_reset_gpio = <&gpio GPIODV_14 GPIO_ACTIVE_HIGH>;
|
||||
|
||||
// ts0 = "parallel";
|
||||
// ts0_control = <0>;
|
||||
// ts0_invert = <0>;
|
||||
interrupts = <0 23 1
|
||||
0 5 1
|
||||
0 21 1
|
||||
0 19 1
|
||||
0 25 1
|
||||
0 18 1
|
||||
0 24 1>;
|
||||
interrupt-names = "demux0_irq",
|
||||
"demux1_irq",
|
||||
"demux2_irq",
|
||||
"dvr0_irq",
|
||||
"dvr1_irq",
|
||||
"dvrfill0_fill",
|
||||
"dvrfill1_flush";
|
||||
// pinctrl-names = "p_ts0", "s_ts0";
|
||||
// pinctrl-0 = <&dvb_p_ts0_pins>;
|
||||
// pinctrl-1 = <&dvb_s_ts0_pins>;
|
||||
clocks = <&clkc CLKID_DEMUX
|
||||
&clkc CLKID_ASYNC_FIFO
|
||||
&clkc CLKID_AHB_ARB0
|
||||
&clkc CLKID_HIU_IFACE>;
|
||||
clock-names = "demux", "asyncfifo", "ahbarb0", "uparsertop";
|
||||
};
|
||||
};
|
||||
&efuse {
|
||||
status = "ok";
|
||||
@@ -1229,6 +1279,7 @@
|
||||
&audio_data{
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&spicc{
|
||||
status = "disabled";
|
||||
pinctrl-names = "spicc_pulldown","spicc_pullup";
|
||||
|
||||
@@ -61,12 +61,12 @@
|
||||
reg = <0x05300000 0x2000000>;
|
||||
no-map;
|
||||
};
|
||||
fb_reserved:linux,meson-fb {
|
||||
logo_reserved:linux,meson-fb {
|
||||
compatible = "shared-dma-pool";
|
||||
reusable;
|
||||
size = <0x2400000>;
|
||||
size = <0x800000>;
|
||||
alignment = <0x400000>;
|
||||
alloc-ranges = <0x3dc00000 0x2400000>;
|
||||
alloc-ranges = <0x3f800000 0x800000>;
|
||||
};
|
||||
//don't put other dts in front of fb_reserved
|
||||
|
||||
@@ -379,7 +379,8 @@
|
||||
compatible = "amlogic, gxbb-eth-dwmac";
|
||||
reg = <0xc9410000 0x10000
|
||||
0xc8834540 0x8
|
||||
0xc8834558 0xc>;
|
||||
0xc8834558 0xc
|
||||
0xc1104408 0x4>;
|
||||
interrupts = <0 8 1>;
|
||||
pinctrl-names = "external_eth_pins";
|
||||
pinctrl-0 = <&external_eth_pins>;
|
||||
@@ -418,7 +419,7 @@
|
||||
min_state = <500>;
|
||||
dyn_coeff = <437>;
|
||||
cluster_id = <0>;
|
||||
node_name = "gpufreq_cool0";
|
||||
node_name = "mali";
|
||||
device_type = "gpufreq";
|
||||
};
|
||||
gpucore_cool {
|
||||
@@ -435,9 +436,6 @@
|
||||
cpucore_cool0:cpucore_cool0 {
|
||||
#cooling-cells = <2>; /* min followed by max */
|
||||
};
|
||||
gpufreq_cool0:gpufreq_cool0 {
|
||||
#cooling-cells = <2>; /* min followed by max */
|
||||
};
|
||||
gpucore_cool0:gpucore_cool0 {
|
||||
#cooling-cells = <2>; /* min followed by max */
|
||||
};
|
||||
@@ -486,7 +484,7 @@
|
||||
};
|
||||
gpufreq_cooling_map {
|
||||
trip = <&control>;
|
||||
cooling-device = <&gpufreq_cool0 0 4>;
|
||||
cooling-device = <&gpu 0 4>;
|
||||
contribution = <1024>;
|
||||
};
|
||||
gpucore_cooling_map {
|
||||
@@ -713,7 +711,7 @@
|
||||
|
||||
meson-fb {
|
||||
compatible = "amlogic, meson-gxl";
|
||||
memory-region = <&fb_reserved>;
|
||||
memory-region = <&logo_reserved>;
|
||||
dev_name = "meson-fb";
|
||||
status = "okay";
|
||||
interrupts = <0 3 1
|
||||
@@ -727,7 +725,7 @@
|
||||
display_size_default = <1920 1080 1920 3240 32>;
|
||||
/*1920*1080*4*3 = 0x17BB000*/
|
||||
mem_alloc = <1>;
|
||||
logo_addr = "0x3dc00000";
|
||||
logo_addr = "0x3f800000";
|
||||
};
|
||||
ge2d {
|
||||
compatible = "amlogic, ge2d-gxl";
|
||||
|
||||
@@ -390,7 +390,8 @@
|
||||
compatible = "amlogic, gxbb-eth-dwmac";
|
||||
reg = <0xc9410000 0x10000
|
||||
0xc8834540 0x8
|
||||
0xc8834558 0xc>;
|
||||
0xc8834558 0xc
|
||||
0xc1104408 0x4>;
|
||||
interrupts = <0 8 1>;
|
||||
pinctrl-names = "external_eth_pins";
|
||||
pinctrl-0 = <&external_eth_pins>;
|
||||
@@ -429,7 +430,7 @@
|
||||
min_state = <400>;
|
||||
dyn_coeff = <437>;
|
||||
cluster_id = <0>;
|
||||
node_name = "gpufreq_cool0";
|
||||
node_name = "mali";
|
||||
device_type = "gpufreq";
|
||||
};
|
||||
gpucore_cool {
|
||||
@@ -446,9 +447,6 @@
|
||||
cpucore_cool0:cpucore_cool0 {
|
||||
#cooling-cells = <2>; /* min followed by max */
|
||||
};
|
||||
gpufreq_cool0:gpufreq_cool0 {
|
||||
#cooling-cells = <2>; /* min followed by max */
|
||||
};
|
||||
gpucore_cool0:gpucore_cool0 {
|
||||
#cooling-cells = <2>; /* min followed by max */
|
||||
};
|
||||
@@ -497,7 +495,7 @@
|
||||
};
|
||||
gpufreq_cooling_map {
|
||||
trip = <&control>;
|
||||
cooling-device = <&gpufreq_cool0 0 4>;
|
||||
cooling-device = <&gpu 0 4>;
|
||||
contribution = <1024>;
|
||||
};
|
||||
gpucore_cooling_map {
|
||||
|
||||
@@ -410,7 +410,8 @@
|
||||
compatible = "amlogic, gxbb-eth-dwmac";
|
||||
reg = <0xc9410000 0x10000
|
||||
0xc8834540 0x8
|
||||
0xc8834558 0xc>;
|
||||
0xc8834558 0xc
|
||||
0xc1104408 0x4>;
|
||||
interrupts = <0 8 1>;
|
||||
pinctrl-names = "external_eth_pins";
|
||||
pinctrl-0 = <&external_eth_pins>;
|
||||
@@ -537,7 +538,7 @@
|
||||
min_state = <500>;
|
||||
dyn_coeff = <437>;
|
||||
cluster_id = <0>;
|
||||
node_name = "gpufreq_cool0";
|
||||
node_name = "mali";
|
||||
device_type = "gpufreq";
|
||||
};
|
||||
gpucore_cool {
|
||||
@@ -554,9 +555,6 @@
|
||||
cpucore_cool0:cpucore_cool0 {
|
||||
#cooling-cells = <2>; /* min followed by max */
|
||||
};
|
||||
gpufreq_cool0:gpufreq_cool0 {
|
||||
#cooling-cells = <2>; /* min followed by max */
|
||||
};
|
||||
gpucore_cool0:gpucore_cool0 {
|
||||
#cooling-cells = <2>; /* min followed by max */
|
||||
};
|
||||
@@ -605,7 +603,7 @@
|
||||
};
|
||||
gpufreq_cooling_map {
|
||||
trip = <&control>;
|
||||
cooling-device = <&gpufreq_cool0 0 4>;
|
||||
cooling-device = <&gpu 0 4>;
|
||||
contribution = <1024>;
|
||||
};
|
||||
gpucore_cooling_map {
|
||||
@@ -943,6 +941,15 @@
|
||||
sound-dai = <&pcm_codec>;
|
||||
};
|
||||
};
|
||||
|
||||
amlkaraoke {
|
||||
compatible = "amlogic, aml_karaoke";
|
||||
dev_name = "aml_karaoke";
|
||||
status = "okay";
|
||||
interrupts = <0 48 1>;
|
||||
interrupt-names = "aml_karaoke";
|
||||
};
|
||||
|
||||
/* END OF AUDIO board specific */
|
||||
rdma{
|
||||
compatible = "amlogic, meson, rdma";
|
||||
@@ -1215,6 +1222,45 @@
|
||||
key-permit = "read","write","del";
|
||||
};
|
||||
};//End unifykey
|
||||
dvb {
|
||||
compatible = "amlogic, dvb";
|
||||
dev_name = "dvb";
|
||||
|
||||
// fe0_mode = "external";
|
||||
// fe0_demod = "Atbm8881";
|
||||
// fe0_i2c_adap_id = <&i2c1>;
|
||||
// fe0_demod_i2c_addr = <0xc0>;
|
||||
// fe0_ts = <0>;
|
||||
// fe0_reset_value = <0>;
|
||||
// fe0_reset_gpio = <&gpio GPIODV_14 GPIO_ACTIVE_HIGH>;
|
||||
|
||||
// ts0 = "parallel";
|
||||
// ts0_control = <0>;
|
||||
// ts0_invert = <0>;
|
||||
interrupts = <0 23 1
|
||||
0 5 1
|
||||
0 21 1
|
||||
0 19 1
|
||||
0 25 1
|
||||
0 18 1
|
||||
0 24 1>;
|
||||
interrupt-names = "demux0_irq",
|
||||
"demux1_irq",
|
||||
"demux2_irq",
|
||||
"dvr0_irq",
|
||||
"dvr1_irq",
|
||||
"dvrfill0_fill",
|
||||
"dvrfill1_flush";
|
||||
// pinctrl-names = "p_ts0", "s_ts0";
|
||||
// pinctrl-0 = <&dvb_p_ts0_pins>;
|
||||
// pinctrl-1 = <&dvb_s_ts0_pins>;
|
||||
clocks = <&clkc CLKID_DEMUX
|
||||
&clkc CLKID_ASYNC_FIFO
|
||||
&clkc CLKID_AHB_ARB0
|
||||
&clkc CLKID_HIU_IFACE>;
|
||||
clock-names = "demux", "asyncfifo", "ahbarb0", "uparsertop";
|
||||
};
|
||||
|
||||
};
|
||||
&efuse {
|
||||
status = "ok";
|
||||
|
||||
@@ -63,6 +63,13 @@
|
||||
reg = <0x05300000 0x2000000>;
|
||||
no-map;
|
||||
};
|
||||
logo_reserved:linux,meson-fb {
|
||||
compatible = "shared-dma-pool";
|
||||
reusable;
|
||||
size = <0x800000>;
|
||||
alignment = <0x400000>;
|
||||
alloc-ranges = <0x7f800000 0x800000>;
|
||||
};
|
||||
ion_reserved:linux,ion-dev {
|
||||
compatible = "shared-dma-pool";
|
||||
reusable;
|
||||
@@ -380,7 +387,8 @@
|
||||
compatible = "amlogic, gxbb-eth-dwmac";
|
||||
reg = <0xc9410000 0x10000
|
||||
0xc8834540 0x8
|
||||
0xc8834558 0xc>;
|
||||
0xc8834558 0xc
|
||||
0xc1104408 0x4>;
|
||||
interrupts = <0 8 1>;
|
||||
pinctrl-names = "external_eth_pins";
|
||||
pinctrl-0 = <&external_eth_pins>;
|
||||
@@ -496,7 +504,7 @@
|
||||
min_state = <500>;
|
||||
dyn_coeff = <437>;
|
||||
cluster_id = <0>;
|
||||
node_name = "gpufreq_cool0";
|
||||
node_name = "mali";
|
||||
device_type = "gpufreq";
|
||||
};
|
||||
gpucore_cool {
|
||||
@@ -513,9 +521,6 @@
|
||||
cpucore_cool0:cpucore_cool0 {
|
||||
#cooling-cells = <2>; /* min followed by max */
|
||||
};
|
||||
gpufreq_cool0:gpufreq_cool0 {
|
||||
#cooling-cells = <2>; /* min followed by max */
|
||||
};
|
||||
gpucore_cool0:gpucore_cool0 {
|
||||
#cooling-cells = <2>; /* min followed by max */
|
||||
};
|
||||
@@ -564,7 +569,7 @@
|
||||
};
|
||||
gpufreq_cooling_map {
|
||||
trip = <&control>;
|
||||
cooling-device = <&gpufreq_cool0 0 4>;
|
||||
cooling-device = <&gpu 0 4>;
|
||||
contribution = <1024>;
|
||||
};
|
||||
gpucore_cooling_map {
|
||||
@@ -714,6 +719,7 @@
|
||||
|
||||
meson-fb {
|
||||
compatible = "amlogic, meson-gxl";
|
||||
memory-region = <&logo_reserved>;
|
||||
dev_name = "meson-fb";
|
||||
status = "okay";
|
||||
interrupts = <0 3 1
|
||||
@@ -727,7 +733,7 @@
|
||||
display_size_default = <1920 1080 1920 3240 32>;
|
||||
/*1920*1080*4*3 = 0x17BB000*/
|
||||
mem_alloc = <1>;
|
||||
logo_addr = "0x7dc00000";
|
||||
logo_addr = "0x7f800000";
|
||||
};
|
||||
ge2d {
|
||||
compatible = "amlogic, ge2d-gxl";
|
||||
|
||||
@@ -396,7 +396,8 @@
|
||||
compatible = "amlogic, gxbb-eth-dwmac";
|
||||
reg = <0xc9410000 0x10000
|
||||
0xc8834540 0x8
|
||||
0xc8834558 0xc>;
|
||||
0xc8834558 0xc
|
||||
0xc1104408 0x4>;
|
||||
interrupts = <0 8 1>;
|
||||
pinctrl-names = "external_eth_pins";
|
||||
pinctrl-0 = <&external_eth_pins>;
|
||||
@@ -526,7 +527,7 @@
|
||||
min_state = <400>;
|
||||
dyn_coeff = <437>;
|
||||
cluster_id = <0>;
|
||||
node_name = "gpufreq_cool0";
|
||||
node_name = "mali";
|
||||
device_type = "gpufreq";
|
||||
};
|
||||
gpucore_cool {
|
||||
@@ -543,9 +544,6 @@
|
||||
cpucore_cool0:cpucore_cool0 {
|
||||
#cooling-cells = <2>; /* min followed by max */
|
||||
};
|
||||
gpufreq_cool0:gpufreq_cool0 {
|
||||
#cooling-cells = <2>; /* min followed by max */
|
||||
};
|
||||
gpucore_cool0:gpucore_cool0 {
|
||||
#cooling-cells = <2>; /* min followed by max */
|
||||
};
|
||||
@@ -594,7 +592,7 @@
|
||||
};
|
||||
gpufreq_cooling_map {
|
||||
trip = <&control>;
|
||||
cooling-device = <&gpufreq_cool0 0 4>;
|
||||
cooling-device = <&gpu 0 4>;
|
||||
contribution = <1024>;
|
||||
};
|
||||
gpucore_cooling_map {
|
||||
|
||||
@@ -393,7 +393,8 @@
|
||||
compatible = "amlogic, gxbb-eth-dwmac";
|
||||
reg = <0xc9410000 0x10000
|
||||
0xc8834540 0x8
|
||||
0xc8834558 0xc>;
|
||||
0xc8834558 0xc
|
||||
0xc1104408 0x4>;
|
||||
interrupts = <0 8 1>;
|
||||
pinctrl-names = "external_eth_pins";
|
||||
pinctrl-0 = <&external_eth_pins>;
|
||||
@@ -509,7 +510,7 @@
|
||||
min_state = <400>;
|
||||
dyn_coeff = <437>;
|
||||
cluster_id = <0>;
|
||||
node_name = "gpufreq_cool0";
|
||||
node_name = "mali";
|
||||
device_type = "gpufreq";
|
||||
};
|
||||
gpucore_cool {
|
||||
@@ -526,9 +527,6 @@
|
||||
cpucore_cool0:cpucore_cool0 {
|
||||
#cooling-cells = <2>; /* min followed by max */
|
||||
};
|
||||
gpufreq_cool0:gpufreq_cool0 {
|
||||
#cooling-cells = <2>; /* min followed by max */
|
||||
};
|
||||
gpucore_cool0:gpucore_cool0 {
|
||||
#cooling-cells = <2>; /* min followed by max */
|
||||
};
|
||||
@@ -577,7 +575,7 @@
|
||||
};
|
||||
gpufreq_cooling_map {
|
||||
trip = <&control>;
|
||||
cooling-device = <&gpufreq_cool0 0 4>;
|
||||
cooling-device = <&gpu 0 4>;
|
||||
contribution = <1024>;
|
||||
};
|
||||
gpucore_cooling_map {
|
||||
|
||||
@@ -338,7 +338,8 @@
|
||||
compatible = "amlogic, gxbb-eth-dwmac";
|
||||
reg = <0xc9410000 0x10000
|
||||
0xc8834540 0x8
|
||||
0xc8834558 0xc>;
|
||||
0xc8834558 0xc
|
||||
0xc1104408 0x4>;
|
||||
interrupts = <0 8 1>;
|
||||
pinctrl-names = "external_eth_pins";
|
||||
pinctrl-0 = <&external_eth_pins>;
|
||||
@@ -452,7 +453,7 @@
|
||||
min_state = <400>;
|
||||
dyn_coeff = <437>;
|
||||
cluster_id = <0>;
|
||||
node_name = "gpufreq_cool0";
|
||||
node_name = "mali";
|
||||
device_type = "gpufreq";
|
||||
};
|
||||
gpucore_cool {
|
||||
@@ -469,9 +470,6 @@
|
||||
cpucore_cool0:cpucore_cool0 {
|
||||
#cooling-cells = <2>; /* min followed by max */
|
||||
};
|
||||
gpufreq_cool0:gpufreq_cool0 {
|
||||
#cooling-cells = <2>; /* min followed by max */
|
||||
};
|
||||
gpucore_cool0:gpucore_cool0 {
|
||||
#cooling-cells = <2>; /* min followed by max */
|
||||
};
|
||||
@@ -520,7 +518,7 @@
|
||||
};
|
||||
gpufreq_cooling_map {
|
||||
trip = <&control>;
|
||||
cooling-device = <&gpufreq_cool0 0 4>;
|
||||
cooling-device = <&gpu 0 4>;
|
||||
contribution = <1024>;
|
||||
};
|
||||
gpucore_cooling_map {
|
||||
|
||||
@@ -337,7 +337,8 @@
|
||||
compatible = "amlogic, gxbb-eth-dwmac";
|
||||
reg = <0xc9410000 0x10000
|
||||
0xc8834540 0x8
|
||||
0xc8834558 0xc>;
|
||||
0xc8834558 0xc
|
||||
0xc1104408 0x4>;
|
||||
interrupts = <0 8 1>;
|
||||
pinctrl-names = "external_eth_pins";
|
||||
pinctrl-0 = <&external_eth_pins>;
|
||||
@@ -451,7 +452,7 @@
|
||||
min_state = <400>;
|
||||
dyn_coeff = <437>;
|
||||
cluster_id = <0>;
|
||||
node_name = "gpufreq_cool0";
|
||||
node_name = "mali";
|
||||
device_type = "gpufreq";
|
||||
};
|
||||
gpucore_cool {
|
||||
@@ -468,9 +469,6 @@
|
||||
cpucore_cool0:cpucore_cool0 {
|
||||
#cooling-cells = <2>; /* min followed by max */
|
||||
};
|
||||
gpufreq_cool0:gpufreq_cool0 {
|
||||
#cooling-cells = <2>; /* min followed by max */
|
||||
};
|
||||
gpucore_cool0:gpucore_cool0 {
|
||||
#cooling-cells = <2>; /* min followed by max */
|
||||
};
|
||||
@@ -519,7 +517,7 @@
|
||||
};
|
||||
gpufreq_cooling_map {
|
||||
trip = <&control>;
|
||||
cooling-device = <&gpufreq_cool0 0 4>;
|
||||
cooling-device = <&gpu 0 4>;
|
||||
contribution = <1024>;
|
||||
};
|
||||
gpucore_cooling_map {
|
||||
|
||||
@@ -69,12 +69,12 @@
|
||||
reg = <0x05300000 0x2000000>;
|
||||
no-map;
|
||||
};
|
||||
fb_reserved:linux,meson-fb {
|
||||
logo_reserved:linux,meson-fb {
|
||||
compatible = "shared-dma-pool";
|
||||
reusable;
|
||||
size = <0x2400000>;
|
||||
size = <0x800000>;
|
||||
alignment = <0x400000>;
|
||||
alloc-ranges = <0x7dc00000 0x2400000>;
|
||||
alloc-ranges = <0x7f800000 0x800000>;
|
||||
};
|
||||
//don't put other dts in front of fb_reserved
|
||||
|
||||
@@ -327,7 +327,8 @@
|
||||
compatible = "amlogic, gxbb-eth-dwmac";
|
||||
reg = <0xc9410000 0x10000
|
||||
0xc8834540 0x8
|
||||
0xc8834558 0xc>;
|
||||
0xc8834558 0xc
|
||||
0xc1104408 0x4>;
|
||||
interrupts = <0 8 1>;
|
||||
pinctrl-names = "external_eth_pins";
|
||||
pinctrl-0 = <&external_eth_pins>;
|
||||
@@ -441,7 +442,7 @@
|
||||
min_state = <400>;
|
||||
dyn_coeff = <437>;
|
||||
cluster_id = <0>;
|
||||
node_name = "gpufreq_cool0";
|
||||
node_name = "mali";
|
||||
device_type = "gpufreq";
|
||||
};
|
||||
gpucore_cool {
|
||||
@@ -458,9 +459,6 @@
|
||||
cpucore_cool0:cpucore_cool0 {
|
||||
#cooling-cells = <2>; /* min followed by max */
|
||||
};
|
||||
gpufreq_cool0:gpufreq_cool0 {
|
||||
#cooling-cells = <2>; /* min followed by max */
|
||||
};
|
||||
gpucore_cool0:gpucore_cool0 {
|
||||
#cooling-cells = <2>; /* min followed by max */
|
||||
};
|
||||
@@ -509,7 +507,7 @@
|
||||
};
|
||||
gpufreq_cooling_map {
|
||||
trip = <&control>;
|
||||
cooling-device = <&gpufreq_cool0 0 4>;
|
||||
cooling-device = <&gpu 0 4>;
|
||||
contribution = <1024>;
|
||||
};
|
||||
gpucore_cooling_map {
|
||||
@@ -659,7 +657,7 @@
|
||||
|
||||
meson-fb {
|
||||
compatible = "amlogic, meson-gxl";
|
||||
memory-region = <&fb_reserved>;
|
||||
memory-region = <&logo_reserved>;
|
||||
dev_name = "meson-fb";
|
||||
status = "okay";
|
||||
interrupts = <0 3 1
|
||||
@@ -673,7 +671,7 @@
|
||||
display_size_default = <1920 1080 1920 3240 32>;
|
||||
/*1920*1080*4*3 = 0x17BB000*/
|
||||
mem_alloc = <1>;
|
||||
logo_addr = "0x7dc00000";
|
||||
logo_addr = "0x7f800000";
|
||||
};
|
||||
ge2d {
|
||||
compatible = "amlogic, ge2d-gxl";
|
||||
|
||||
@@ -474,7 +474,8 @@
|
||||
compatible = "amlogic, gxbb-eth-dwmac";
|
||||
reg = <0xc9410000 0x10000
|
||||
0xc8834540 0x8
|
||||
0xc8834558 0xc>;
|
||||
0xc8834558 0xc
|
||||
0xc1104408 0x4>;
|
||||
interrupts = <0 8 1>;
|
||||
pinctrl-names = "external_eth_pins";
|
||||
pinctrl-0 = <&external_eth_pins>;
|
||||
@@ -513,7 +514,7 @@
|
||||
min_state = <400>;
|
||||
dyn_coeff = <437>;
|
||||
cluster_id = <0>;
|
||||
node_name = "gpufreq_cool0";
|
||||
node_name = "mali";
|
||||
device_type = "gpufreq";
|
||||
};
|
||||
gpucore_cool {
|
||||
@@ -530,9 +531,6 @@
|
||||
cpucore_cool0:cpucore_cool0 {
|
||||
#cooling-cells = <2>; /* min followed by max */
|
||||
};
|
||||
gpufreq_cool0:gpufreq_cool0 {
|
||||
#cooling-cells = <2>; /* min followed by max */
|
||||
};
|
||||
gpucore_cool0:gpucore_cool0 {
|
||||
#cooling-cells = <2>; /* min followed by max */
|
||||
};
|
||||
@@ -581,7 +579,7 @@
|
||||
};
|
||||
gpufreq_cooling_map {
|
||||
trip = <&control>;
|
||||
cooling-device = <&gpufreq_cool0 0 4>;
|
||||
cooling-device = <&gpu 0 4>;
|
||||
contribution = <1024>;
|
||||
};
|
||||
gpucore_cooling_map {
|
||||
@@ -999,6 +997,15 @@
|
||||
sound-dai = <&pcm_codec>;
|
||||
};
|
||||
};
|
||||
|
||||
amlkaraoke {
|
||||
compatible = "amlogic, aml_karaoke";
|
||||
dev_name = "aml_karaoke";
|
||||
status = "okay";
|
||||
interrupts = <0 48 1>;
|
||||
interrupt-names = "aml_karaoke";
|
||||
};
|
||||
|
||||
/* END OF AUDIO board specific */
|
||||
rdma{
|
||||
compatible = "amlogic, meson, rdma";
|
||||
|
||||
@@ -71,6 +71,13 @@
|
||||
reg = <0x05300000 0x2000000>;
|
||||
no-map;
|
||||
};
|
||||
logo_reserved:linux,meson-fb {
|
||||
compatible = "shared-dma-pool";
|
||||
reusable;
|
||||
size = <0x400000>;
|
||||
alignment = <0x400000>;
|
||||
alloc-ranges = <0x3fc00000 0x400000>;
|
||||
};
|
||||
ion_reserved:linux,ion-dev {
|
||||
compatible = "shared-dma-pool";
|
||||
reusable;
|
||||
@@ -452,7 +459,8 @@
|
||||
compatible = "amlogic, gxbb-eth-dwmac";
|
||||
reg = <0xc9410000 0x10000
|
||||
0xc8834540 0x8
|
||||
0xc8834558 0xc>;
|
||||
0xc8834558 0xc
|
||||
0xc1104408 0x4>;
|
||||
interrupts = <0 8 1>;
|
||||
pinctrl-names = "external_eth_pins";
|
||||
pinctrl-0 = <&external_eth_pins>;
|
||||
@@ -491,7 +499,7 @@
|
||||
min_state = <400>;
|
||||
dyn_coeff = <437>;
|
||||
cluster_id = <0>;
|
||||
node_name = "gpufreq_cool0";
|
||||
node_name = "mali";
|
||||
device_type = "gpufreq";
|
||||
};
|
||||
gpucore_cool {
|
||||
@@ -508,9 +516,6 @@
|
||||
cpucore_cool0:cpucore_cool0 {
|
||||
#cooling-cells = <2>; /* min followed by max */
|
||||
};
|
||||
gpufreq_cool0:gpufreq_cool0 {
|
||||
#cooling-cells = <2>; /* min followed by max */
|
||||
};
|
||||
gpucore_cool0:gpucore_cool0 {
|
||||
#cooling-cells = <2>; /* min followed by max */
|
||||
};
|
||||
@@ -559,7 +564,7 @@
|
||||
};
|
||||
gpufreq_cooling_map {
|
||||
trip = <&control>;
|
||||
cooling-device = <&gpufreq_cool0 0 4>;
|
||||
cooling-device = <&gpu 0 4>;
|
||||
contribution = <1024>;
|
||||
};
|
||||
gpucore_cooling_map {
|
||||
@@ -784,6 +789,7 @@
|
||||
|
||||
meson-fb {
|
||||
compatible = "amlogic, meson-gxl";
|
||||
memory-region = <&logo_reserved>;
|
||||
dev_name = "meson-fb";
|
||||
status = "okay";
|
||||
interrupts = <0 3 1
|
||||
@@ -797,7 +803,7 @@
|
||||
display_size_default = <1280 720 1280 2160 32>;
|
||||
/*1920*1080*4*3 = 0x17BB000*/
|
||||
mem_alloc = <1>;
|
||||
logo_addr = "0x3f000000";
|
||||
logo_addr = "0x3fc00000";
|
||||
};
|
||||
ge2d {
|
||||
compatible = "amlogic, ge2d-gxl";
|
||||
|
||||
@@ -474,7 +474,8 @@
|
||||
compatible = "amlogic, gxbb-eth-dwmac";
|
||||
reg = <0xc9410000 0x10000
|
||||
0xc8834540 0x8
|
||||
0xc8834558 0xc>;
|
||||
0xc8834558 0xc
|
||||
0xc1104408 0x4>;
|
||||
interrupts = <0 8 1>;
|
||||
pinctrl-names = "external_eth_pins";
|
||||
pinctrl-0 = <&external_eth_pins>;
|
||||
@@ -513,7 +514,7 @@
|
||||
min_state = <400>;
|
||||
dyn_coeff = <437>;
|
||||
cluster_id = <0>;
|
||||
node_name = "gpufreq_cool0";
|
||||
node_name = "mali";
|
||||
device_type = "gpufreq";
|
||||
};
|
||||
gpucore_cool {
|
||||
@@ -530,9 +531,6 @@
|
||||
cpucore_cool0:cpucore_cool0 {
|
||||
#cooling-cells = <2>; /* min followed by max */
|
||||
};
|
||||
gpufreq_cool0:gpufreq_cool0 {
|
||||
#cooling-cells = <2>; /* min followed by max */
|
||||
};
|
||||
gpucore_cool0:gpucore_cool0 {
|
||||
#cooling-cells = <2>; /* min followed by max */
|
||||
};
|
||||
@@ -581,7 +579,7 @@
|
||||
};
|
||||
gpufreq_cooling_map {
|
||||
trip = <&control>;
|
||||
cooling-device = <&gpufreq_cool0 0 4>;
|
||||
cooling-device = <&gpu 0 4>;
|
||||
contribution = <1024>;
|
||||
};
|
||||
gpucore_cooling_map {
|
||||
@@ -999,6 +997,15 @@
|
||||
sound-dai = <&pcm_codec>;
|
||||
};
|
||||
};
|
||||
|
||||
amlkaraoke {
|
||||
compatible = "amlogic, aml_karaoke";
|
||||
dev_name = "aml_karaoke";
|
||||
status = "okay";
|
||||
interrupts = <0 48 1>;
|
||||
interrupt-names = "aml_karaoke";
|
||||
};
|
||||
|
||||
/* END OF AUDIO board specific */
|
||||
rdma{
|
||||
compatible = "amlogic, meson, rdma";
|
||||
|
||||
@@ -71,13 +71,20 @@
|
||||
reg = <0x05300000 0x2000000>;
|
||||
no-map;
|
||||
};
|
||||
logo_reserved:linux,meson-fb {
|
||||
compatible = "shared-dma-pool";
|
||||
reusable;
|
||||
size = <0x400000>;
|
||||
alignment = <0x400000>;
|
||||
alloc-ranges = <0x3fc00000 0x400000>;
|
||||
};
|
||||
//don't put other dts in front of logo_reserved
|
||||
ion_reserved:linux,ion-dev {
|
||||
compatible = "shared-dma-pool";
|
||||
reusable;
|
||||
size = <0x8000000>;
|
||||
alignment = <0x400000>;
|
||||
};
|
||||
//don't put other dts in front of fb_reserved
|
||||
|
||||
//di_reserved:linux,di {
|
||||
// compatible = "amlogic, di-mem";
|
||||
@@ -451,7 +458,8 @@
|
||||
compatible = "amlogic, gxbb-eth-dwmac";
|
||||
reg = <0xc9410000 0x10000
|
||||
0xc8834540 0x8
|
||||
0xc8834558 0xc>;
|
||||
0xc8834558 0xc
|
||||
0xc1104408 0x4>;
|
||||
interrupts = <0 8 1>;
|
||||
pinctrl-names = "external_eth_pins";
|
||||
pinctrl-0 = <&external_eth_pins>;
|
||||
@@ -490,7 +498,7 @@
|
||||
min_state = <400>;
|
||||
dyn_coeff = <437>;
|
||||
cluster_id = <0>;
|
||||
node_name = "gpufreq_cool0";
|
||||
node_name = "mali";
|
||||
device_type = "gpufreq";
|
||||
};
|
||||
gpucore_cool {
|
||||
@@ -507,9 +515,6 @@
|
||||
cpucore_cool0:cpucore_cool0 {
|
||||
#cooling-cells = <2>; /* min followed by max */
|
||||
};
|
||||
gpufreq_cool0:gpufreq_cool0 {
|
||||
#cooling-cells = <2>; /* min followed by max */
|
||||
};
|
||||
gpucore_cool0:gpucore_cool0 {
|
||||
#cooling-cells = <2>; /* min followed by max */
|
||||
};
|
||||
@@ -558,7 +563,7 @@
|
||||
};
|
||||
gpufreq_cooling_map {
|
||||
trip = <&control>;
|
||||
cooling-device = <&gpufreq_cool0 0 4>;
|
||||
cooling-device = <&gpu 0 4>;
|
||||
contribution = <1024>;
|
||||
};
|
||||
gpucore_cooling_map {
|
||||
@@ -783,6 +788,7 @@
|
||||
|
||||
meson-fb {
|
||||
compatible = "amlogic, meson-gxl";
|
||||
memory-region = <&logo_reserved>;
|
||||
dev_name = "meson-fb";
|
||||
status = "okay";
|
||||
interrupts = <0 3 1
|
||||
@@ -796,7 +802,7 @@
|
||||
display_size_default = <1280 720 1280 2160 32>;
|
||||
/*1920*1080*4*3 = 0x17BB000*/
|
||||
mem_alloc = <1>;
|
||||
logo_addr = "0x3f000000";
|
||||
logo_addr = "0x3fc00000";
|
||||
};
|
||||
ge2d {
|
||||
compatible = "amlogic, ge2d-gxl";
|
||||
|
||||
@@ -411,7 +411,8 @@
|
||||
compatible = "amlogic, gxbb-eth-dwmac";
|
||||
reg = <0xc9410000 0x10000
|
||||
0xc8834540 0x8
|
||||
0xc8834558 0xc>;
|
||||
0xc8834558 0xc
|
||||
0xc1104408 0x4>;
|
||||
interrupts = <0 8 1>;
|
||||
pinctrl-names = "external_eth_pins";
|
||||
pinctrl-0 = <&external_eth_pins>;
|
||||
@@ -450,7 +451,7 @@
|
||||
min_state = <500>;
|
||||
dyn_coeff = <437>;
|
||||
cluster_id = <0>;
|
||||
node_name = "gpufreq_cool0";
|
||||
node_name = "mali";
|
||||
device_type = "gpufreq";
|
||||
};
|
||||
gpucore_cool {
|
||||
@@ -467,9 +468,6 @@
|
||||
cpucore_cool0:cpucore_cool0 {
|
||||
#cooling-cells = <2>; /* min followed by max */
|
||||
};
|
||||
gpufreq_cool0:gpufreq_cool0 {
|
||||
#cooling-cells = <2>; /* min followed by max */
|
||||
};
|
||||
gpucore_cool0:gpucore_cool0 {
|
||||
#cooling-cells = <2>; /* min followed by max */
|
||||
};
|
||||
@@ -518,7 +516,7 @@
|
||||
};
|
||||
gpufreq_cooling_map {
|
||||
trip = <&control>;
|
||||
cooling-device = <&gpufreq_cool0 0 4>;
|
||||
cooling-device = <&gpu 0 4>;
|
||||
contribution = <1024>;
|
||||
};
|
||||
gpucore_cooling_map {
|
||||
@@ -784,7 +782,6 @@
|
||||
"clk_ge2d_gate";
|
||||
};
|
||||
|
||||
|
||||
/* AUDIO MESON DEVICES */
|
||||
i2s_dai: I2S {
|
||||
#sound-dai-cells = <0>;
|
||||
@@ -943,6 +940,15 @@
|
||||
sound-dai = <&pcm_codec>;
|
||||
};
|
||||
};
|
||||
|
||||
amlkaraoke {
|
||||
compatible = "amlogic, aml_karaoke";
|
||||
dev_name = "aml_karaoke";
|
||||
status = "okay";
|
||||
interrupts = <0 48 1>;
|
||||
interrupt-names = "aml_karaoke";
|
||||
};
|
||||
|
||||
/* END OF AUDIO board specific */
|
||||
rdma{
|
||||
compatible = "amlogic, meson, rdma";
|
||||
@@ -1126,7 +1132,6 @@
|
||||
unifykey-index-15= <&keysn_15>;
|
||||
unifykey-index-16= <&keysn_16>;
|
||||
|
||||
|
||||
keysn_0: key_0{
|
||||
key-name = "usid";
|
||||
key-device = "normal";
|
||||
@@ -1216,8 +1221,46 @@
|
||||
key-permit = "read","write","del";
|
||||
};
|
||||
};//End unifykey
|
||||
dvb {
|
||||
compatible = "amlogic, dvb";
|
||||
dev_name = "dvb";
|
||||
|
||||
// fe0_mode = "external";
|
||||
// fe0_demod = "Atbm8881";
|
||||
// fe0_i2c_adap_id = <&i2c1>;
|
||||
// fe0_demod_i2c_addr = <0xc0>;
|
||||
// fe0_ts = <0>;
|
||||
// fe0_reset_value = <0>;
|
||||
// fe0_reset_gpio = <&gpio GPIODV_14 GPIO_ACTIVE_HIGH>;
|
||||
|
||||
// ts0 = "parallel";
|
||||
// ts0_control = <0>;
|
||||
// ts0_invert = <0>;
|
||||
interrupts = <0 23 1
|
||||
0 5 1
|
||||
0 21 1
|
||||
0 19 1
|
||||
0 25 1
|
||||
0 18 1
|
||||
0 24 1>;
|
||||
interrupt-names = "demux0_irq",
|
||||
"demux1_irq",
|
||||
"demux2_irq",
|
||||
"dvr0_irq",
|
||||
"dvr1_irq",
|
||||
"dvrfill0_fill",
|
||||
"dvrfill1_flush";
|
||||
// pinctrl-names = "p_ts0", "s_ts0";
|
||||
// pinctrl-0 = <&dvb_p_ts0_pins>;
|
||||
// pinctrl-1 = <&dvb_s_ts0_pins>;
|
||||
clocks = <&clkc CLKID_DEMUX
|
||||
&clkc CLKID_ASYNC_FIFO
|
||||
&clkc CLKID_AHB_ARB0
|
||||
&clkc CLKID_HIU_IFACE>;
|
||||
clock-names = "demux", "asyncfifo", "ahbarb0", "uparsertop";
|
||||
};
|
||||
};
|
||||
|
||||
&efuse {
|
||||
status = "ok";
|
||||
};
|
||||
@@ -1229,6 +1272,7 @@
|
||||
&audio_data{
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&spicc{
|
||||
status = "disabled";
|
||||
pinctrl-names = "spicc_pulldown","spicc_pullup";
|
||||
|
||||
@@ -77,7 +77,7 @@
|
||||
reusable;
|
||||
size = <0x400000>;
|
||||
alignment = <0x400000>;
|
||||
alloc-ranges = <0x7fc00000 0x400000>;
|
||||
alloc-ranges = <0x7fc00000 0xc00000>;
|
||||
};
|
||||
//don't put other dts in front of logo_reserved
|
||||
|
||||
@@ -410,7 +410,8 @@
|
||||
compatible = "amlogic, gxbb-eth-dwmac";
|
||||
reg = <0xc9410000 0x10000
|
||||
0xc8834540 0x8
|
||||
0xc8834558 0xc>;
|
||||
0xc8834558 0xc
|
||||
0xc1104408 0x4>;
|
||||
interrupts = <0 8 1>;
|
||||
pinctrl-names = "external_eth_pins";
|
||||
pinctrl-0 = <&external_eth_pins>;
|
||||
@@ -537,7 +538,7 @@
|
||||
min_state = <500>;
|
||||
dyn_coeff = <437>;
|
||||
cluster_id = <0>;
|
||||
node_name = "gpufreq_cool0";
|
||||
node_name = "mali";
|
||||
device_type = "gpufreq";
|
||||
};
|
||||
gpucore_cool {
|
||||
@@ -554,9 +555,6 @@
|
||||
cpucore_cool0:cpucore_cool0 {
|
||||
#cooling-cells = <2>; /* min followed by max */
|
||||
};
|
||||
gpufreq_cool0:gpufreq_cool0 {
|
||||
#cooling-cells = <2>; /* min followed by max */
|
||||
};
|
||||
gpucore_cool0:gpucore_cool0 {
|
||||
#cooling-cells = <2>; /* min followed by max */
|
||||
};
|
||||
@@ -605,7 +603,7 @@
|
||||
};
|
||||
gpufreq_cooling_map {
|
||||
trip = <&control>;
|
||||
cooling-device = <&gpufreq_cool0 0 4>;
|
||||
cooling-device = <&gpu 0 4>;
|
||||
contribution = <1024>;
|
||||
};
|
||||
gpucore_cooling_map {
|
||||
@@ -784,7 +782,6 @@
|
||||
"clk_ge2d_gate";
|
||||
};
|
||||
|
||||
|
||||
/* AUDIO MESON DEVICES */
|
||||
i2s_dai: I2S {
|
||||
#sound-dai-cells = <0>;
|
||||
@@ -943,6 +940,15 @@
|
||||
sound-dai = <&pcm_codec>;
|
||||
};
|
||||
};
|
||||
|
||||
amlkaraoke {
|
||||
compatible = "amlogic, aml_karaoke";
|
||||
dev_name = "aml_karaoke";
|
||||
status = "okay";
|
||||
interrupts = <0 48 1>;
|
||||
interrupt-names = "aml_karaoke";
|
||||
};
|
||||
|
||||
/* END OF AUDIO board specific */
|
||||
rdma{
|
||||
compatible = "amlogic, meson, rdma";
|
||||
@@ -1215,7 +1221,47 @@
|
||||
key-permit = "read","write","del";
|
||||
};
|
||||
};//End unifykey
|
||||
dvb {
|
||||
compatible = "amlogic, dvb";
|
||||
dev_name = "dvb";
|
||||
|
||||
// fe0_mode = "external";
|
||||
// fe0_demod = "Atbm8881";
|
||||
// fe0_i2c_adap_id = <&i2c1>;
|
||||
// fe0_demod_i2c_addr = <0xc0>;
|
||||
// fe0_ts = <0>;
|
||||
// fe0_reset_value = <0>;
|
||||
// fe0_reset_gpio = <&gpio GPIODV_14 GPIO_ACTIVE_HIGH>;
|
||||
|
||||
// ts0 = "parallel";
|
||||
// ts0_control = <0>;
|
||||
// ts0_invert = <0>;
|
||||
interrupts = <0 23 1
|
||||
0 5 1
|
||||
0 21 1
|
||||
0 19 1
|
||||
0 25 1
|
||||
0 18 1
|
||||
0 24 1>;
|
||||
interrupt-names = "demux0_irq",
|
||||
"demux1_irq",
|
||||
"demux2_irq",
|
||||
"dvr0_irq",
|
||||
"dvr1_irq",
|
||||
"dvrfill0_fill",
|
||||
"dvrfill1_flush";
|
||||
// pinctrl-names = "p_ts0", "s_ts0";
|
||||
// pinctrl-0 = <&dvb_p_ts0_pins>;
|
||||
// pinctrl-1 = <&dvb_s_ts0_pins>;
|
||||
clocks = <&clkc CLKID_DEMUX
|
||||
&clkc CLKID_ASYNC_FIFO
|
||||
&clkc CLKID_AHB_ARB0
|
||||
&clkc CLKID_HIU_IFACE>;
|
||||
clock-names = "demux", "asyncfifo", "ahbarb0", "uparsertop";
|
||||
};
|
||||
|
||||
};
|
||||
|
||||
&efuse {
|
||||
status = "ok";
|
||||
};
|
||||
|
||||
@@ -404,7 +404,8 @@
|
||||
compatible = "amlogic, gxbb-eth-dwmac";
|
||||
reg = <0xc9410000 0x10000
|
||||
0xc8834540 0x8
|
||||
0xc8834558 0xc>;
|
||||
0xc8834558 0xc
|
||||
0xc1104408 0x4>;
|
||||
interrupts = <0 8 1>;
|
||||
pinctrl-names = "external_eth_pins";
|
||||
pinctrl-0 = <&external_eth_pins>;
|
||||
@@ -443,7 +444,7 @@
|
||||
min_state = <500>;
|
||||
dyn_coeff = <437>;
|
||||
cluster_id = <0>;
|
||||
node_name = "gpufreq_cool0";
|
||||
node_name = "mali";
|
||||
device_type = "gpufreq";
|
||||
};
|
||||
gpucore_cool {
|
||||
@@ -460,9 +461,6 @@
|
||||
cpucore_cool0:cpucore_cool0 {
|
||||
#cooling-cells = <2>; /* min followed by max */
|
||||
};
|
||||
gpufreq_cool0:gpufreq_cool0 {
|
||||
#cooling-cells = <2>; /* min followed by max */
|
||||
};
|
||||
gpucore_cool0:gpucore_cool0 {
|
||||
#cooling-cells = <2>; /* min followed by max */
|
||||
};
|
||||
@@ -511,7 +509,7 @@
|
||||
};
|
||||
gpufreq_cooling_map {
|
||||
trip = <&control>;
|
||||
cooling-device = <&gpufreq_cool0 0 4>;
|
||||
cooling-device = <&gpu 0 4>;
|
||||
contribution = <1024>;
|
||||
};
|
||||
gpucore_cooling_map {
|
||||
|
||||
@@ -410,7 +410,8 @@
|
||||
compatible = "amlogic, gxbb-eth-dwmac";
|
||||
reg = <0xc9410000 0x10000
|
||||
0xc8834540 0x8
|
||||
0xc8834558 0xc>;
|
||||
0xc8834558 0xc
|
||||
0xc1104408 0x4>;
|
||||
interrupts = <0 8 1>;
|
||||
pinctrl-names = "external_eth_pins";
|
||||
pinctrl-0 = <&external_eth_pins>;
|
||||
@@ -537,7 +538,7 @@
|
||||
min_state = <500>;
|
||||
dyn_coeff = <437>;
|
||||
cluster_id = <0>;
|
||||
node_name = "gpufreq_cool0";
|
||||
node_name = "mali";
|
||||
device_type = "gpufreq";
|
||||
};
|
||||
gpucore_cool {
|
||||
@@ -554,9 +555,6 @@
|
||||
cpucore_cool0:cpucore_cool0 {
|
||||
#cooling-cells = <2>; /* min followed by max */
|
||||
};
|
||||
gpufreq_cool0:gpufreq_cool0 {
|
||||
#cooling-cells = <2>; /* min followed by max */
|
||||
};
|
||||
gpucore_cool0:gpucore_cool0 {
|
||||
#cooling-cells = <2>; /* min followed by max */
|
||||
};
|
||||
@@ -605,7 +603,7 @@
|
||||
};
|
||||
gpufreq_cooling_map {
|
||||
trip = <&control>;
|
||||
cooling-device = <&gpufreq_cool0 0 4>;
|
||||
cooling-device = <&gpu 0 4>;
|
||||
contribution = <1024>;
|
||||
};
|
||||
gpucore_cooling_map {
|
||||
|
||||
@@ -67,12 +67,12 @@
|
||||
reg = <0x05300000 0x2000000>;
|
||||
no-map;
|
||||
};
|
||||
fb_reserved:linux,meson-fb {
|
||||
logo_reserved:linux,meson-fb {
|
||||
compatible = "shared-dma-pool";
|
||||
reusable;
|
||||
size = <0x2400000>;
|
||||
size = <0x800000>;
|
||||
alignment = <0x400000>;
|
||||
alloc-ranges = <0x7dc00000 0x2400000>;
|
||||
alloc-ranges = <0x7f800000 0x800000>;
|
||||
};
|
||||
};
|
||||
|
||||
@@ -256,7 +256,8 @@
|
||||
compatible = "amlogic, gxbb-eth-dwmac";
|
||||
reg = <0xc9410000 0x10000
|
||||
0xc8834540 0x8
|
||||
0xc8834558 0xc>;
|
||||
0xc8834558 0xc
|
||||
0xc1104408 0x4>;
|
||||
interrupts = <0 8 1>;
|
||||
pinctrl-names = "external_eth_pins";
|
||||
pinctrl-0 = <&external_eth_pins>;
|
||||
@@ -470,7 +471,7 @@
|
||||
|
||||
meson-fb {
|
||||
compatible = "amlogic, meson-gxl";
|
||||
memory-region = <&fb_reserved>;
|
||||
memory-region = <&logo_reserved>;
|
||||
dev_name = "meson-fb";
|
||||
status = "okay";
|
||||
interrupts = <0 3 1
|
||||
@@ -484,7 +485,7 @@
|
||||
display_size_default = <1920 1080 1920 3240 32>;
|
||||
/*1920*1080*4*3 = 0x17BB000*/
|
||||
mem_alloc = <1>;
|
||||
logo_addr = "0x7dc00000";
|
||||
logo_addr = "0x7f800000";
|
||||
};
|
||||
|
||||
ge2d {
|
||||
|
||||
@@ -67,12 +67,12 @@
|
||||
reg = <0x05300000 0x2000000>;
|
||||
no-map;
|
||||
};
|
||||
fb_reserved:linux,meson-fb {
|
||||
logo_reserved:linux,meson-fb {
|
||||
compatible = "shared-dma-pool";
|
||||
reusable;
|
||||
size = <0x2400000>;
|
||||
size = <0x800000>;
|
||||
alignment = <0x400000>;
|
||||
alloc-ranges = <0x7dc00000 0x2400000>;
|
||||
alloc-ranges = <0x7f800000 0x800000>;
|
||||
};
|
||||
};
|
||||
|
||||
@@ -344,7 +344,8 @@
|
||||
compatible = "amlogic, gxbb-eth-dwmac";
|
||||
reg = <0xc9410000 0x10000
|
||||
0xc8834540 0x8
|
||||
0xc8834558 0xc>;
|
||||
0xc8834558 0xc
|
||||
0xc1104408 0x4>;
|
||||
interrupts = <0 8 1>;
|
||||
pinctrl-names = "external_eth_pins";
|
||||
pinctrl-0 = <&external_eth_pins>;
|
||||
@@ -558,7 +559,7 @@
|
||||
|
||||
meson-fb {
|
||||
compatible = "amlogic, meson-gxl";
|
||||
memory-region = <&fb_reserved>;
|
||||
memory-region = <&logo_reserved>;
|
||||
dev_name = "meson-fb";
|
||||
status = "okay";
|
||||
interrupts = <0 3 1
|
||||
@@ -572,7 +573,7 @@
|
||||
display_size_default = <1920 1080 1920 3240 32>;
|
||||
/*1920*1080*4*3 = 0x17BB000*/
|
||||
mem_alloc = <1>;
|
||||
logo_addr = "0x7dc00000";
|
||||
logo_addr = "0x7f800000";
|
||||
};
|
||||
|
||||
ge2d {
|
||||
|
||||
@@ -390,7 +390,8 @@
|
||||
compatible = "amlogic, gxbb-eth-dwmac";
|
||||
reg = <0xc9410000 0x10000
|
||||
0xc8834540 0x8
|
||||
0xc8834558 0xc>;
|
||||
0xc8834558 0xc
|
||||
0xc1104408 0x4>;
|
||||
interrupts = <0 8 1>;
|
||||
pinctrl-names = "external_eth_pins";
|
||||
pinctrl-0 = <&external_eth_pins>;
|
||||
|
||||
@@ -398,7 +398,8 @@
|
||||
compatible = "amlogic, gxbb-eth-dwmac";
|
||||
reg = <0xc9410000 0x10000
|
||||
0xc8834540 0x8
|
||||
0xc8834558 0xc>;
|
||||
0xc8834558 0xc
|
||||
0xc1104408 0x4>;
|
||||
interrupts = <0 8 1>;
|
||||
pinctrl-names = "external_eth_pins";
|
||||
pinctrl-0 = <&external_eth_pins>;
|
||||
|
||||
@@ -400,7 +400,8 @@
|
||||
compatible = "amlogic, gxbb-eth-dwmac";
|
||||
reg = <0xc9410000 0x10000
|
||||
0xc8834540 0x8
|
||||
0xc8834558 0xc>;
|
||||
0xc8834558 0xc
|
||||
0xc1104408 0x4>;
|
||||
interrupts = <0 8 1>;
|
||||
pinctrl-names = "external_eth_pins";
|
||||
pinctrl-0 = <&external_eth_pins>;
|
||||
|
||||
@@ -389,7 +389,8 @@
|
||||
compatible = "amlogic, gxbb-eth-dwmac";
|
||||
reg = <0xc9410000 0x10000
|
||||
0xc8834540 0x8
|
||||
0xc8834558 0xc>;
|
||||
0xc8834558 0xc
|
||||
0xc1104408 0x4>;
|
||||
interrupts = <0 8 1>;
|
||||
pinctrl-names = "external_eth_pins";
|
||||
pinctrl-0 = <&external_eth_pins>;
|
||||
@@ -519,7 +520,7 @@
|
||||
min_state = <400>;
|
||||
dyn_coeff = <437>;
|
||||
cluster_id = <0>;
|
||||
node_name = "gpufreq_cool0";
|
||||
node_name = "t82x";
|
||||
device_type = "gpufreq";
|
||||
};
|
||||
gpucore_cool {
|
||||
@@ -542,9 +543,6 @@
|
||||
cpucore_cool1:cpucore_cool1 {
|
||||
#cooling-cells = <2>; /* min followed by max */
|
||||
};
|
||||
gpufreq_cool0:gpufreq_cool0 {
|
||||
#cooling-cells = <2>; /* min followed by max */
|
||||
};
|
||||
gpucore_cool0:gpucore_cool0 {
|
||||
#cooling-cells = <2>; /* min followed by max */
|
||||
};
|
||||
@@ -603,7 +601,7 @@
|
||||
};
|
||||
gpufreq_cooling_map {
|
||||
trip = <&control>;
|
||||
cooling-device = <&gpufreq_cool0 0 4>;
|
||||
cooling-device = <&t82x_gpu 0 4>;
|
||||
contribution = <1024>;
|
||||
};
|
||||
gpucore_cooling_map {
|
||||
|
||||
@@ -393,7 +393,8 @@
|
||||
compatible = "amlogic, gxbb-eth-dwmac";
|
||||
reg = <0xc9410000 0x10000
|
||||
0xc8834540 0x8
|
||||
0xc8834558 0xc>;
|
||||
0xc8834558 0xc
|
||||
0xc1104408 0x4>;
|
||||
interrupts = <0 8 1>;
|
||||
pinctrl-names = "external_eth_pins";
|
||||
pinctrl-0 = <&external_eth_pins>;
|
||||
@@ -523,7 +524,7 @@
|
||||
min_state = <400>;
|
||||
dyn_coeff = <437>;
|
||||
cluster_id = <0>;
|
||||
node_name = "gpufreq_cool0";
|
||||
node_name = "t82x";
|
||||
device_type = "gpufreq";
|
||||
};
|
||||
gpucore_cool {
|
||||
@@ -546,9 +547,6 @@
|
||||
cpucore_cool1:cpucore_cool1 {
|
||||
#cooling-cells = <2>; /* min followed by max */
|
||||
};
|
||||
gpufreq_cool0:gpufreq_cool0 {
|
||||
#cooling-cells = <2>; /* min followed by max */
|
||||
};
|
||||
gpucore_cool0:gpucore_cool0 {
|
||||
#cooling-cells = <2>; /* min followed by max */
|
||||
};
|
||||
@@ -607,7 +605,7 @@
|
||||
};
|
||||
gpufreq_cooling_map {
|
||||
trip = <&control>;
|
||||
cooling-device = <&gpufreq_cool0 0 4>;
|
||||
cooling-device = <&t82x_gpu 0 4>;
|
||||
contribution = <1024>;
|
||||
};
|
||||
gpucore_cooling_map {
|
||||
|
||||
@@ -395,7 +395,8 @@
|
||||
compatible = "amlogic, gxbb-eth-dwmac";
|
||||
reg = <0xc9410000 0x10000
|
||||
0xc8834540 0x8
|
||||
0xc8834558 0xc>;
|
||||
0xc8834558 0xc
|
||||
0xc1104408 0x4>;
|
||||
interrupts = <0 8 1>;
|
||||
pinctrl-names = "external_eth_pins";
|
||||
pinctrl-0 = <&external_eth_pins>;
|
||||
@@ -408,7 +409,7 @@
|
||||
interrupt-names = "macirq";
|
||||
clocks = <&clkc CLKID_ETH>;
|
||||
clock-names = "ethclk81";
|
||||
internal_phy=<0>;
|
||||
internal_phy=<1>;
|
||||
};
|
||||
|
||||
codec_io {
|
||||
@@ -523,7 +524,7 @@
|
||||
min_state = <400>;
|
||||
dyn_coeff = <437>;
|
||||
cluster_id = <0>;
|
||||
node_name = "gpufreq_cool0";
|
||||
node_name = "t82x";
|
||||
device_type = "gpufreq";
|
||||
};
|
||||
gpucore_cool {
|
||||
@@ -546,9 +547,6 @@
|
||||
cpucore_cool1:cpucore_cool1 {
|
||||
#cooling-cells = <2>; /* min followed by max */
|
||||
};
|
||||
gpufreq_cool0:gpufreq_cool0 {
|
||||
#cooling-cells = <2>; /* min followed by max */
|
||||
};
|
||||
gpucore_cool0:gpucore_cool0 {
|
||||
#cooling-cells = <2>; /* min followed by max */
|
||||
};
|
||||
@@ -607,7 +605,7 @@
|
||||
};
|
||||
gpufreq_cooling_map {
|
||||
trip = <&control>;
|
||||
cooling-device = <&gpufreq_cool0 0 4>;
|
||||
cooling-device = <&t82x_gpu 0 4>;
|
||||
contribution = <1024>;
|
||||
};
|
||||
gpucore_cooling_map {
|
||||
@@ -880,7 +878,7 @@
|
||||
spdif_codec: spdif_codec{
|
||||
#sound-dai-cells = <0>;
|
||||
compatible = "amlogic, aml-spdif-codec";
|
||||
pinctrl-names = "audio_spdif";
|
||||
pinctrl-names = "audio_spdif_out";
|
||||
pinctrl-0 = <&audio_spdif_pins>;
|
||||
};
|
||||
pcm_codec: pcm_codec{
|
||||
|
||||
@@ -397,7 +397,8 @@
|
||||
compatible = "amlogic, gxbb-eth-dwmac";
|
||||
reg = <0xc9410000 0x10000
|
||||
0xc8834540 0x8
|
||||
0xc8834558 0xc>;
|
||||
0xc8834558 0xc
|
||||
0xc1104408 0x4>;
|
||||
interrupts = <0 8 1>;
|
||||
pinctrl-names = "external_eth_pins";
|
||||
pinctrl-0 = <&external_eth_pins>;
|
||||
@@ -410,7 +411,7 @@
|
||||
interrupt-names = "macirq";
|
||||
clocks = <&clkc CLKID_ETH>;
|
||||
clock-names = "ethclk81";
|
||||
internal_phy=<0>;
|
||||
internal_phy=<1>;
|
||||
};
|
||||
|
||||
codec_io {
|
||||
@@ -525,7 +526,7 @@
|
||||
min_state = <400>;
|
||||
dyn_coeff = <437>;
|
||||
cluster_id = <0>;
|
||||
node_name = "gpufreq_cool0";
|
||||
node_name = "t82x";
|
||||
device_type = "gpufreq";
|
||||
};
|
||||
gpucore_cool {
|
||||
@@ -548,9 +549,6 @@
|
||||
cpucore_cool1:cpucore_cool1 {
|
||||
#cooling-cells = <2>; /* min followed by max */
|
||||
};
|
||||
gpufreq_cool0:gpufreq_cool0 {
|
||||
#cooling-cells = <2>; /* min followed by max */
|
||||
};
|
||||
gpucore_cool0:gpucore_cool0 {
|
||||
#cooling-cells = <2>; /* min followed by max */
|
||||
};
|
||||
@@ -609,7 +607,7 @@
|
||||
};
|
||||
gpufreq_cooling_map {
|
||||
trip = <&control>;
|
||||
cooling-device = <&gpufreq_cool0 0 4>;
|
||||
cooling-device = <&t82x_gpu 0 4>;
|
||||
contribution = <1024>;
|
||||
};
|
||||
gpucore_cooling_map {
|
||||
@@ -883,7 +881,7 @@
|
||||
spdif_codec: spdif_codec{
|
||||
#sound-dai-cells = <0>;
|
||||
compatible = "amlogic, aml-spdif-codec";
|
||||
pinctrl-names = "audio_spdif";
|
||||
pinctrl-names = "audio_spdif_out";
|
||||
pinctrl-0 = <&audio_spdif_pins>;
|
||||
};
|
||||
pcm_codec: pcm_codec{
|
||||
|
||||
@@ -472,7 +472,7 @@
|
||||
min_state = <400>;
|
||||
dyn_coeff = <437>;
|
||||
cluster_id = <0>;
|
||||
node_name = "gpufreq_cool0";
|
||||
node_name = "t82x";
|
||||
device_type = "gpufreq";
|
||||
};
|
||||
gpucore_cool {
|
||||
@@ -495,10 +495,7 @@
|
||||
cpucore_cool1:cpucore_cool1 {
|
||||
#cooling-cells = <2>; /* min followed by max */
|
||||
};
|
||||
gpufreq_cool0:gpufreq_cool0 {
|
||||
#cooling-cells = <2>; /* min followed by max */
|
||||
};
|
||||
gpucore_cool0:gpucore_cool0 {
|
||||
gpucore_cool0:gpucore_cool0 {
|
||||
#cooling-cells = <2>; /* min followed by max */
|
||||
};
|
||||
};
|
||||
@@ -556,7 +553,7 @@
|
||||
};
|
||||
gpufreq_cooling_map {
|
||||
trip = <&control>;
|
||||
cooling-device = <&gpufreq_cool0 0 4>;
|
||||
cooling-device = <&t82x_gpu 0 4>;
|
||||
contribution = <1024>;
|
||||
};
|
||||
gpucore_cooling_map {
|
||||
|
||||
@@ -124,15 +124,10 @@
|
||||
compatible = "amlogic, jtag";
|
||||
status = "okay";
|
||||
reg = <0xda004004 0x4>;
|
||||
select = "apao"; /* disable apao apee */
|
||||
jtagao-gpios = <&gpio_ao GPIOAO_8 0
|
||||
&gpio_ao GPIOAO_9 0
|
||||
&gpio_ao GPIOAO_10 0
|
||||
&gpio_ao GPIOAO_11 0>;
|
||||
jtagee-gpios = <&gpio CARD_0 0
|
||||
&gpio CARD_1 0
|
||||
&gpio CARD_2 0
|
||||
&gpio CARD_3 0>;
|
||||
select = "disable"; /* disable/apao/apee */
|
||||
pinctrl-names="jtag_apao_pins", "jtag_apee_pins";
|
||||
pinctrl-0=<&jtag_apao_pins>;
|
||||
pinctrl-1=<&jtag_apee_pins>;
|
||||
};
|
||||
|
||||
securitykey {
|
||||
@@ -623,6 +618,15 @@
|
||||
bias-pull-up;
|
||||
};
|
||||
};
|
||||
jtag_apee_pins:jtag_apee_pin {
|
||||
mux {
|
||||
groups = "CARD_0",
|
||||
"CARD_1",
|
||||
"CARD_2",
|
||||
"CARD_3";
|
||||
function = "gpio_periphs";
|
||||
};
|
||||
};
|
||||
};
|
||||
pinctrl_aobus: pinctrl@c8100084 {
|
||||
compatible = "amlogic,meson8b-aobus-pinctrl";
|
||||
@@ -681,6 +685,15 @@
|
||||
function = "spdif_2";
|
||||
};
|
||||
};
|
||||
jtag_apao_pins:jtag_apao_pin {
|
||||
mux {
|
||||
groups = "GPIOAO_8",
|
||||
"GPIOAO_9",
|
||||
"GPIOAO_10",
|
||||
"GPIOAO_11";
|
||||
function = "gpio_aobus";
|
||||
};
|
||||
};
|
||||
};
|
||||
dwc2_b {
|
||||
compatible = "amlogic,dwc2";
|
||||
|
||||
@@ -631,7 +631,7 @@
|
||||
"GPIOX_3",
|
||||
"GPIOX_8",
|
||||
"GPIOX_9";
|
||||
function = "gpio";
|
||||
function = "gpio_periphs";
|
||||
};
|
||||
};
|
||||
|
||||
@@ -653,7 +653,7 @@
|
||||
"GPIOX_3",
|
||||
"GPIOX_8",
|
||||
"GPIOX_9";
|
||||
function = "gpio";
|
||||
function = "gpio_periphs";
|
||||
};
|
||||
};
|
||||
|
||||
@@ -676,7 +676,7 @@
|
||||
"BOOT_7",
|
||||
"BOOT_8",
|
||||
"BOOT_10";
|
||||
function = "gpio";
|
||||
function = "gpio_periphs";
|
||||
};
|
||||
|
||||
};
|
||||
@@ -702,7 +702,7 @@
|
||||
"BOOT_7",
|
||||
"BOOT_8",
|
||||
"BOOT_10";
|
||||
function = "gpio";
|
||||
function = "gpio_periphs";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
@@ -51,7 +51,7 @@
|
||||
CPU0:cpu@0 {
|
||||
device_type = "cpu";
|
||||
compatible = "arm,cortex-a53","arm,armv8";
|
||||
reg = <0x0 0x0>;
|
||||
reg = <0x0>;
|
||||
enable-method = "psci";
|
||||
clocks = <&scpi_dvfs 0>;
|
||||
clock-names = "cpu-cluster.0";
|
||||
@@ -61,7 +61,7 @@
|
||||
CPU1:cpu@1 {
|
||||
device_type = "cpu";
|
||||
compatible = "arm,cortex-a53","arm,armv8";
|
||||
reg = <0x0 0x1>;
|
||||
reg = <0x1>;
|
||||
enable-method = "psci";
|
||||
clocks = <&scpi_dvfs 0>;
|
||||
clock-names = "cpu-cluster.0";
|
||||
@@ -70,7 +70,7 @@
|
||||
CPU2:cpu@2 {
|
||||
device_type = "cpu";
|
||||
compatible = "arm,cortex-a53","arm,armv8";
|
||||
reg = <0x0 0x2>;
|
||||
reg = <0x2>;
|
||||
enable-method = "psci";
|
||||
clocks = <&scpi_dvfs 0>;
|
||||
clock-names = "cpu-cluster.0";
|
||||
@@ -80,7 +80,7 @@
|
||||
CPU3:cpu@3 {
|
||||
device_type = "cpu";
|
||||
compatible = "arm,cortex-a53","arm,armv8";
|
||||
reg = <0x0 0x3>;
|
||||
reg = <0x3>;
|
||||
enable-method = "psci";
|
||||
clocks = <&scpi_dvfs 0>;
|
||||
clock-names = "cpu-cluster.0";
|
||||
@@ -279,6 +279,18 @@
|
||||
ram-dump {
|
||||
compatible = "amlogic, ram_dump";
|
||||
status = "okay";
|
||||
reg = <0xFF6345E0 4>;
|
||||
reg-names = "PREG_STICKY_REG8";
|
||||
store_device = "data";
|
||||
};
|
||||
|
||||
jtag {
|
||||
compatible = "amlogic, jtag";
|
||||
status = "okay";
|
||||
select = "disable"; /* disable/apao/apee */
|
||||
pinctrl-names="jtag_apao_pins", "jtag_apee_pins";
|
||||
pinctrl-0=<&jtag_apao_pins>;
|
||||
pinctrl-1=<&jtag_apee_pins>;
|
||||
};
|
||||
|
||||
pinctrl_aobus: pinctrl@ff800014{
|
||||
@@ -456,6 +468,16 @@
|
||||
clock-names = "clk_i2c";
|
||||
clock-frequency = <100000>;
|
||||
};
|
||||
|
||||
irblaster: meson-irblaster@c0 {
|
||||
compatible = "amlogic, aml_irblaster";
|
||||
reg = <0xc0 0xc>,
|
||||
<0x40 0x4>;
|
||||
#irblaster-cells = <2>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&irblaster_pins>;
|
||||
status = "disabled";
|
||||
};
|
||||
};/* end of aobus */
|
||||
|
||||
periphs: periphs@ff634400 {
|
||||
@@ -731,16 +753,6 @@
|
||||
};
|
||||
};
|
||||
|
||||
irblaster: meson-irblaster {
|
||||
compatible = "amlogic, meson_irblaster";
|
||||
reg = <0xff8000c0 0x10>,
|
||||
<0xff800040 0x4>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&irblaster_pins>;
|
||||
interrupts = <0 198 1>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
saradc:saradc {
|
||||
compatible = "amlogic,meson-axg-saradc";
|
||||
status = "okay";
|
||||
@@ -813,6 +825,12 @@
|
||||
cpu_ver_name{
|
||||
compatible = "amlogic, cpu-major-id-axg";
|
||||
};
|
||||
|
||||
defendkey: defendkey {
|
||||
compatible = "amlogic, defendkey";
|
||||
mem_size = <0x0 0x100000>;
|
||||
status = "okay";
|
||||
};
|
||||
};/* end of / */
|
||||
|
||||
&pinctrl_aobus {
|
||||
@@ -878,6 +896,16 @@
|
||||
};
|
||||
};
|
||||
|
||||
jtag_apao_pins:jtag_apao_pin {
|
||||
mux {
|
||||
groups = "jtag_ao_tdi",
|
||||
"jtag_ao_tdo",
|
||||
"jtag_ao_clk",
|
||||
"jtag_ao_tms";
|
||||
function = "jtag_ao";
|
||||
};
|
||||
};
|
||||
|
||||
}; /* end of pinctrl_aobus */
|
||||
|
||||
&pinctrl_periphs {
|
||||
@@ -1139,5 +1167,15 @@
|
||||
};
|
||||
};
|
||||
|
||||
jtag_apee_pins:jtag_apee_pin {
|
||||
mux {
|
||||
groups = "jtag_tdo_x",
|
||||
"jtag_tdi_x",
|
||||
"jtag_clk_x",
|
||||
"jtag_tms_x";
|
||||
function = "jtag_ee";
|
||||
};
|
||||
};
|
||||
|
||||
}; /* end of pinctrl_periphs */
|
||||
|
||||
|
||||
@@ -1,5 +1,5 @@
|
||||
/*
|
||||
* arch/arm/boot/dts/amlogic/mesongxm_q200-panel.dtsi
|
||||
* arch/arm/boot/dts/amlogic/mesonaxg_s400-panel.dtsi
|
||||
*
|
||||
* Copyright (C) 2016 Amlogic, Inc. All rights reserved.
|
||||
*
|
||||
@@ -224,6 +224,87 @@
|
||||
0xff 0 0 0>;
|
||||
backlight_index = <0>;
|
||||
};
|
||||
|
||||
lcd_4{
|
||||
model_name = "480p";
|
||||
/*interface(ttl,lvds,mipi)*/
|
||||
interface = "mipi";
|
||||
basic_setting = <720 480 /*h_active, v_active*/
|
||||
858 525 /*h_period, v_period*/
|
||||
8 /*lcd_bits*/
|
||||
15 8>; /*screen_widht, screen_height*/
|
||||
lcd_timing = <62 60 0 /*hs_width,hs_bp,hs_pol*/
|
||||
6 30 0>; /*vs_width,vs_bp,vs_pol*/
|
||||
clk_attr = <0 /*fr_adj_type(0=clock,1=htotal,2=vtotal)*/
|
||||
0 /*clk_ss_level*/
|
||||
1 /*clk_auto_generate*/
|
||||
27027000>; /*pixel_clk(unit in Hz)*/
|
||||
mipi_attr = <2 /*lane_num*/
|
||||
330 /*bit_rate_max(MHz)*/
|
||||
0 /*factor(*100, default 0 for auto)*/
|
||||
0 /*operation_mode_init(0=video, 1=command)*/
|
||||
0 /*operation_mode_display(0=video, 1=command)*/
|
||||
1 /*
|
||||
*video_mode_type
|
||||
*(0=sync_pulse,1=sync_event,2=burst)
|
||||
*/
|
||||
0 /*clk_always_hs(0=disable,1=enable)*/
|
||||
1>; /*phy_switch(0=auto,1=standard,2=slow)*/
|
||||
/* dsi_init: data_type, num, data... */
|
||||
dsi_init_on = <0xff 0>; /* ending flag */
|
||||
dsi_init_off = <0xff 0>; /* ending flag */
|
||||
/* extern_init: 0xff for invalid */
|
||||
extern_init = <0xff>;
|
||||
/* power step: type,index,value,delay(ms) */
|
||||
power_on_step = <0 0 0 20
|
||||
2 0 0 0
|
||||
0xff 0 0 0>;
|
||||
power_off_step = <2 0 0 100
|
||||
0 0 0 100
|
||||
0xff 0 0 0>;
|
||||
backlight_index = <0xff>;
|
||||
};
|
||||
|
||||
lcd_5{
|
||||
model_name = "720p";
|
||||
interface = "mipi";
|
||||
basic_setting = <1280 720 /*h_active, v_active*/
|
||||
1650 750 /*h_period, v_period*/
|
||||
8 /*lcd_bits*/
|
||||
16 9>; /*screen_widht, screen_height*/
|
||||
lcd_timing = <40 220 0 /*hs_width, hs_bp, hs_pol*/
|
||||
5 20 0>; /*vs_width, vs_bp, vs_pol*/
|
||||
clk_attr = <0 /*fr_adj_type(0=clk, 1=htotal, 2=vtotal)*/
|
||||
0 /*clk_ss_level */
|
||||
1 /*clk_auto_generate*/
|
||||
74250000>; /*pixel_clk(unit in Hz)*/
|
||||
mipi_attr = <4 /*lane_num*/
|
||||
500 /*bit_rate_max(MHz)*/
|
||||
0 /*factor(*100, default 0 for auto)*/
|
||||
0 /*operation_mode_init(0=video, 1=command)*/
|
||||
0 /*operation_mode_display(0=video, 1=command)*/
|
||||
0 /*
|
||||
*video_mode_type
|
||||
*(0=sync_pulse,1=sync_event,2=burst)
|
||||
*/
|
||||
1 /*clk_always_hs(0=disable,1=enable)*/
|
||||
0>; /*phy_switch(0=auto,1=standard,2=slow)*/
|
||||
|
||||
/* dsi_init: data_type, num, data... */
|
||||
dsi_init_on = <0xff 0x0>; /*ending*/
|
||||
dsi_init_off = <0xff 0x0>; /*ending*/
|
||||
extern_init = <0xff>; /*0xff for invalid*/
|
||||
|
||||
/* power step: type, index, value, delay(ms) */
|
||||
power_on_step = <0 0 0 10
|
||||
0 0 1 20
|
||||
2 0 0 0
|
||||
0xff 0 0 0>; /*ending*/
|
||||
power_off_step = <2 0 0 50
|
||||
0 0 0 100
|
||||
0xff 0 0 0>; /*ending*/
|
||||
backlight_index = <0xff>;
|
||||
};
|
||||
};
|
||||
|
||||
lcd_extern{
|
||||
|
||||
631
arch/arm/boot/dts/amlogic/mesonaxg_skt-panel.dtsi
Normal file
631
arch/arm/boot/dts/amlogic/mesonaxg_skt-panel.dtsi
Normal file
@@ -0,0 +1,631 @@
|
||||
/*
|
||||
* arch/arm/boot/dts/amlogic/mesonaxg_skt-panel.dtsi
|
||||
*
|
||||
* Copyright (C) 2016 Amlogic, Inc. All rights reserved.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful, but WITHOUT
|
||||
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
||||
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
||||
* more details.
|
||||
*
|
||||
*/
|
||||
|
||||
/ {
|
||||
lcd{
|
||||
compatible = "amlogic, lcd-axg";
|
||||
mode = "tablet";
|
||||
status = "okay";
|
||||
key_valid = <0>;
|
||||
clocks = <&clkc CLKID_MIPI_DSI_HOST
|
||||
&clkc CLKID_MIPI_DSI_PHY
|
||||
&clkc CLKID_DSI_MEAS_COMP
|
||||
&clkc CLKID_MIPI_ENABLE_GATE
|
||||
&clkc CLKID_MIPI_BANDGAP_GATE>;
|
||||
clock-names = "dsi_host_gate",
|
||||
"dsi_phy_gate",
|
||||
"dsi_meas",
|
||||
"mipi_enable_gate",
|
||||
"mipi_bandgap_gate";
|
||||
reg = <0xffd06000 0x400 /* dsi_host */
|
||||
0xff640000 0x100>; /* dsi_phy */
|
||||
interrupts = <0 3 1>;
|
||||
interrupt-names = "vsync";
|
||||
pinctrl_version = <1>; /* for uboot */
|
||||
|
||||
/* power type:
|
||||
* (0=cpu_gpio, 1=pmu_gpio, 2=signal,3=extern, 0xff=ending)
|
||||
* power index:
|
||||
* (point gpios_index, or extern_index,0xff=invalid)
|
||||
* power value:(0=output low, 1=output high, 2=input)
|
||||
* power delay:(unit in ms)
|
||||
*/
|
||||
lcd_cpu-gpios = <&gpio GPIOZ_6 GPIO_ACTIVE_HIGH>;
|
||||
lcd_cpu_gpio_names = "GPIOZ_6";
|
||||
|
||||
lcd_0{
|
||||
model_name = "720p";
|
||||
interface = "mipi";
|
||||
basic_setting = <1280 720 /*h_active, v_active*/
|
||||
1650 750 /*h_period, v_period*/
|
||||
8 /*lcd_bits*/
|
||||
16 9>; /*screen_widht, screen_height*/
|
||||
lcd_timing = <40 220 0 /*hs_width, hs_bp, hs_pol*/
|
||||
5 20 0>; /*vs_width, vs_bp, vs_pol*/
|
||||
clk_attr = <0 /*fr_adj_type(0=clk, 1=htotal, 2=vtotal)*/
|
||||
0 /*clk_ss_level */
|
||||
1 /*clk_auto_generate*/
|
||||
74250000>; /*pixel_clk(unit in Hz)*/
|
||||
mipi_attr = <4 /*lane_num*/
|
||||
500 /*bit_rate_max(MHz)*/
|
||||
0 /*factor(*100, default 0 for auto)*/
|
||||
0 /*operation_mode_init(0=video, 1=command)*/
|
||||
0 /*operation_mode_display(0=video, 1=command)*/
|
||||
0 /*
|
||||
*video_mode_type
|
||||
*(0=sync_pulse,1=sync_event,2=burst)
|
||||
*/
|
||||
1 /*clk_always_hs(0=disable,1=enable)*/
|
||||
0>; /*phy_switch(0=auto,1=standard,2=slow)*/
|
||||
|
||||
/* dsi_init: data_type, num, data... */
|
||||
dsi_init_on = <0xff 0x0>; /*ending*/
|
||||
dsi_init_off = <0xff 0x0>; /*ending*/
|
||||
extern_init = <0xff>; /*0xff for invalid*/
|
||||
|
||||
/* power step: type, index, value, delay(ms) */
|
||||
power_on_step = <0 0 0 10
|
||||
0 0 1 20
|
||||
2 0 0 0
|
||||
0xff 0 0 0>; /*ending*/
|
||||
power_off_step = <2 0 0 50
|
||||
0 0 0 100
|
||||
0xff 0 0 0>; /*ending*/
|
||||
backlight_index = <0xff>;
|
||||
};
|
||||
|
||||
lcd_1{
|
||||
model_name = "480p";
|
||||
/*interface(ttl,lvds,mipi)*/
|
||||
interface = "mipi";
|
||||
basic_setting = <720 480 /*h_active, v_active*/
|
||||
858 525 /*h_period, v_period*/
|
||||
8 /*lcd_bits*/
|
||||
15 8>; /*screen_widht, screen_height*/
|
||||
lcd_timing = <62 60 0 /*hs_width,hs_bp,hs_pol*/
|
||||
6 30 0>; /*vs_width,vs_bp,vs_pol*/
|
||||
clk_attr = <0 /*fr_adj_type(0=clock,1=htotal,2=vtotal)*/
|
||||
0 /*clk_ss_level*/
|
||||
1 /*clk_auto_generate*/
|
||||
27027000>; /*pixel_clk(unit in Hz)*/
|
||||
mipi_attr = <2 /*lane_num*/
|
||||
330 /*bit_rate_max(MHz)*/
|
||||
0 /*factor(*100, default 0 for auto)*/
|
||||
0 /*operation_mode_init(0=video, 1=command)*/
|
||||
0 /*operation_mode_display(0=video, 1=command)*/
|
||||
1 /*
|
||||
*video_mode_type
|
||||
*(0=sync_pulse,1=sync_event,2=burst)
|
||||
*/
|
||||
0 /*clk_always_hs(0=disable,1=enable)*/
|
||||
1>; /*phy_switch(0=auto,1=standard,2=slow)*/
|
||||
/* dsi_init: data_type, num, data... */
|
||||
dsi_init_on = <0xff 0>; /* ending flag */
|
||||
dsi_init_off = <0xff 0>; /* ending flag */
|
||||
/* extern_init: 0xff for invalid */
|
||||
extern_init = <0xff>;
|
||||
/* power step: type,index,value,delay(ms) */
|
||||
power_on_step = <0 0 0 20
|
||||
2 0 0 0
|
||||
0xff 0 0 0>;
|
||||
power_off_step = <2 0 0 100
|
||||
0 0 0 100
|
||||
0xff 0 0 0>;
|
||||
backlight_index = <0xff>;
|
||||
};
|
||||
|
||||
lcd_2{
|
||||
model_name = "P070ACB";
|
||||
/*interface(ttl,lvds,mipi)*/
|
||||
interface = "mipi";
|
||||
basic_setting = <600 1024 /*h_active, v_active*/
|
||||
680 1194 /*h_period, v_period*/
|
||||
8 /*lcd_bits*/
|
||||
3 5>; /*screen_widht, screen_height*/
|
||||
lcd_timing = <24 36 0 /*hs_width,hs_bp,hs_pol*/
|
||||
10 80 0>; /*vs_width,vs_bp,vs_pol*/
|
||||
clk_attr = <0 /*fr_adj_type(0=clock,1=htotal,2=vtotal)*/
|
||||
0 /*clk_ss_level*/
|
||||
1 /*clk_auto_generate*/
|
||||
48715200>; /*pixel_clk(unit in Hz)*/
|
||||
mipi_attr = <4 /*lane_num*/
|
||||
400 /*bit_rate_max(MHz)*/
|
||||
0 /*factor(*100, default 0 for auto)*/
|
||||
1 /*operation_mode_init(0=video, 1=command)*/
|
||||
0 /*operation_mode_display(0=video, 1=command)*/
|
||||
2 /*
|
||||
*video_mode_type
|
||||
*(0=sync_pulse,1=sync_event,2=burst)
|
||||
*/
|
||||
0 /*clk_always_hs(0=disable,1=enable)*/
|
||||
0>; /*phy_switch(0=auto,1=standard,2=slow)*/
|
||||
/* dsi_init: data_type, num, data... */
|
||||
dsi_init_on = <0xff 0>; /* ending flag */
|
||||
dsi_init_off = <0xff 0>; /* ending flag */
|
||||
/* extern_init: 0xff for invalid */
|
||||
extern_init = <3>;
|
||||
/* power step: type,index,value,delay(ms) */
|
||||
power_on_step = <2 0 0 0
|
||||
0xff 0 0 0>;
|
||||
power_off_step = <2 0 0 50
|
||||
0xff 0 0 0>;
|
||||
backlight_index = <0xff>;
|
||||
};
|
||||
|
||||
lcd_3{
|
||||
model_name = "ST7701";
|
||||
/*interface(ttl,lvds,mipi)*/
|
||||
interface = "mipi";
|
||||
basic_setting = <480 854 /*h_active, v_active*/
|
||||
570 929 /*h_period, v_period*/
|
||||
8 /*lcd_bits*/
|
||||
8 15>; /*screen_widht, screen_height*/
|
||||
lcd_timing = <30 30 0 /*hs_width,hs_bp,hs_pol*/
|
||||
5 40 0>; /*vs_width,vs_bp,vs_pol*/
|
||||
clk_attr = <0 /*fr_adj_type(0=clock,1=htotal,2=vtotal)*/
|
||||
0 /*clk_ss_level*/
|
||||
1 /*clk_auto_generate*/
|
||||
31771800>; /*pixel_clk(unit in Hz)*/
|
||||
mipi_attr = <2 /*lane_num*/
|
||||
400 /*bit_rate_max(MHz)*/
|
||||
0 /*factor(*100, default 0 for auto)*/
|
||||
1 /*operation_mode_init(0=video, 1=command)*/
|
||||
0 /*operation_mode_display(0=video, 1=command)*/
|
||||
2 /*
|
||||
*video_mode_type
|
||||
*(0=sync_pulse,1=sync_event,2=burst)
|
||||
*/
|
||||
1 /*clk_always_hs(0=disable,1=enable)*/
|
||||
0>; /*phy_switch(0=auto,1=standard,2=slow)*/
|
||||
/* dsi_init: data_type, num, data... */
|
||||
dsi_init_on = <0xff 0>; /* ending flag */
|
||||
dsi_init_off = <0xff 0>; /* ending flag */
|
||||
/* extern_init: 0xff for invalid */
|
||||
extern_init = <2>;
|
||||
/* power step: type,index,value,delay(ms) */
|
||||
power_on_step = <2 0 0 0
|
||||
0xff 0 0 0>;
|
||||
power_off_step = <2 0 0 50
|
||||
0xff 0 0 0>;
|
||||
backlight_index = <0xff>;
|
||||
};
|
||||
};
|
||||
|
||||
lcd_extern{
|
||||
compatible = "amlogic, lcd_extern";
|
||||
status = "okay";
|
||||
i2c_bus = "i2c_bus_1";
|
||||
key_valid = <0>;
|
||||
|
||||
extern_0{
|
||||
index = <0>;
|
||||
extern_name = "mipi_default";/*default*/
|
||||
status = "okay";
|
||||
type = <2>; /* 0=i2c, 1=spi, 2=mipi */
|
||||
cmd_size = <0xff>;
|
||||
init_on = <
|
||||
0xfd 1 10
|
||||
0x05 1 0x11
|
||||
0xfd 1 120 /* delay 120ms */
|
||||
0x05 1 0x29
|
||||
0xff 0>; /*ending*/
|
||||
init_off = <
|
||||
0x05 1 0x28 /* display off */
|
||||
0xfd 1 10 /* delay 10ms */
|
||||
0x05 1 0x10 /* sleep in */
|
||||
0xfd 1 150 /* delay 150ms */
|
||||
0xff 0>; /*ending*/
|
||||
};
|
||||
|
||||
extern_1{
|
||||
index = <1>;
|
||||
extern_name = "mipi_default";/*TV070WSM*/
|
||||
status = "okay";
|
||||
type = <2>; /* 0=i2c, 1=spi, 2=mipi */
|
||||
cmd_size = <0xff>;
|
||||
init_on = <
|
||||
0xfd 1 10
|
||||
0x15 2 0x62 0x01
|
||||
0x39 5 0xff 0xaa 0x55 0x25 0x01
|
||||
0x15 2 0xfc 0x08
|
||||
0xfd 1 1 /* delay */
|
||||
0x15 2 0xfc 0x00
|
||||
0x39 5 0xff 0xaa 0x55 0x25 0x00
|
||||
0xfd 1 20 /* delay */
|
||||
0x39 6 0xf0 0x55 0xaa 0x52 0x08 0x00
|
||||
0x39 3 0xb1 0x68 0x41
|
||||
0x15 2 0xb5 0x88
|
||||
0x15 2 0xb6 0x0f
|
||||
0x39 5 0xb8 0x01 0x01 0x12 0x01
|
||||
0x39 3 0xbb 0x11 0x11
|
||||
0x39 3 0xbc 0x05 0x05
|
||||
0x15 2 0xc7 0x03
|
||||
0x39 6 0xbd 0x03 0x02 0x19 0x17 0x00
|
||||
0x15 2 0xc8 0x80
|
||||
0x39 6 0xf0 0x55 0xaa 0x52 0x08 0x01
|
||||
0x39 3 0xB2 0x01 0x01
|
||||
0x39 3 0xB3 0x28 0x28
|
||||
0x39 3 0xB4 0x14 0x14
|
||||
0x39 3 0xB8 0x05 0x05
|
||||
0x39 3 0xB9 0x45 0x45
|
||||
0x39 3 0xBA 0x25 0x25
|
||||
0x39 3 0xBC 0x88 0x00
|
||||
0x39 3 0xBD 0x88 0x00
|
||||
0x39 6 0xF0 0x55 0xAA 0x52 0x08 0x02
|
||||
0x15 2 0xEE 0x00
|
||||
0x39 17 0xB0 0x00 0x4B 0x00 0x5C 0x00
|
||||
0x79 0x00 0x94 0x00 0xA6 0x00 0xD8
|
||||
0x00 0xF2 0x01 0x19
|
||||
0x39 17 0xB1 0x01 0x39 0x01 0x77 0x01
|
||||
0xA2 0x01 0xF2 0x02 0x32 0x02 0x34
|
||||
0x02 0x6D 0x02 0xA2
|
||||
0x39 17 0xB2 0x02 0xC7 0x02 0xF2 0x03
|
||||
0x18 0x03 0x43 0x03 0x65 0x03 0x86
|
||||
0x03 0x8F 0x03 0x94
|
||||
0x39 5 0xB3 0x03 0x96 0x03 0x98
|
||||
0x39 17 0xB4 0x00 0x84 0x00 0x91 0x00
|
||||
0xA4 0x00 0xB6 0x00 0xCA 0x00 0xE9
|
||||
0x01 0x02 0x01 0x2A
|
||||
0x39 17 0xB5 0x01 0x49 0x01 0x82 0x01
|
||||
0xAF 0x01 0xF7 0x02 0x36 0x02 0x38
|
||||
0x02 0x70 0x02 0xA6
|
||||
0x39 17 0xB6 0x02 0xC8 0x02 0xF5 0x03
|
||||
0x1A 0x03 0x43 0x03 0x62 0x03 0x82
|
||||
0x03 0x8F 0x03 0x94
|
||||
0x39 5 0xB7 0x03 0x96 0x03 0x98
|
||||
0x39 17 0xB8 0x01 0x22 0x01 0x27 0x01
|
||||
0x2E 0x01 0x38 0x01 0x40 0x01 0x53
|
||||
0x01 0x60 0x01 0x7B
|
||||
0x39 17 0xB9 0x01 0x8C 0x01 0xB5 0x01
|
||||
0xD3 0x02 0x11 0x02 0x49 0x02 0x4A
|
||||
0x02 0x7F 0x02 0xB1
|
||||
0x39 17 0xBA 0x02 0xD1 0x03 0x00 0x03
|
||||
0x22 0x03 0x49 0x03 0x60 0x03 0x7A
|
||||
0x03 0x8B 0x03 0x8F
|
||||
0x39 5 0xBB 0x03 0x93 0x03 0x9A
|
||||
0x39 17 0xBC 0x00 0x37 0x00 0x48 0x00
|
||||
0x65 0x00 0x80 0x00 0x92 0x00 0xC4
|
||||
0x00 0xDE 0x01 0x05
|
||||
0x39 17 0xBD 0x01 0x31 0x01 0x6F 0x01
|
||||
0x9E 0x01 0xEE 0x02 0x32 0x02 0x34
|
||||
0x02 0x71 0x02 0xA7
|
||||
0x39 17 0xBE 0x02 0xD3 0x02 0xFE 0x03
|
||||
0x24 0x03 0x4F 0x03 0x71 0x03 0x92
|
||||
0x03 0x9B 0x03 0xA0
|
||||
0x39 5 0xBF 0x03 0xA6 0x03 0xA8
|
||||
0x39 17 0xC0 0x00 0x70 0x00 0x7D 0x00
|
||||
0x90 0x00 0xA4 0x00 0xB6 0x00 0xD5
|
||||
0x00 0xEE 0x01 0x16
|
||||
0x39 17 0xC1 0x01 0x41 0x01 0x7A 0x01
|
||||
0xAB 0x01 0xF3 0x02 0x36 0x02 0x38
|
||||
0x02 0x74 0x02 0xAA
|
||||
0x39 17 0xC2 0x02 0xD4 0x03 0x01 0x03
|
||||
0x26 0x03 0x4F 0x03 0x6E 0x03 0x8E
|
||||
0x03 0x9B 0x03 0xA0
|
||||
0x39 5 0xC3 0x03 0xA6 0x03 0xA8
|
||||
0x39 17 0xC4 0x01 0x0E 0x01 0x13 0x01
|
||||
0x1A 0x01 0x24 0x01 0x2C 0x01 0x3F
|
||||
0x01 0x4C 0x01 0x67
|
||||
0x39 17 0xC5 0x01 0x84 0x01 0xAD 0x01
|
||||
0xCF 0x02 0x0D 0x02 0x49 0x02 0x4A
|
||||
0x02 0x83 0x02 0xB5
|
||||
0x39 17 0xC6 0x02 0xDD 0x03 0x0C 0x03
|
||||
0x2E 0x03 0x55 0x03 0x6B 0x03 0x86
|
||||
0x03 0x97 0x03 0x9B
|
||||
0x39 5 0xC7 0x03 0xA1 0x03 0xA8
|
||||
0x39 6 0xF0 0x55 0xAA 0x52 0x08 0x04
|
||||
0x39 6 0xB1 0x03 0x02 0x02 0x02 0x00
|
||||
0x39 6 0xF0 0x55 0xAA 0x52 0x08 0x06
|
||||
0x39 3 0xB0 0x11 0x11
|
||||
0x39 3 0xB1 0x13 0x13
|
||||
0x39 3 0xB2 0x03 0x03
|
||||
0x39 3 0xB3 0x34 0x34
|
||||
0x39 3 0xB4 0x34 0x34
|
||||
0x39 3 0xB5 0x34 0x34
|
||||
0x39 3 0xB6 0x34 0x34
|
||||
0x39 3 0xB7 0x34 0x34
|
||||
0x39 3 0xB8 0x34 0x34
|
||||
0x39 3 0xB9 0x34 0x34
|
||||
0x39 3 0xBA 0x34 0x34
|
||||
0x39 3 0xBB 0x34 0x34
|
||||
0x39 3 0xBC 0x34 0x34
|
||||
0x39 3 0xBD 0x34 0x34
|
||||
0x39 3 0xBE 0x34 0x34
|
||||
0x39 3 0xBF 0x34 0x34
|
||||
0x39 3 0xC0 0x34 0x34
|
||||
0x39 3 0xC1 0x02 0x02
|
||||
0x39 3 0xC2 0x12 0x12
|
||||
0x39 3 0xC3 0x10 0x10
|
||||
0x39 3 0xE5 0x34 0x34
|
||||
0x39 6 0xD8 0x00 0x00 0x00 0x00 0x00
|
||||
0x39 6 0xD9 0x00 0x00 0x00 0x00 0x00
|
||||
0x39 6 0xF0 0x55 0xAA 0x52 0x08 0x05
|
||||
0x15 2 0xC0 0x03
|
||||
0x15 2 0xC1 0x02
|
||||
0x39 3 0xC8 0x01 0x20
|
||||
0x15 2 0xE5 0x03
|
||||
0x15 2 0xE6 0x03
|
||||
0x15 2 0xE7 0x03
|
||||
0x15 2 0xE8 0x03
|
||||
0x15 2 0xE9 0x03
|
||||
0x39 5 0xD1 0x03 0x00 0x3D 0x00
|
||||
0x39 6 0xF0 0x55 0xAA 0x52 0x08 0x03
|
||||
0x39 3 0xB0 0x11 0x00
|
||||
0x39 3 0xB1 0x11 0x00
|
||||
0x39 6 0xB2 0x03 0x00 0x00 0x00 0x00
|
||||
0x39 6 0xB3 0x03 0x00 0x00 0x00 0x00
|
||||
0x39 6 0xBA 0x31 0x00 0x00 0x00 0x00
|
||||
0x15 2 0x35 0x00
|
||||
0x15 2 0x51 0xFF
|
||||
0x15 2 0x53 0x2C
|
||||
0x15 2 0x55 0x03
|
||||
0x05 1 0x11
|
||||
0xfd 1 120 /* delay 120ms */
|
||||
0x05 1 0x29
|
||||
0xfd 1 130 /* delay 130ms */
|
||||
0xFF 0>; /*ending*/
|
||||
init_off = <
|
||||
0x05 1 0x28 /* display off */
|
||||
0xfd 1 10 /* delay 10ms */
|
||||
0x05 1 0x10 /* sleep in */
|
||||
0xfd 1 150 /* delay 150ms */
|
||||
0xff 0>; /*ending*/
|
||||
};
|
||||
|
||||
extern_2{
|
||||
index = <2>;
|
||||
extern_name = "mipi_default";/*ST7701*/
|
||||
status = "okay";
|
||||
type = <2>; /* 0=i2c, 1=spi, 2=mipi */
|
||||
init_on = <
|
||||
0x13 1 0x11
|
||||
0xfd 1 200
|
||||
0x29 6 0xff 0x77 0x01 0x00 0x00 0x10
|
||||
0x29 3 0xc0 0xe9 0x03
|
||||
0x29 3 0xc1 0x11 0x02
|
||||
0x29 3 0xc2 0x31 0x08
|
||||
0x29 17 0xb0 0x00 0x06 0x11 0x12 0x18
|
||||
0x0a 0x0a 0x09 0x09 0x1d 0x09 0x14
|
||||
0x10 0x0e 0x11 0x19
|
||||
0x29 17 0xb1 0x00 0x06 0x11 0x11 0x15
|
||||
0x09 0x0b 0x09 0x09 0x23 0x09 0x17
|
||||
0x14 0x18 0x1e 0x19
|
||||
0x29 6 0xff 0x77 0x01 0x00 0x00 0x11
|
||||
0x23 2 0xb0 0x4d
|
||||
|
||||
0x23 2 0xb1 0x3a
|
||||
0x23 2 0xb2 0x07
|
||||
0x23 2 0xb3 0x80
|
||||
0x23 2 0xb5 0x47
|
||||
0x23 2 0xb7 0x8a
|
||||
0x23 2 0xb8 0x21
|
||||
0x23 2 0xc1 0x78
|
||||
0x23 2 0xc2 0x78
|
||||
0x23 2 0xd0 0x88
|
||||
|
||||
0xfd 1 100
|
||||
0x29 4 0xe0 0x00 0x00 0x02
|
||||
0x29 12 0xe1 0x08 0x00 0x0a 0x00 0x07
|
||||
0x00 0x09 0x00 0x00 0x33 0x33
|
||||
0x29 14 0xe2 0x00 0x00 0x00 0x00 0x00
|
||||
0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
|
||||
0x29 5 0xe3 0x00 0x00 0x33 0x33
|
||||
0x29 3 0xe4 0x44 0x44
|
||||
0x29 17 0xe5 0x0e 0x60 0xaf 0xaf 0x10
|
||||
0x60 0xaf 0xaf 0x0a 0x60 0xaf 0xaf
|
||||
0x0c 0x60 0xaf 0xaf
|
||||
0x29 5 0xe6 0x00 0x00 0x33 0x33
|
||||
0x29 3 0xe7 0x44 0x44
|
||||
0x29 17 0xe8 0x0d 0x60 0xa0 0xa0 0x0f
|
||||
0x60 0xaf 0xaf 0x09 0x60 0xaf 0xaf
|
||||
0x0b 0x60 0xaf 0xaf
|
||||
0x29 8 0xeb 0x02 0x01 0xe4 0xe4 0x44 0x00 0x40
|
||||
0x29 3 0xec 0x02 0x01
|
||||
0x29 17 0xed 0xab 0x89 0x76 0x54 0x01
|
||||
0xff 0xff 0xff 0xff 0xff 0xff 0x10
|
||||
0x45 0x67 0x98 0xba
|
||||
|
||||
0xfd 1 10
|
||||
0x29 6 0xff 0x77 0x01 0x00 0x00 0x00
|
||||
0x13 1 0x29
|
||||
0xfd 1 200
|
||||
0xff 0>; /*ending*/
|
||||
init_off = <
|
||||
0x05 1 0x28 /* display off */
|
||||
0xfd 1 10 /* delay 10ms */
|
||||
0x05 1 0x10 /* sleep in */
|
||||
0xfd 1 150 /* delay 150ms */
|
||||
0xff 0>; /*ending*/
|
||||
};
|
||||
|
||||
extern_3{
|
||||
index = <3>;
|
||||
extern_name = "mipi_default";/*P070ACB*/
|
||||
status = "okay";
|
||||
type = <2>; /* 0=i2c, 1=spi, 2=mipi */
|
||||
cmd_size = <0xff>;
|
||||
init_on = <
|
||||
0x29 5 0xFF 0xAA 0x55 0x25 0x01
|
||||
0x23 2 0xFC 0x08
|
||||
0xfd 1 1 /* delay(ms) */
|
||||
0x23 2 0xFC 0x00
|
||||
0xfd 1 1 /* delay(ms) */
|
||||
0x23 2 0x6F 0x21
|
||||
0x23 2 0xF7 0x01
|
||||
0xfd 1 1 /* delay(ms) */
|
||||
0x23 2 0x6F 0x21
|
||||
0x23 2 0xF7 0x00
|
||||
0xfd 1 1 /* delay(ms) */
|
||||
|
||||
0x23 2 0x6F 0x1A
|
||||
0x23 2 0xF7 0x05
|
||||
0xfd 1 1 /* delay(ms) */
|
||||
|
||||
0x29 5 0xFF 0xAA 0x55 0x25 0x00
|
||||
|
||||
0x29 6 0xF0 0x55 0xAA 0x52 0x08 0x00
|
||||
0x29 3 0xB1 0x68 0x41
|
||||
0x23 2 0xB5 0x88
|
||||
0x29 6 0xBD 0x02 0xB0 0x0C 0x14 0x00
|
||||
0x23 2 0xC8 0x80
|
||||
|
||||
0x29 6 0xF0 0x55 0xAA 0x52 0x08 0x01
|
||||
0x29 3 0xB3 0x2D 0x2D
|
||||
0x29 3 0xB4 0x19 0x19
|
||||
0x23 2 0xB5 0x06
|
||||
|
||||
0x29 3 0xB9 0x36 0x36
|
||||
0x29 3 0xBA 0x26 0x26
|
||||
0x29 3 0xBC 0xA8 0x01
|
||||
0x29 3 0xBD 0xAB 0x01
|
||||
0x23 2 0xC0 0x0C
|
||||
|
||||
0x29 6 0xF0 0x55 0xAA 0x52 0x08 0x02
|
||||
0x23 2 0xEE 0x02
|
||||
0x29 7 0xB0 0x00 0x50 0x00 0x52 0x00 0x73
|
||||
0x23 2 0x6F 0x06
|
||||
0x29 7 0xB0 0x00 0x8F 0x00 0xA5 0x00 0xCA
|
||||
0x23 2 0x6F 0x0C
|
||||
0x29 5 0xB0 0x00 0xEA 0x01 0x1B
|
||||
0x29 7 0xB1 0x01 0x42 0x01 0x82 0x01 0xB3
|
||||
0x23 2 0x6F 0x06
|
||||
0x29 7 0xB1 0x02 0x00 0x02 0x41 0x02 0x42
|
||||
0x23 2 0x6F 0x0C
|
||||
0x29 5 0xB1 0x02 0x78 0x02 0xB5
|
||||
0x29 7 0xB2 0x02 0xDA 0x03 0x12 0x03 0x3A
|
||||
0x23 2 0x6F 0x06
|
||||
0x29 7 0xB2 0x03 0x6E 0x03 0x8D 0x03 0xB1
|
||||
0x23 2 0x6F 0x0C
|
||||
0x29 5 0xB2 0x03 0xCA 0x03 0xE8
|
||||
0x29 5 0xB3 0x03 0xF4 0x03 0xFF
|
||||
|
||||
0x29 7 0xBC 0x00 0x05 0x00 0x52 0x00 0x73
|
||||
0x23 2 0x6F 0x06
|
||||
0x29 7 0xBC 0x00 0x8F 0x00 0xA5 0x00 0xCA
|
||||
0x23 2 0x6F 0x0C
|
||||
0x29 5 0xBC 0x00 0xEA 0x01 0x1B
|
||||
0x29 7 0xBD 0x01 0x42 0x01 0x82 0x01 0xB3
|
||||
0x23 2 0x6F 0x06
|
||||
0x29 7 0xBD 0x02 0x00 0x02 0x41 0x02 0x42
|
||||
0x23 2 0x6F 0x0C
|
||||
0x29 5 0xBD 0x02 0x78 0x02 0xB5
|
||||
0x29 7 0xBE 0x02 0xDA 0x03 0x12 0x03 0x3A
|
||||
0x23 2 0x6F 0x06
|
||||
0x29 7 0xBE 0x03 0x6E 0x03 0x8D 0x03 0xB1
|
||||
0x23 2 0x6F 0x0C
|
||||
0x29 5 0xBE 0x03 0xCA 0x03 0xE8
|
||||
0x29 5 0xBF 0x03 0xF4 0x03 0xFF
|
||||
|
||||
0x29 6 0xF0 0x55 0xAA 0x52 0x08 0x03
|
||||
0x29 6 0xB2 0x05 0x00 0x00 0x00 0x00
|
||||
0x29 6 0xB6 0x05 0x00 0x00 0x00 0x00
|
||||
0x29 6 0xB7 0x05 0x00 0x00 0x00 0x00
|
||||
0x29 6 0xBA 0x57 0x00 0x00 0x00 0x00
|
||||
0x29 6 0xBB 0x57 0x00 0x00 0x00 0x00
|
||||
0x29 5 0xC0 0x00 0x34 0x00 0x00
|
||||
0x29 5 0xC1 0x00 0x00 0x34 0x00
|
||||
0x23 2 0xC4 0x40
|
||||
|
||||
0x29 6 0xF0 0x55 0xAA 0x52 0x08 0x05
|
||||
0x29 3 0xB0 0x17 0x06
|
||||
0x29 3 0xB1 0x17 0x06
|
||||
0x29 3 0xB2 0x17 0x06
|
||||
0x29 3 0xB3 0x17 0x06
|
||||
0x29 3 0xB4 0x17 0x06
|
||||
|
||||
0x29 6 0xBD 0x03 0x01 0x03 0x03 0x01
|
||||
0x23 2 0xC0 0x05
|
||||
0x23 2 0xC4 0x82
|
||||
0x23 2 0xC5 0xA2
|
||||
0x29 3 0xC8 0x03 0x30
|
||||
0x29 3 0xC9 0x03 0x31
|
||||
0x29 4 0xCC 0x00 0x00 0x3C
|
||||
0x29 4 0xCD 0x00 0x00 0x3C
|
||||
0x29 6 0xD1 0x00 0x44 0x09 0x00 0x00
|
||||
0x29 6 0xD2 0x00 0x04 0x0B 0x00 0x00
|
||||
|
||||
0x29 6 0xF0 0x55 0xAA 0x52 0x08 0x06
|
||||
0x29 3 0xB0 0x0B 0x2D
|
||||
0x29 3 0xB1 0x2D 0x09
|
||||
0x29 3 0xB2 0x2A 0x29
|
||||
0x29 3 0xB3 0x34 0x1B
|
||||
0x29 3 0xB4 0x19 0x17
|
||||
0x29 3 0xB5 0x15 0x13
|
||||
0x29 3 0xB6 0x11 0x01
|
||||
0x29 3 0xB7 0x34 0x34
|
||||
0x29 3 0xB8 0x34 0x2D
|
||||
0x29 3 0xB9 0x2D 0x34
|
||||
0x29 3 0xBA 0x2D 0x2D
|
||||
0x29 3 0xBB 0x34 0x34
|
||||
0x29 3 0xBC 0x34 0x34
|
||||
0x29 3 0xBD 0x00 0x10
|
||||
0x29 3 0xBE 0x12 0x14
|
||||
0x29 3 0xBF 0x16 0x18
|
||||
|
||||
0x29 3 0xC0 0x1A 0x34
|
||||
0x29 3 0xC1 0x29 0x2A
|
||||
0x29 3 0xC2 0x08 0x2D
|
||||
0x29 3 0xC3 0x2D 0x0A
|
||||
0x29 3 0xC4 0x0A 0x2D
|
||||
0x29 3 0xC5 0x2D 0x00
|
||||
0x29 3 0xC6 0x2A 0x29
|
||||
0x29 3 0xC7 0x34 0x14
|
||||
0x29 3 0xC8 0x16 0x18
|
||||
0x29 3 0xC9 0x1A 0x10
|
||||
0x29 3 0xCA 0x12 0x08
|
||||
0x29 3 0xCB 0x34 0x34
|
||||
0x29 3 0xCC 0x34 0x2D
|
||||
0x29 3 0xCD 0x2D 0x34
|
||||
0x29 3 0xCE 0x2D 0x2D
|
||||
0x29 3 0xCF 0x34 0x34
|
||||
|
||||
0x29 3 0xD0 0x34 0x34
|
||||
0x29 3 0xD1 0x09 0x13
|
||||
0x29 3 0xD2 0x11 0x1B
|
||||
0x29 3 0xD3 0x19 0x17
|
||||
0x29 3 0xD4 0x15 0x34
|
||||
0x29 3 0xD5 0x29 0x2A
|
||||
0x29 3 0xD6 0x01 0x2D
|
||||
0x29 3 0xD7 0x2D 0x0B
|
||||
0x29 6 0xD8 0x00 0x00 0x00 0x00 0x00
|
||||
0x29 6 0xD9 0x00 0x00 0x00 0x00 0x00
|
||||
|
||||
0x29 3 0xE5 0x34 0x34
|
||||
0x29 3 0xE6 0x34 0x34
|
||||
0x23 2 0xE7 0x00
|
||||
0x29 3 0xE8 0x34 0x34
|
||||
0x29 3 0xE9 0x34 0x34
|
||||
0x23 2 0xEA 0x00
|
||||
|
||||
0x29 6 0xF0 0x55 0xAA 0x52 0x00 0x00
|
||||
|
||||
0x13 1 0x35
|
||||
0x13 1 0x11
|
||||
0xfd 1 120 /* delay(ms) */
|
||||
0x13 1 0x29
|
||||
0xfd 1 20 /* delay(ms) */
|
||||
0xFF 0>; /*ending*/
|
||||
init_off = <
|
||||
0x05 1 0x28 /* display off */
|
||||
0xfd 1 10 /* delay 10ms */
|
||||
0x05 1 0x10 /* sleep in */
|
||||
0xfd 1 150 /* delay 150ms */
|
||||
0xff 0>; /*ending*/
|
||||
};
|
||||
};
|
||||
};/* end of panel */
|
||||
|
||||
@@ -443,20 +443,18 @@
|
||||
ram-dump {
|
||||
compatible = "amlogic, ram_dump";
|
||||
status = "okay";
|
||||
reg = <0xFF6345E0 4>;
|
||||
reg-names = "PREG_STICKY_REG8";
|
||||
store_device = "data";
|
||||
};
|
||||
|
||||
jtag {
|
||||
compatible = "amlogic, jtag";
|
||||
status = "okay";
|
||||
select = "apao"; /* disable/apao/apee */
|
||||
jtagao-gpios = <&gpio_ao GPIOAO_6 0
|
||||
&gpio_ao GPIOAO_7 0
|
||||
&gpio_ao GPIOAO_8 0
|
||||
&gpio_ao GPIOAO_9 0>;
|
||||
jtagee-gpios = <&gpio GPIOC_0 0
|
||||
&gpio GPIOC_1 0
|
||||
&gpio GPIOC_4 0
|
||||
&gpio GPIOC_5 0>;
|
||||
select = "disable"; /* disable/apao/apee */
|
||||
pinctrl-names="jtag_apao_pins", "jtag_apee_pins";
|
||||
pinctrl-0=<&jtag_apao_pins>;
|
||||
pinctrl-1=<&jtag_apee_pins>;
|
||||
};
|
||||
|
||||
saradc:saradc {
|
||||
@@ -505,6 +503,11 @@
|
||||
#thermal-sensor-cells = <1>;
|
||||
};
|
||||
|
||||
bl40: bl40 {
|
||||
compatible = "amlogic, bl40-bootup";
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
soc {
|
||||
compatible = "simple-bus";
|
||||
#address-cells = <1>;
|
||||
@@ -671,6 +674,7 @@
|
||||
aoclkc: clock-controller@0 {
|
||||
compatible = "amlogic,g12a-aoclkc";
|
||||
#clock-cells = <1>;
|
||||
#reset-cells = <1>;
|
||||
reg = <0x0 0x320>;
|
||||
};
|
||||
|
||||
@@ -750,6 +754,17 @@
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&ao_b_uart_pins>;
|
||||
};
|
||||
|
||||
irblaster: meson-irblaster@14c {
|
||||
compatible = "amlogic, meson_irblaster";
|
||||
reg = <0x14c 0x10>,
|
||||
<0x40 0x4>;
|
||||
#irblaster-cells = <2>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&irblaster_pins>;
|
||||
interrupts = <GIC_SPI 198 IRQ_TYPE_EDGE_RISING>;
|
||||
status = "disabled";
|
||||
};
|
||||
};/* end of aobus */
|
||||
|
||||
periphs: periphs@ff634400 {
|
||||
@@ -1335,15 +1350,6 @@
|
||||
clocks = <&clkc CLKID_VPU_CLKC_MUX>;
|
||||
clock-names = "vpu_clkc";
|
||||
};
|
||||
irblaster: meson-irblaster {
|
||||
compatible = "amlogic, meson_irblaster";
|
||||
reg = <0xff80014c 0x10>,
|
||||
<0xff800040 0x4>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&irblaster_pins>;
|
||||
interrupts = <0 198 1>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
sd_emmc_c: emmc@ffe07000 {
|
||||
status = "disabled";
|
||||
@@ -1378,7 +1384,7 @@
|
||||
calc_f = <1>;
|
||||
max_req_size = <0x20000>; /**128KB*/
|
||||
gpio_dat3 = <&gpio BOOT_3 GPIO_ACTIVE_HIGH>;
|
||||
hw_reset = <&gpio BOOT_9 GPIO_ACTIVE_HIGH>;
|
||||
hw_reset = <&gpio BOOT_12 GPIO_ACTIVE_HIGH>;
|
||||
card_type = <1>;
|
||||
/* 1:mmc card(include eMMC),
|
||||
* 2:sd card(include tSD)
|
||||
@@ -1826,6 +1832,12 @@
|
||||
dev_name = "aml_sha_dma";
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
aml_tdes {
|
||||
compatible = "amlogic,tdes_dma";
|
||||
dev_name = "aml_tdes_dma";
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
|
||||
rng {
|
||||
@@ -1990,6 +2002,16 @@
|
||||
function = "cec_ao";
|
||||
};
|
||||
};
|
||||
|
||||
jtag_apao_pins:jtag_apao_pin {
|
||||
mux {
|
||||
groups = "jtag_a_tdi",
|
||||
"jtag_a_tdo",
|
||||
"jtag_a_clk",
|
||||
"jtag_a_tms";
|
||||
function = "jtag_a";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&pinctrl_periphs {
|
||||
@@ -2564,6 +2586,16 @@
|
||||
drive-strength = <3>;
|
||||
};
|
||||
};
|
||||
|
||||
jtag_apee_pins:jtag_apee_pin {
|
||||
mux {
|
||||
groups = "jtag_b_tdi",
|
||||
"jtag_b_tdo",
|
||||
"jtag_b_clk",
|
||||
"jtag_b_tms";
|
||||
function = "jtag_b";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&pinctrl_aobus {
|
||||
|
||||
@@ -14,11 +14,12 @@
|
||||
* more details.
|
||||
*
|
||||
*/
|
||||
#include <dt-bindings/display/meson-drm-ids.h>
|
||||
|
||||
/ {
|
||||
venc-cvbs {
|
||||
status = "okay";
|
||||
compatible = "amlogic,meson-gxbb-cvbs";
|
||||
compatible = "amlogic, meson-g12a-cvbs";
|
||||
|
||||
ports {
|
||||
#address-cells = <1>;
|
||||
@@ -104,6 +105,159 @@
|
||||
status = "okay";
|
||||
compatible = "amlogic,drm-subsystem";
|
||||
ports = <&vpu_out>;
|
||||
|
||||
vpu_topology: vpu_topology {
|
||||
vpu_blocks {
|
||||
osd1_block: block@0 {
|
||||
id = /bits/ 8 <OSD1_BLOCK>;
|
||||
index = /bits/ 8 <0>;
|
||||
type = /bits/ 8 <0>;
|
||||
block_name = "osd1_block";
|
||||
num_in_links = /bits/ 8 <0x0>;
|
||||
num_out_links = /bits/ 8 <0x1>;
|
||||
out_links = <0 &afbc_osd1_block>;
|
||||
};
|
||||
osd2_block: block@1 {
|
||||
id = /bits/ 8 <OSD2_BLOCK>;
|
||||
index = /bits/ 8 <1>;
|
||||
type = /bits/ 8 <0>;
|
||||
block_name = "osd2_block";
|
||||
num_in_links = /bits/ 8 <0x0>;
|
||||
num_out_links = /bits/ 8 <0x1>;
|
||||
out_links = <0 &afbc_osd2_block>;
|
||||
};
|
||||
osd3_block: block@2 {
|
||||
id = /bits/ 8 <OSD3_BLOCK>;
|
||||
index = /bits/ 8 <2>;
|
||||
type = /bits/ 8 <0>;
|
||||
block_name = "osd3_block";
|
||||
num_in_links = /bits/ 8 <0x0>;
|
||||
num_out_links = /bits/ 8 <0x1>;
|
||||
out_links = <0 &afbc_osd3_block>;
|
||||
};
|
||||
afbc_osd1_block: block@3 {
|
||||
id = /bits/ 8 <AFBC_OSD1_BLOCK>;
|
||||
index = /bits/ 8 <0>;
|
||||
type = /bits/ 8 <1>;
|
||||
block_name = "afbc_osd1_block";
|
||||
num_in_links = /bits/ 8 <0x1>;
|
||||
in_links = <0 &osd1_block>;
|
||||
num_out_links = /bits/ 8 <0x1>;
|
||||
out_links = <0 &osd_blend_block>;
|
||||
};
|
||||
afbc_osd2_block: block@4 {
|
||||
id = /bits/ 8 <AFBC_OSD2_BLOCK>;
|
||||
index = /bits/ 8 <1>;
|
||||
type = /bits/ 8 <1>;
|
||||
block_name = "afbc_osd2_block";
|
||||
num_in_links = /bits/ 8 <0x1>;
|
||||
in_links = <0 &osd2_block>;
|
||||
num_out_links = /bits/ 8 <0x1>;
|
||||
out_links = <0 &scaler_osd2_block>;
|
||||
};
|
||||
afbc_osd3_block: block@5 {
|
||||
id = /bits/ 8 <AFBC_OSD3_BLOCK>;
|
||||
index = /bits/ 8 <2>;
|
||||
type = /bits/ 8 <1>;
|
||||
block_name = "afbc_osd3_block";
|
||||
num_in_links = /bits/ 8 <0x1>;
|
||||
in_links = <0 &osd3_block>;
|
||||
num_out_links = /bits/ 8 <0x1>;
|
||||
out_links = <0 &scaler_osd3_block>;
|
||||
};
|
||||
scaler_osd1_block: block@6 {
|
||||
id = /bits/ 8 <SCALER_OSD1_BLOCK>;
|
||||
index = /bits/ 8 <0>;
|
||||
type = /bits/ 8 <2>;
|
||||
block_name = "scaler_osd1_block";
|
||||
num_in_links = /bits/ 8 <0x1>;
|
||||
in_links = <0 &osd1_hdr_dolby_block>;
|
||||
num_out_links = /bits/ 8 <0x1>;
|
||||
out_links = <0 &vpp_postblend_block>;
|
||||
};
|
||||
scaler_osd2_block: block@7 {
|
||||
id = /bits/ 8 <SCALER_OSD2_BLOCK>;
|
||||
index = /bits/ 8 <1>;
|
||||
type = /bits/ 8 <2>;
|
||||
block_name = "scaler_osd2_block";
|
||||
num_in_links = /bits/ 8 <0x1>;
|
||||
in_links = <0 &afbc_osd2_block>;
|
||||
num_out_links = /bits/ 8 <0x1>;
|
||||
out_links = <2 &osd_blend_block>;
|
||||
};
|
||||
scaler_osd3_block: block@8 {
|
||||
id = /bits/ 8 <SCALER_OSD3_BLOCK>;
|
||||
index = /bits/ 8 <2>;
|
||||
type = /bits/ 8 <2>;
|
||||
block_name = "scaler_osd3_block";
|
||||
num_in_links = /bits/ 8 <0x1>;
|
||||
in_links = <0 &afbc_osd3_block>;
|
||||
num_out_links = /bits/ 8 <0x1>;
|
||||
out_links = <3 &osd_blend_block>;
|
||||
};
|
||||
osd_blend_block: block@9 {
|
||||
id = /bits/ 8 <OSD_BLEND_BLOCK>;
|
||||
block_name = "osd_blend_block";
|
||||
type = /bits/ 8 <3>;
|
||||
num_in_links = /bits/ 8 <0x3>;
|
||||
in_links = <0 &afbc_osd1_block>,
|
||||
<0 &scaler_osd2_block>,
|
||||
<0 &scaler_osd3_block>;
|
||||
num_out_links = /bits/ 8 <0x2>;
|
||||
out_links = <0 &osd1_hdr_dolby_block>,
|
||||
<1 &vpp_postblend_block>;
|
||||
};
|
||||
osd1_hdr_dolby_block: block@10 {
|
||||
id = /bits/ 8 <OSD1_HDR_BLOCK>;
|
||||
block_name = "osd1_hdr_dolby_block";
|
||||
type = /bits/ 8 <4>;
|
||||
num_in_links = /bits/ 8 <0x1>;
|
||||
in_links = <0 &osd_blend_block>;
|
||||
num_out_links = /bits/ 8 <0x1>;
|
||||
out_links = <0 &scaler_osd1_block>;
|
||||
};
|
||||
vpp_postblend_block: block@12 {
|
||||
id = /bits/ 8 <VPP_POSTBLEND_BLOCK>;
|
||||
block_name = "vpp_postblend_block";
|
||||
type = /bits/ 8 <6>;
|
||||
num_in_links = /bits/ 8 <0x2>;
|
||||
in_links = <0 &scaler_osd1_block>,
|
||||
<1 &osd_blend_block>;
|
||||
num_out_links = <0x0>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
vpu_hw_para: vpu_hw_para@0 {
|
||||
osd_ver = /bits/ 8 <0x2>;
|
||||
afbc_type = /bits/ 8 <0x2>;
|
||||
has_deband = /bits/ 8 <0x1>;
|
||||
has_lut = /bits/ 8 <0x1>;
|
||||
has_rdma = /bits/ 8 <0x1>;
|
||||
osd_fifo_len = /bits/ 8 <64>;
|
||||
vpp_fifo_len = /bits/ 32 <0xfff>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&gpu{
|
||||
/*gpu max freq is 850M*/
|
||||
def_clk = <1>;
|
||||
tbl = <&dvfs285_cfg &dvfs666_cfg &dvfs850_cfg &dvfs850_cfg>;
|
||||
|
||||
dvfs285_cfg:dvfs285_cfg {
|
||||
keep_count = <2>;
|
||||
threshold = <100 200>;
|
||||
};
|
||||
|
||||
dvfs666_cfg:dvfs666_cfg {
|
||||
keep_count = <1>;
|
||||
threshold = <85 200>;
|
||||
};
|
||||
|
||||
dvfs850_cfg:dvfs850_cfg {
|
||||
keep_count = <1>;
|
||||
threshold = <179 255>;
|
||||
};
|
||||
|
||||
};
|
||||
|
||||
@@ -503,6 +503,15 @@
|
||||
clocks = <&xtal>;
|
||||
};
|
||||
|
||||
jtag {
|
||||
compatible = "amlogic, jtag";
|
||||
status = "okay";
|
||||
select = "disable"; /* disable/apao/apee */
|
||||
pinctrl-names="jtag_apao_pins", "jtag_apee_pins";
|
||||
pinctrl-0=<&jtag_apao_pins>;
|
||||
pinctrl-1=<&jtag_apee_pins>;
|
||||
};
|
||||
|
||||
saradc:saradc {
|
||||
compatible = "amlogic,meson-g12a-saradc";
|
||||
status = "disabled";
|
||||
@@ -549,6 +558,14 @@
|
||||
#thermal-sensor-cells = <1>;
|
||||
};
|
||||
|
||||
ram-dump {
|
||||
compatible = "amlogic, ram_dump";
|
||||
status = "okay";
|
||||
reg = <0xFF6345E0 4>;
|
||||
reg-names = "PREG_STICKY_REG8";
|
||||
store_device = "data";
|
||||
};
|
||||
|
||||
soc {
|
||||
compatible = "simple-bus";
|
||||
#address-cells = <1>;
|
||||
@@ -716,6 +733,7 @@
|
||||
aoclkc: clock-controller@0 {
|
||||
compatible = "amlogic,g12b-aoclkc";
|
||||
#clock-cells = <1>;
|
||||
#reset-cells = <1>;
|
||||
reg = <0x0 0x320>;
|
||||
};
|
||||
|
||||
@@ -795,6 +813,15 @@
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&ao_b_uart_pins>;
|
||||
};
|
||||
|
||||
irblaster: meson-irblaster@14c {
|
||||
compatible = "amlogic, meson_irblaster";
|
||||
reg = <0x14c 0x10>,
|
||||
<0x40 0x4>;
|
||||
#irblaster-cells = <2>;
|
||||
interrupts = <GIC_SPI 198 IRQ_TYPE_EDGE_RISING>;
|
||||
status = "disabled";
|
||||
};
|
||||
};/* end of aobus */
|
||||
|
||||
periphs: periphs@ff634400 {
|
||||
@@ -857,6 +884,29 @@
|
||||
};
|
||||
};/* end of audiobus*/
|
||||
|
||||
aml_dma {
|
||||
compatible = "amlogic,aml_txlx_dma";
|
||||
reg = <0xff63e000 0x48>;
|
||||
interrupts = <0 180 1>;
|
||||
|
||||
aml_aes {
|
||||
compatible = "amlogic,aes_g12a_dma";
|
||||
dev_name = "aml_aes_dma";
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
aml_sha {
|
||||
compatible = "amlogic,sha_dma";
|
||||
dev_name = "aml_sha_dma";
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
aml_tdes {
|
||||
compatible = "amlogic,tdes_dma";
|
||||
dev_name = "aml_tdes_dma";
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
}; /* end of soc*/
|
||||
|
||||
remote:rc@0xff808040 {
|
||||
@@ -1157,6 +1207,7 @@
|
||||
>;
|
||||
reg-names = "NN_REG","NN_SRAM","NN_MEM0",
|
||||
"NN_MEM1","NN_RESET","NN_CLK";
|
||||
nn_power_version = <2>;
|
||||
nn_efuse = <0xff63003c 0x20>;
|
||||
};
|
||||
|
||||
@@ -1409,15 +1460,6 @@
|
||||
clocks = <&clkc CLKID_VPU_CLKC_MUX>;
|
||||
clock-names = "vpu_clkc";
|
||||
};
|
||||
irblaster: meson-irblaster {
|
||||
compatible = "amlogic, meson_irblaster";
|
||||
reg = <0xff80014c 0x10>,
|
||||
<0xff800040 0x4>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&irblaster_pins>;
|
||||
interrupts = <0 198 1>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
sd_emmc_c: emmc@ffe07000 {
|
||||
status = "disabled";
|
||||
@@ -1596,20 +1638,11 @@
|
||||
node_name = "cpufreq_cool1";
|
||||
device_type = "cpufreq";
|
||||
};
|
||||
cpucore_cool_cluster0 {
|
||||
cpucore_cool_cluster {
|
||||
min_state = <1>;
|
||||
dyn_coeff = <0>;
|
||||
cluster_id = <0>;
|
||||
gpu_pp = <2>;
|
||||
node_name = "cpucore_cool0";
|
||||
device_type = "cpucore";
|
||||
};
|
||||
cpucore_cool_cluster1 {
|
||||
min_state = <0>;
|
||||
dyn_coeff = <0>;
|
||||
cluster_id = <1>;
|
||||
gpu_pp = <2>;
|
||||
node_name = "cpucore_cool1";
|
||||
node_name = "cpucore_cool";
|
||||
device_type = "cpucore";
|
||||
};
|
||||
gpufreq_cool {
|
||||
@@ -1635,10 +1668,7 @@
|
||||
cpufreq_cool1:cpufreq_cool1 {
|
||||
#cooling-cells = <2>; /* min followed by max */
|
||||
};
|
||||
cpucore_cool0:cpucore_cool0 {
|
||||
#cooling-cells = <2>; /* min followed by max */
|
||||
};
|
||||
cpucore_cool1:cpucore_cool1 {
|
||||
cpucore_cool:cpucore_cool {
|
||||
#cooling-cells = <2>; /* min followed by max */
|
||||
};
|
||||
gpufreq_cool0:gpufreq_cool0 {
|
||||
@@ -1690,14 +1720,9 @@
|
||||
cooling-device = <&cpufreq_cool1 0 9>;
|
||||
contribution = <1024>;
|
||||
};
|
||||
cpucore_cooling_map0 {
|
||||
cpucore_cooling_map {
|
||||
trip = <&pcontrol>;
|
||||
cooling-device = <&cpucore_cool0 0 1>;
|
||||
contribution = <1024>;
|
||||
};
|
||||
cpucore_cooling_map1 {
|
||||
trip = <&pcontrol>;
|
||||
cooling-device = <&cpucore_cool1 0 4>;
|
||||
cooling-device = <&cpucore_cool 0 5>;
|
||||
contribution = <1024>;
|
||||
};
|
||||
gpufreq_cooling_map {
|
||||
@@ -2085,6 +2110,16 @@
|
||||
function = "pwm_a_gpioe";
|
||||
};
|
||||
};
|
||||
|
||||
jtag_apao_pins:jtag_apao_pin {
|
||||
mux {
|
||||
groups = "jtag_a_tdi",
|
||||
"jtag_a_tdo",
|
||||
"jtag_a_clk",
|
||||
"jtag_a_tms";
|
||||
function = "jtag_a";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&pinctrl_periphs {
|
||||
@@ -2489,10 +2524,14 @@
|
||||
mux {
|
||||
groups = "uart_tx_a",
|
||||
"uart_rx_a",
|
||||
"uart_cts_a",
|
||||
"uart_rts_a";
|
||||
function = "uart_a";
|
||||
};
|
||||
mux1 {
|
||||
groups = "uart_cts_a";
|
||||
function = "uart_a";
|
||||
bias-pull-down;
|
||||
};
|
||||
};
|
||||
|
||||
b_uart_pins:b_uart {
|
||||
@@ -2592,6 +2631,16 @@
|
||||
function = "remote_out";
|
||||
};
|
||||
};
|
||||
|
||||
jtag_apee_pins:jtag_apee_pin {
|
||||
mux {
|
||||
groups = "jtag_b_tdi",
|
||||
"jtag_b_tdo",
|
||||
"jtag_b_clk",
|
||||
"jtag_b_tms";
|
||||
function = "jtag_b";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&gpu{
|
||||
|
||||
@@ -1152,6 +1152,7 @@
|
||||
>;
|
||||
reg-names = "NN_REG","NN_SRAM","NN_MEM0",
|
||||
"NN_MEM1","NN_RESET","NN_CLK";
|
||||
nn_power_version = <2>;
|
||||
nn_efuse = <0xff63003c 0x20>;
|
||||
};
|
||||
|
||||
@@ -1591,20 +1592,11 @@
|
||||
node_name = "cpufreq_cool1";
|
||||
device_type = "cpufreq";
|
||||
};
|
||||
cpucore_cool_cluster0 {
|
||||
cpucore_cool_cluster {
|
||||
min_state = <1>;
|
||||
dyn_coeff = <0>;
|
||||
cluster_id = <0>;
|
||||
gpu_pp = <2>;
|
||||
node_name = "cpucore_cool0";
|
||||
device_type = "cpucore";
|
||||
};
|
||||
cpucore_cool_cluster1 {
|
||||
min_state = <0>;
|
||||
dyn_coeff = <0>;
|
||||
cluster_id = <1>;
|
||||
gpu_pp = <2>;
|
||||
node_name = "cpucore_cool1";
|
||||
node_name = "cpucore_cool";
|
||||
device_type = "cpucore";
|
||||
};
|
||||
gpufreq_cool {
|
||||
@@ -1630,10 +1622,7 @@
|
||||
cpufreq_cool1:cpufreq_cool1 {
|
||||
#cooling-cells = <2>; /* min followed by max */
|
||||
};
|
||||
cpucore_cool0:cpucore_cool0 {
|
||||
#cooling-cells = <2>; /* min followed by max */
|
||||
};
|
||||
cpucore_cool1:cpucore_cool1 {
|
||||
cpucore_cool:cpucore_cool {
|
||||
#cooling-cells = <2>; /* min followed by max */
|
||||
};
|
||||
gpufreq_cool0:gpufreq_cool0 {
|
||||
@@ -1685,14 +1674,9 @@
|
||||
cooling-device = <&cpufreq_cool1 0 9>;
|
||||
contribution = <1024>;
|
||||
};
|
||||
cpucore_cooling_map0 {
|
||||
cpucore_cooling_map {
|
||||
trip = <&pcontrol>;
|
||||
cooling-device = <&cpucore_cool0 0 1>;
|
||||
contribution = <1024>;
|
||||
};
|
||||
cpucore_cooling_map1 {
|
||||
trip = <&pcontrol>;
|
||||
cooling-device = <&cpucore_cool1 0 4>;
|
||||
cooling-device = <&cpucore_cool 0 5>;
|
||||
contribution = <1024>;
|
||||
};
|
||||
gpufreq_cooling_map {
|
||||
|
||||
241
arch/arm/boot/dts/amlogic/mesong12b_drm.dtsi
Normal file
241
arch/arm/boot/dts/amlogic/mesong12b_drm.dtsi
Normal file
@@ -0,0 +1,241 @@
|
||||
/*
|
||||
* arch/arm/boot/dts/amlogic/meson_drm.dtsi
|
||||
*
|
||||
* Copyright (C) 2015 Amlogic, Inc. All rights reserved.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful, but WITHOUT
|
||||
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
||||
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
||||
* more details.
|
||||
*
|
||||
*/
|
||||
#include <dt-bindings/display/meson-drm-ids.h>
|
||||
|
||||
/ {
|
||||
venc-cvbs {
|
||||
status = "okay";
|
||||
compatible = "amlogic, meson-g12b-cvbs";
|
||||
|
||||
ports {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
enc_cvbs_in: port@0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
reg = <0>;
|
||||
|
||||
//venc_cvbs_in_vpu: endpoint@0 {
|
||||
// reg = <0>;
|
||||
// remote-endpoint = <&vpu_out_venc_cvbs>;
|
||||
//};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
drm_amhdmitx: drm-amhdmitx {
|
||||
status = "disabled";
|
||||
hdcp = "disabled";
|
||||
compatible = "amlogic,drm-amhdmitx";
|
||||
dev_name = "meson-amhdmitx";
|
||||
interrupts = <GIC_SPI 3 IRQ_TYPE_EDGE_RISING>;
|
||||
ports {
|
||||
port {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
hdmi_in_vpu: endpoint@0 {
|
||||
reg = <0>;
|
||||
remote-endpoint = <&vpu_out_hdmi>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
drm_lcd: drm-lcd {
|
||||
status = "disabled";
|
||||
compatible = "amlogic,drm-lcd";
|
||||
dev_name = "meson-lcd";
|
||||
ports {
|
||||
port {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
lcd_in_vpu: endpoint@0 {
|
||||
reg = <0>;
|
||||
remote-endpoint = <&vpu_out_lcd>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
drm_vpu: drm-vpu@0xff900000 {
|
||||
status = "disabled";
|
||||
compatible = "amlogic,meson-g12b-vpu";
|
||||
memory-region = <&logo_reserved>;
|
||||
reg = <0xff900000 0x40000>,
|
||||
<0xff63c000 0x2000>,
|
||||
<0xff638000 0x2000>;
|
||||
reg-names = "base", "hhi", "dmc";
|
||||
interrupts = <GIC_SPI 3 IRQ_TYPE_EDGE_RISING>,
|
||||
<GIC_SPI 56 IRQ_TYPE_EDGE_RISING>;
|
||||
interrupt-names = "viu-vsync", "viu2-vsync";
|
||||
clocks = <&clkc CLKID_VPU_CLKC_MUX>;
|
||||
clock-names = "vpu_clkc";
|
||||
dma-coherent;
|
||||
vpu_out: port {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
vpu_out_hdmi: endpoint@0 {
|
||||
reg = <0>;
|
||||
remote-endpoint = <&hdmi_in_vpu>;
|
||||
};
|
||||
vpu_out_lcd: endpoint@1 {
|
||||
reg = <1>;
|
||||
remote-endpoint = <&lcd_in_vpu>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
drm_subsystem: drm-subsystem {
|
||||
status = "okay";
|
||||
compatible = "amlogic,drm-subsystem";
|
||||
ports = <&vpu_out>;
|
||||
|
||||
vpu_topology: vpu_topology {
|
||||
vpu_blocks {
|
||||
osd1_block: block@0 {
|
||||
id = /bits/ 8 <OSD1_BLOCK>;
|
||||
index = /bits/ 8 <0>;
|
||||
type = /bits/ 8 <0>;
|
||||
block_name = "osd1_block";
|
||||
num_in_links = /bits/ 8 <0x0>;
|
||||
num_out_links = /bits/ 8 <0x1>;
|
||||
out_links = <0 &afbc_osd1_block>;
|
||||
};
|
||||
osd2_block: block@1 {
|
||||
id = /bits/ 8 <OSD2_BLOCK>;
|
||||
index = /bits/ 8 <1>;
|
||||
type = /bits/ 8 <0>;
|
||||
block_name = "osd2_block";
|
||||
num_in_links = /bits/ 8 <0x0>;
|
||||
num_out_links = /bits/ 8 <0x1>;
|
||||
out_links = <0 &afbc_osd2_block>;
|
||||
};
|
||||
osd3_block: block@2 {
|
||||
id = /bits/ 8 <OSD3_BLOCK>;
|
||||
index = /bits/ 8 <2>;
|
||||
type = /bits/ 8 <0>;
|
||||
block_name = "osd3_block";
|
||||
num_in_links = /bits/ 8 <0x0>;
|
||||
num_out_links = /bits/ 8 <0x1>;
|
||||
out_links = <0 &afbc_osd3_block>;
|
||||
};
|
||||
afbc_osd1_block: block@3 {
|
||||
id = /bits/ 8 <AFBC_OSD1_BLOCK>;
|
||||
index = /bits/ 8 <0>;
|
||||
type = /bits/ 8 <1>;
|
||||
block_name = "afbc_osd1_block";
|
||||
num_in_links = /bits/ 8 <0x1>;
|
||||
in_links = <0 &osd1_block>;
|
||||
num_out_links = /bits/ 8 <0x1>;
|
||||
out_links = <0 &osd_blend_block>;
|
||||
};
|
||||
afbc_osd2_block: block@4 {
|
||||
id = /bits/ 8 <AFBC_OSD2_BLOCK>;
|
||||
index = /bits/ 8 <1>;
|
||||
type = /bits/ 8 <1>;
|
||||
block_name = "afbc_osd2_block";
|
||||
num_in_links = /bits/ 8 <0x1>;
|
||||
in_links = <0 &osd2_block>;
|
||||
num_out_links = /bits/ 8 <0x1>;
|
||||
out_links = <0 &scaler_osd2_block>;
|
||||
};
|
||||
afbc_osd3_block: block@5 {
|
||||
id = /bits/ 8 <AFBC_OSD3_BLOCK>;
|
||||
index = /bits/ 8 <2>;
|
||||
type = /bits/ 8 <1>;
|
||||
block_name = "afbc_osd3_block";
|
||||
num_in_links = /bits/ 8 <0x1>;
|
||||
in_links = <0 &osd3_block>;
|
||||
num_out_links = /bits/ 8 <0x1>;
|
||||
out_links = <0 &scaler_osd3_block>;
|
||||
};
|
||||
scaler_osd1_block: block@6 {
|
||||
id = /bits/ 8 <SCALER_OSD1_BLOCK>;
|
||||
index = /bits/ 8 <0>;
|
||||
type = /bits/ 8 <2>;
|
||||
block_name = "scaler_osd1_block";
|
||||
num_in_links = /bits/ 8 <0x1>;
|
||||
in_links = <0 &osd1_hdr_dolby_block>;
|
||||
num_out_links = /bits/ 8 <0x1>;
|
||||
out_links = <0 &vpp_postblend_block>;
|
||||
};
|
||||
scaler_osd2_block: block@7 {
|
||||
id = /bits/ 8 <SCALER_OSD2_BLOCK>;
|
||||
index = /bits/ 8 <1>;
|
||||
type = /bits/ 8 <2>;
|
||||
block_name = "scaler_osd2_block";
|
||||
num_in_links = /bits/ 8 <0x1>;
|
||||
in_links = <0 &afbc_osd2_block>;
|
||||
num_out_links = /bits/ 8 <0x1>;
|
||||
out_links = <2 &osd_blend_block>;
|
||||
};
|
||||
scaler_osd3_block: block@8 {
|
||||
id = /bits/ 8 <SCALER_OSD3_BLOCK>;
|
||||
index = /bits/ 8 <2>;
|
||||
type = /bits/ 8 <2>;
|
||||
block_name = "scaler_osd3_block";
|
||||
num_in_links = /bits/ 8 <0x1>;
|
||||
in_links = <0 &afbc_osd3_block>;
|
||||
num_out_links = /bits/ 8 <0x1>;
|
||||
out_links = <3 &osd_blend_block>;
|
||||
};
|
||||
osd_blend_block: block@9 {
|
||||
id = /bits/ 8 <OSD_BLEND_BLOCK>;
|
||||
block_name = "osd_blend_block";
|
||||
type = /bits/ 8 <3>;
|
||||
num_in_links = /bits/ 8 <0x3>;
|
||||
in_links = <0 &afbc_osd1_block>,
|
||||
<0 &scaler_osd2_block>,
|
||||
<0 &scaler_osd3_block>;
|
||||
num_out_links = /bits/ 8 <0x2>;
|
||||
out_links = <0 &osd1_hdr_dolby_block>,
|
||||
<1 &vpp_postblend_block>;
|
||||
};
|
||||
osd1_hdr_dolby_block: block@10 {
|
||||
id = /bits/ 8 <OSD1_HDR_BLOCK>;
|
||||
block_name = "osd1_hdr_dolby_block";
|
||||
type = /bits/ 8 <4>;
|
||||
num_in_links = /bits/ 8 <0x1>;
|
||||
in_links = <0 &osd_blend_block>;
|
||||
num_out_links = /bits/ 8 <0x1>;
|
||||
out_links = <0 &scaler_osd1_block>;
|
||||
};
|
||||
vpp_postblend_block: block@12 {
|
||||
id = /bits/ 8 <VPP_POSTBLEND_BLOCK>;
|
||||
block_name = "vpp_postblend_block";
|
||||
type = /bits/ 8 <6>;
|
||||
num_in_links = /bits/ 8 <0x2>;
|
||||
in_links = <0 &scaler_osd1_block>,
|
||||
<1 &osd_blend_block>;
|
||||
num_out_links = <0x0>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
vpu_hw_para: vpu_hw_para@0 {
|
||||
osd_ver = /bits/ 8 <0x2>;
|
||||
afbc_type = /bits/ 8 <0x2>;
|
||||
has_deband = /bits/ 8 <0x1>;
|
||||
has_lut = /bits/ 8 <0x1>;
|
||||
has_rdma = /bits/ 8 <0x1>;
|
||||
osd_fifo_len = /bits/ 8 <64>;
|
||||
vpp_fifo_len = /bits/ 32 <0xfff>;
|
||||
};
|
||||
};
|
||||
};
|
||||
@@ -246,20 +246,21 @@
|
||||
ram-dump {
|
||||
compatible = "amlogic, ram_dump";
|
||||
status = "okay";
|
||||
reg = <0xC88345E0 4>;
|
||||
reg-names = "PREG_STICKY_REG8";
|
||||
store_device = "data";
|
||||
};
|
||||
|
||||
jtag {
|
||||
compatible = "amlogic, jtag";
|
||||
status = "okay";
|
||||
select = "apao"; /* disable/apao/apee */
|
||||
jtagao-gpios = <&gpio GPIOH_6 0
|
||||
&gpio GPIOH_7 0
|
||||
&gpio GPIOH_8 0
|
||||
&gpio GPIOH_9 0>;
|
||||
jtagee-gpios = <&gpio CARD_0 0
|
||||
&gpio CARD_1 0
|
||||
&gpio CARD_2 0
|
||||
&gpio CARD_3 0>;
|
||||
select = "disable"; /* disable/apao/apee */
|
||||
/* both sets of jtags for the GXL platform */
|
||||
/* are in the ee domain, this is named apao */
|
||||
/* just to match the jtag driver */
|
||||
pinctrl-names="jtag_apao_pins", "jtag_apee_pins";
|
||||
pinctrl-0=<&jtag_a_pins>;
|
||||
pinctrl-1=<&jtag_b_pins>;
|
||||
};
|
||||
|
||||
mailbox: mhu@c883c400 {
|
||||
@@ -523,6 +524,14 @@
|
||||
clocks = <&clkc CLKID_I2C>;
|
||||
clock-names = "clk_i2c";
|
||||
};
|
||||
|
||||
irblaster: meson-irblaster@c0 {
|
||||
compatible = "amlogic, aml_irblaster";
|
||||
reg = <0xc0 0xc>,
|
||||
<0x40 0x4>;
|
||||
#irblaster-cells = <2>;
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
|
||||
periphs: periphs@c8834000 {
|
||||
@@ -543,6 +552,7 @@
|
||||
clkc: clock-controller@0 {
|
||||
compatible = "amlogic,gxl-clkc";
|
||||
#clock-cells = <1>;
|
||||
#reset-cells = <1>;
|
||||
reg = <0x0 0x3db>;
|
||||
};
|
||||
};
|
||||
@@ -635,6 +645,20 @@
|
||||
function = "ee_cec";
|
||||
};
|
||||
};
|
||||
|
||||
irblaster_pins:irblaster_pin {
|
||||
mux {
|
||||
groups = "ir_out_ao7";
|
||||
function = "ir_out";
|
||||
};
|
||||
};
|
||||
|
||||
irblaster_pins1:irblaster_pin1 {
|
||||
mux {
|
||||
groups = "ir_out_ao9";
|
||||
function = "ir_out";
|
||||
};
|
||||
};
|
||||
}; /* end of pinctrl_aobus*/
|
||||
|
||||
&pinctrl_periphs {
|
||||
@@ -658,23 +682,23 @@
|
||||
};
|
||||
};
|
||||
|
||||
jtag_apao_pins:jtag_apao_pin {
|
||||
jtag_a_pins:jtag_a_pin {
|
||||
mux {
|
||||
groups = "jtag_tdi_0",
|
||||
"jtag_tdo_0",
|
||||
"jtag_clk_0",
|
||||
"jtag_tms_0";
|
||||
function = "jtag";
|
||||
groups = "GPIOH_6",
|
||||
"GPIOH_7",
|
||||
"GPIOH_8",
|
||||
"GPIOH_9";
|
||||
function = "gpio_periphs";
|
||||
};
|
||||
};
|
||||
|
||||
jtag_apee_pins:jtag_apee_pin {
|
||||
jtag_b_pins:jtag_b_pin {
|
||||
mux {
|
||||
groups ="jtag_tdi_1",
|
||||
"jtag_tdo_1",
|
||||
"jtag_clk_1",
|
||||
"jtag_tms_1";
|
||||
function = "jtag";
|
||||
groups = "CARD_0",
|
||||
"CARD_1",
|
||||
"CARD_2",
|
||||
"CARD_3";
|
||||
function = "gpio_periphs";
|
||||
};
|
||||
};
|
||||
|
||||
@@ -682,10 +706,15 @@
|
||||
mux {
|
||||
groups = "uart_tx_a",
|
||||
"uart_rx_a",
|
||||
"uart_cts_a",
|
||||
"uart_rts_a";
|
||||
function = "uart_a";
|
||||
};
|
||||
|
||||
mux1 {
|
||||
groups = "uart_cts_a";
|
||||
function = "uart_a";
|
||||
bias-pull-down;
|
||||
};
|
||||
};
|
||||
|
||||
b_uart_pins:b_uart {
|
||||
|
||||
@@ -241,15 +241,13 @@
|
||||
jtag {
|
||||
compatible = "amlogic, jtag";
|
||||
status = "okay";
|
||||
select = "apao"; /* disable/apao/apee */
|
||||
jtagao-gpios = <&gpio GPIOH_6 0
|
||||
&gpio GPIOH_7 0
|
||||
&gpio GPIOH_8 0
|
||||
&gpio GPIOH_9 0>;
|
||||
jtagee-gpios = <&gpio CARD_0 0
|
||||
&gpio CARD_1 0
|
||||
&gpio CARD_2 0
|
||||
&gpio CARD_3 0>;
|
||||
select = "disable"; /* disable/apao/apee */
|
||||
/* both sets of jtags for the GXL platform */
|
||||
/* are in the ee domain, this is named apao */
|
||||
/* just to match the jtag driver */
|
||||
pinctrl-names="jtag_apao_pins", "jtag_apee_pins";
|
||||
pinctrl-0=<&jtag_a_pins>;
|
||||
pinctrl-1=<&jtag_b_pins>;
|
||||
};
|
||||
|
||||
mailbox: mhu@c883c400 {
|
||||
@@ -644,23 +642,23 @@
|
||||
};
|
||||
};
|
||||
|
||||
jtag_apao_pins:jtag_apao_pin {
|
||||
jtag_a_pins:jtag_a_pin {
|
||||
mux {
|
||||
groups = "jtag_tdi_0",
|
||||
"jtag_tdo_0",
|
||||
"jtag_clk_0",
|
||||
"jtag_tms_0";
|
||||
function = "jtag";
|
||||
groups = "GPIOH_6",
|
||||
"GPIOH_7",
|
||||
"GPIOH_8",
|
||||
"GPIOH_9";
|
||||
function = "gpio_periphs";
|
||||
};
|
||||
};
|
||||
|
||||
jtag_apee_pins:jtag_apee_pin {
|
||||
jtag_b_pins:jtag_b_pin {
|
||||
mux {
|
||||
groups ="jtag_tdi_1",
|
||||
"jtag_tdo_1",
|
||||
"jtag_clk_1",
|
||||
"jtag_tms_1";
|
||||
function = "jtag";
|
||||
groups = "CARD_0",
|
||||
"CARD_1",
|
||||
"CARD_2",
|
||||
"CARD_3";
|
||||
function = "gpio_periphs";
|
||||
};
|
||||
};
|
||||
|
||||
|
||||
@@ -212,7 +212,7 @@
|
||||
*/
|
||||
SYSTEM_SLEEP_0: system-sleep-0 {
|
||||
compatible = "arm,idle-state";
|
||||
arm,psci-suspend-param = <0x1010000>;
|
||||
arm,psci-suspend-param = <0x1020000>;
|
||||
local-timer-stop;
|
||||
entry-latency-us = <0x3fffffff>;
|
||||
exit-latency-us = <0x40000000>;
|
||||
@@ -242,15 +242,17 @@
|
||||
};
|
||||
|
||||
arm_pmu {
|
||||
compatible = "arm,cortex-a15-pmu";
|
||||
/* clusterb-enabled; */
|
||||
interrupts = <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>;
|
||||
reg = <0xc8834680 0x4>;
|
||||
cpumasks = <0xf>;
|
||||
compatible = "arm,cortex-a7-pmu";
|
||||
clusterb-enabled;
|
||||
interrupts = <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>;
|
||||
reg = <0xc8834680 0x4>,
|
||||
<0xc8834740 0x4>;
|
||||
cpumasks = <0xf 0xf0>;
|
||||
/* default 10ms */
|
||||
relax-timer-ns = <10000000>;
|
||||
/* default 10000us */
|
||||
max-wait-cnt = <10000>;
|
||||
/* default 100000us */
|
||||
max-wait-cnt = <100000>;
|
||||
};
|
||||
|
||||
gic: interrupt-controller@2c001000 {
|
||||
@@ -280,14 +282,21 @@
|
||||
ram-dump {
|
||||
compatible = "amlogic, ram_dump";
|
||||
status = "okay";
|
||||
reg = <0xC88345E0 4>;
|
||||
reg-names = "PREG_STICKY_REG8";
|
||||
store_device = "data";
|
||||
};
|
||||
|
||||
jtag {
|
||||
compatible = "amlogic, jtag";
|
||||
status = "disabled";
|
||||
status = "okay";
|
||||
select = "disable"; /* disable/apao/apee */
|
||||
/* both sets of jtags for the GXM platform */
|
||||
/* are in the ee domain, this is named apao */
|
||||
/* just to match the jtag driver */
|
||||
pinctrl-names = "jtag_apao_pins", "jtag_apee_pins";
|
||||
pinctrl-0 = <&jtag_apao_pins>;
|
||||
pinctrl-1 = <&jtag_apee_pins>;
|
||||
pinctrl-0 = <&jtag_a_pins>;
|
||||
pinctrl-1 = <&jtag_b_pins>;
|
||||
};
|
||||
|
||||
psci {
|
||||
@@ -624,6 +633,14 @@
|
||||
clocks = <&clkc CLKID_I2C>;
|
||||
clock-names = "clk_i2c";
|
||||
};
|
||||
|
||||
irblaster: meson-irblaster@c0 {
|
||||
compatible = "amlogic, aml_irblaster";
|
||||
reg = <0xc0 0xc>,
|
||||
<0x40 0x4>;
|
||||
#irblaster-cells = <2>;
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
|
||||
periphs: periphs@c8834000 {
|
||||
@@ -644,6 +661,7 @@
|
||||
clkc: clock-controller@0 {
|
||||
compatible = "amlogic,gxl-clkc";
|
||||
#clock-cells = <1>;
|
||||
#reset-cells = <1>;
|
||||
reg = <0x0 0x3db>;
|
||||
};
|
||||
};
|
||||
@@ -729,6 +747,20 @@
|
||||
function = "ee_cec";
|
||||
};
|
||||
};
|
||||
|
||||
irblaster_pins:irblaster_pin {
|
||||
mux {
|
||||
groups = "ir_out_ao7";
|
||||
function = "ir_out";
|
||||
};
|
||||
};
|
||||
|
||||
irblaster_pins1:irblaster_pin1 {
|
||||
mux {
|
||||
groups = "ir_out_ao9";
|
||||
function = "ir_out";
|
||||
};
|
||||
};
|
||||
}; /* end of pinctrl_aobus*/
|
||||
|
||||
&pinctrl_periphs {
|
||||
@@ -752,23 +784,23 @@
|
||||
};
|
||||
};
|
||||
|
||||
jtag_apao_pins:jtag_apao_pin {
|
||||
jtag_a_pins:jtag_a_pin {
|
||||
mux {
|
||||
groups = "jtag_tdi_0",
|
||||
"jtag_tdo_0",
|
||||
"jtag_clk_0",
|
||||
"jtag_tms_0";
|
||||
function = "jtag";
|
||||
groups = "GPIOH_6",
|
||||
"GPIOH_7",
|
||||
"GPIOH_8",
|
||||
"GPIOH_9";
|
||||
function = "gpio_periphs";
|
||||
};
|
||||
};
|
||||
|
||||
jtag_apee_pins:jtag_apee_pin {
|
||||
jtag_b_pins:jtag_b_pin {
|
||||
mux {
|
||||
groups ="jtag_tdi_1",
|
||||
"jtag_tdo_1",
|
||||
"jtag_clk_1",
|
||||
"jtag_tms_1";
|
||||
function = "jtag";
|
||||
groups = "CARD_0",
|
||||
"CARD_1",
|
||||
"CARD_2",
|
||||
"CARD_3";
|
||||
function = "gpio_periphs";
|
||||
};
|
||||
};
|
||||
|
||||
|
||||
@@ -473,6 +473,7 @@
|
||||
status = "okay";
|
||||
reg = <0xFF6345E0 4>;
|
||||
reg-names = "PREG_STICKY_REG8";
|
||||
store_device = "data";
|
||||
};
|
||||
|
||||
jtag {
|
||||
@@ -500,6 +501,11 @@
|
||||
<0xff63c100 0x10>;
|
||||
};
|
||||
|
||||
bl40: bl40 {
|
||||
compatible = "amlogic, bl40-bootup";
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
soc {
|
||||
compatible = "simple-bus";
|
||||
#address-cells = <1>;
|
||||
@@ -666,6 +672,7 @@
|
||||
aoclkc: clock-controller@0 {
|
||||
compatible = "amlogic,sm1-aoclkc";
|
||||
#clock-cells = <1>;
|
||||
#reset-cells = <1>;
|
||||
reg = <0x0 0x3dc>;
|
||||
};
|
||||
|
||||
@@ -784,10 +791,10 @@
|
||||
|
||||
audiobus: audiobus@0xFF660000 {
|
||||
compatible = "amlogic, audio-controller", "simple-bus";
|
||||
reg = <0xFF660000 0x4000>;
|
||||
reg = <0xFF660000 0x3000>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges = <0x0 0xFF660000 0x4000>;
|
||||
ranges = <0x0 0xFF660000 0x3000>;
|
||||
clkaudio: audio_clocks {
|
||||
compatible = "amlogic, sm1-audio-clocks";
|
||||
#clock-cells = <1>;
|
||||
@@ -813,6 +820,82 @@
|
||||
};
|
||||
};/* end of audiobus*/
|
||||
|
||||
/* eARC */
|
||||
audio_earc: bus@ff663000 {
|
||||
compatible = "simple-bus";
|
||||
reg = <0xff663000 0x1000>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges = <0x0 0xff663000 0x1000>;
|
||||
|
||||
earc: earc@0 {
|
||||
compatible = "amlogic, sm1-snd-earc";
|
||||
#sound-dai-cells = <0>;
|
||||
|
||||
status = "disabled";
|
||||
|
||||
reg =
|
||||
<0x800 0x400>,
|
||||
<0xc00 0x200>,
|
||||
<0xe00 0x200>;
|
||||
reg-names =
|
||||
"rx_cmdc",
|
||||
"rx_dmac",
|
||||
"rx_top";
|
||||
|
||||
clocks = < &clkaudio CLKID_EARCRX_CMDC
|
||||
&clkaudio CLKID_EARCRX_DMAC
|
||||
&clkc CLKID_FCLK_DIV4
|
||||
&clkc CLKID_FCLK_DIV4
|
||||
&clkaudio CLKID_EARCTX_CMDC
|
||||
&clkaudio CLKID_EARCTX_DMAC
|
||||
&clkc CLKID_FCLK_DIV4
|
||||
&clkc CLKID_MPLL1
|
||||
>;
|
||||
clock-names =
|
||||
"rx_cmdc",
|
||||
"rx_dmac",
|
||||
"rx_cmdc_srcpll",
|
||||
"rx_dmac_srcpll";
|
||||
|
||||
interrupts = <
|
||||
GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-names = "earc_rx";
|
||||
};
|
||||
};
|
||||
|
||||
/* Sound iomap */
|
||||
aml_snd_iomap {
|
||||
compatible = "amlogic, snd-iomap";
|
||||
status = "okay";
|
||||
#address-cells=<1>;
|
||||
#size-cells=<1>;
|
||||
ranges;
|
||||
pdm_bus {
|
||||
reg = <0xFF661000 0x400>;
|
||||
};
|
||||
audiobus_base {
|
||||
reg = <0xFF660000 0x1000>;
|
||||
};
|
||||
audiolocker_base {
|
||||
reg = <0xFF661400 0x400>;
|
||||
};
|
||||
eqdrc_base {
|
||||
reg = <0xFF662000 0x1000>;
|
||||
};
|
||||
reset_base {
|
||||
reg = <0xFFD01000 0x1000>;
|
||||
};
|
||||
vad_base {
|
||||
reg = <0xFF661800 0x400>;
|
||||
};
|
||||
resampleA_base {
|
||||
reg = <0xFF661c00 0x104>;
|
||||
};
|
||||
resampleB_base {
|
||||
reg = <0xFF664000 0x104>;
|
||||
};
|
||||
};
|
||||
}; /* end of soc*/
|
||||
|
||||
remote:rc@0xff808040 {
|
||||
@@ -1107,15 +1190,15 @@
|
||||
interrupts = <0 186 4>;
|
||||
interrupt-names = "galcore";
|
||||
reg = <0xff100000 0x800
|
||||
/*reg base value:0xff100000 */
|
||||
0xff000000 0x400000
|
||||
/*Sram bse value:0xff000000*/
|
||||
0xff63c118 0x0
|
||||
0xff63c11c 0x0
|
||||
/*0xff63c118,0xff63c11c :nanoq mem regs*/
|
||||
0xffd01088 0x0
|
||||
/*0xffd01088:reset reg*/
|
||||
0xff63c1c8 0x0
|
||||
>;
|
||||
reg-names = "NN_REG","NN_SRAM","NN_MEM0",
|
||||
"NN_MEM1","NN_RESET","NN_CLK";
|
||||
nn_power_version = <3>;
|
||||
nn_efuse = <0xff63003c 0x20>;
|
||||
};
|
||||
aocec: aocec {
|
||||
@@ -1131,6 +1214,7 @@
|
||||
cec_osd_string = "AML_MBOX"; /* Max Chars: 14 */
|
||||
cec_version = <5>;/*5:1.4;6:2.0*/
|
||||
port_num = <1>;
|
||||
output = <1>;
|
||||
ee_cec;
|
||||
arc_port_mask = <0x2>;
|
||||
interrupts = <0 203 1
|
||||
@@ -1297,13 +1381,15 @@
|
||||
0 32 1
|
||||
0 43 1
|
||||
0 44 1
|
||||
0 45 1>;
|
||||
0 45 1
|
||||
0 72 1>;
|
||||
interrupt-names = "vsync",
|
||||
"demux",
|
||||
"parser",
|
||||
"mailbox_0",
|
||||
"mailbox_1",
|
||||
"mailbox_2";
|
||||
"mailbox_2",
|
||||
"parser_b";
|
||||
};
|
||||
|
||||
vcodec_dec {
|
||||
@@ -1425,7 +1511,8 @@
|
||||
"sd_to_ao_uart_pins",
|
||||
"ao_to_sd_uart_pins",
|
||||
"sd_to_ao_jtag_pins",
|
||||
"ao_to_sd_jtag_pins";
|
||||
"ao_to_sd_jtag_pins",
|
||||
"sd_all_pd_pins";
|
||||
|
||||
pinctrl-0 = <&sd_all_pins>;
|
||||
pinctrl-1 = <&sd_clk_cmd_pins>;
|
||||
@@ -1440,6 +1527,7 @@
|
||||
pinctrl-7 = <&sd_all_pins &sd_to_ao_uart_pins>;
|
||||
pinctrl-8 = <&sd_to_ao_uart_clr_pins
|
||||
&ao_to_sd_uart_pins>;
|
||||
pinctrl-9 = <&sd_all_pd_pins>;
|
||||
|
||||
clocks = <&clkc CLKID_SD_EMMC_B>,
|
||||
<&clkc CLKID_SD_EMMC_B_P0_COMP>,
|
||||
@@ -1532,42 +1620,6 @@
|
||||
/*partions defined in dts */
|
||||
};
|
||||
|
||||
/* Sound iomap */
|
||||
aml_snd_iomap {
|
||||
compatible = "amlogic, snd-iomap";
|
||||
status = "okay";
|
||||
#address-cells=<1>;
|
||||
#size-cells=<1>;
|
||||
ranges;
|
||||
pdm_bus {
|
||||
reg = <0xFF661000 0x400>;
|
||||
};
|
||||
audiobus_base {
|
||||
reg = <0xFF660000 0x1000>;
|
||||
};
|
||||
audiolocker_base {
|
||||
reg = <0xFF661400 0x400>;
|
||||
};
|
||||
eqdrc_base {
|
||||
reg = <0xFF662000 0x1000>;
|
||||
};
|
||||
reset_base {
|
||||
reg = <0xFFD01000 0x1000>;
|
||||
};
|
||||
vad_base {
|
||||
reg = <0xFF661800 0x400>;
|
||||
};
|
||||
earcrx_cdmc_base {
|
||||
reg = <0xFF663800 0x30>;
|
||||
};
|
||||
earcrx_dmac_base {
|
||||
reg = <0xFF663C00 0x20>;
|
||||
};
|
||||
earcrx_top_base {
|
||||
reg = <0xFF663E00 0x10>;
|
||||
};
|
||||
};
|
||||
|
||||
vddcpu0: pwmao_d-regulator {
|
||||
compatible = "pwm-regulator";
|
||||
pwms = <&pwm_AO_cd MESON_PWM_1 1500 0>;
|
||||
@@ -1912,6 +1964,20 @@
|
||||
};
|
||||
};
|
||||
|
||||
sd_all_pd_pins:sd_all_pd_pins {
|
||||
mux {
|
||||
groups = "GPIOC_0",
|
||||
"GPIOC_1",
|
||||
"GPIOC_2",
|
||||
"GPIOC_3",
|
||||
"GPIOC_4",
|
||||
"GPIOC_5";
|
||||
function = "gpio_periphs";
|
||||
bias-pull-down;
|
||||
output-low;
|
||||
};
|
||||
};
|
||||
|
||||
sd_1bit_pins:sd_1bit_pins {
|
||||
mux {
|
||||
groups = "sdcard_d0_c",
|
||||
|
||||
241
arch/arm/boot/dts/amlogic/mesonsm1_drm.dtsi
Normal file
241
arch/arm/boot/dts/amlogic/mesonsm1_drm.dtsi
Normal file
@@ -0,0 +1,241 @@
|
||||
/*
|
||||
* arch/arm/boot/dts/amlogic/mesonsm1_drm.dtsi
|
||||
*
|
||||
* Copyright (C) 2015 Amlogic, Inc. All rights reserved.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful, but WITHOUT
|
||||
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
||||
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
||||
* more details.
|
||||
*
|
||||
*/
|
||||
#include <dt-bindings/display/meson-drm-ids.h>
|
||||
|
||||
/ {
|
||||
venc-cvbs {
|
||||
status = "okay";
|
||||
compatible = "amlogic, meson-sm1-cvbs";
|
||||
|
||||
ports {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
enc_cvbs_in: port@0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
reg = <0>;
|
||||
|
||||
//venc_cvbs_in_vpu: endpoint@0 {
|
||||
// reg = <0>;
|
||||
// remote-endpoint = <&vpu_out_venc_cvbs>;
|
||||
//};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
drm_amhdmitx: drm-amhdmitx {
|
||||
status = "disabled";
|
||||
hdcp = "disabled";
|
||||
compatible = "amlogic,drm-amhdmitx";
|
||||
dev_name = "meson-amhdmitx";
|
||||
interrupts = <GIC_SPI 3 IRQ_TYPE_EDGE_RISING>;
|
||||
ports {
|
||||
port {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
hdmi_in_vpu: endpoint@0 {
|
||||
reg = <0>;
|
||||
remote-endpoint = <&vpu_out_hdmi>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
drm_lcd: drm-lcd {
|
||||
status = "disabled";
|
||||
compatible = "amlogic,drm-lcd";
|
||||
dev_name = "meson-lcd";
|
||||
ports {
|
||||
port {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
lcd_in_vpu: endpoint@0 {
|
||||
reg = <0>;
|
||||
remote-endpoint = <&vpu_out_lcd>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
drm_vpu: drm-vpu@0xff900000 {
|
||||
status = "disabled";
|
||||
compatible = "amlogic, meson-sm1-vpu";
|
||||
memory-region = <&logo_reserved>;
|
||||
reg = <0x0 0xff900000 0x0 0x40000>,
|
||||
<0x0 0xff63c000 0x0 0x2000>,
|
||||
<0x0 0xff638000 0x0 0x2000>;
|
||||
reg-names = "base", "hhi", "dmc";
|
||||
interrupts = <GIC_SPI 3 IRQ_TYPE_EDGE_RISING>,
|
||||
<GIC_SPI 56 IRQ_TYPE_EDGE_RISING>;
|
||||
interrupt-names = "viu-vsync", "viu2-vsync";
|
||||
clocks = <&clkc CLKID_VPU_CLKC_MUX>;
|
||||
clock-names = "vpu_clkc";
|
||||
dma-coherent;
|
||||
vpu_out: port {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
vpu_out_hdmi: endpoint@0 {
|
||||
reg = <0>;
|
||||
remote-endpoint = <&hdmi_in_vpu>;
|
||||
};
|
||||
vpu_out_lcd: endpoint@1 {
|
||||
reg = <1>;
|
||||
remote-endpoint = <&lcd_in_vpu>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
drm_subsystem: drm-subsystem {
|
||||
status = "okay";
|
||||
compatible = "amlogic,drm-subsystem";
|
||||
ports = <&vpu_out>;
|
||||
|
||||
vpu_topology: vpu_topology {
|
||||
vpu_blocks {
|
||||
osd1_block: block@0 {
|
||||
id = /bits/ 8 <OSD1_BLOCK>;
|
||||
index = /bits/ 8 <0>;
|
||||
type = /bits/ 8 <0>;
|
||||
block_name = "osd1_block";
|
||||
num_in_links = /bits/ 8 <0x0>;
|
||||
num_out_links = /bits/ 8 <0x1>;
|
||||
out_links = <0 &afbc_osd1_block>;
|
||||
};
|
||||
osd2_block: block@1 {
|
||||
id = /bits/ 8 <OSD2_BLOCK>;
|
||||
index = /bits/ 8 <1>;
|
||||
type = /bits/ 8 <0>;
|
||||
block_name = "osd2_block";
|
||||
num_in_links = /bits/ 8 <0x0>;
|
||||
num_out_links = /bits/ 8 <0x1>;
|
||||
out_links = <0 &afbc_osd2_block>;
|
||||
};
|
||||
osd3_block: block@2 {
|
||||
id = /bits/ 8 <OSD3_BLOCK>;
|
||||
index = /bits/ 8 <2>;
|
||||
type = /bits/ 8 <0>;
|
||||
block_name = "osd3_block";
|
||||
num_in_links = /bits/ 8 <0x0>;
|
||||
num_out_links = /bits/ 8 <0x1>;
|
||||
out_links = <0 &afbc_osd3_block>;
|
||||
};
|
||||
afbc_osd1_block: block@3 {
|
||||
id = /bits/ 8 <AFBC_OSD1_BLOCK>;
|
||||
index = /bits/ 8 <0>;
|
||||
type = /bits/ 8 <1>;
|
||||
block_name = "afbc_osd1_block";
|
||||
num_in_links = /bits/ 8 <0x1>;
|
||||
in_links = <0 &osd1_block>;
|
||||
num_out_links = /bits/ 8 <0x1>;
|
||||
out_links = <0 &osd_blend_block>;
|
||||
};
|
||||
afbc_osd2_block: block@4 {
|
||||
id = /bits/ 8 <AFBC_OSD2_BLOCK>;
|
||||
index = /bits/ 8 <1>;
|
||||
type = /bits/ 8 <1>;
|
||||
block_name = "afbc_osd2_block";
|
||||
num_in_links = /bits/ 8 <0x1>;
|
||||
in_links = <0 &osd2_block>;
|
||||
num_out_links = /bits/ 8 <0x1>;
|
||||
out_links = <0 &scaler_osd2_block>;
|
||||
};
|
||||
afbc_osd3_block: block@5 {
|
||||
id = /bits/ 8 <AFBC_OSD3_BLOCK>;
|
||||
index = /bits/ 8 <2>;
|
||||
type = /bits/ 8 <1>;
|
||||
block_name = "afbc_osd3_block";
|
||||
num_in_links = /bits/ 8 <0x1>;
|
||||
in_links = <0 &osd3_block>;
|
||||
num_out_links = /bits/ 8 <0x1>;
|
||||
out_links = <0 &scaler_osd3_block>;
|
||||
};
|
||||
scaler_osd1_block: block@6 {
|
||||
id = /bits/ 8 <SCALER_OSD1_BLOCK>;
|
||||
index = /bits/ 8 <0>;
|
||||
type = /bits/ 8 <2>;
|
||||
block_name = "scaler_osd1_block";
|
||||
num_in_links = /bits/ 8 <0x1>;
|
||||
in_links = <0 &osd1_hdr_dolby_block>;
|
||||
num_out_links = /bits/ 8 <0x1>;
|
||||
out_links = <0 &vpp_postblend_block>;
|
||||
};
|
||||
scaler_osd2_block: block@7 {
|
||||
id = /bits/ 8 <SCALER_OSD2_BLOCK>;
|
||||
index = /bits/ 8 <1>;
|
||||
type = /bits/ 8 <2>;
|
||||
block_name = "scaler_osd2_block";
|
||||
num_in_links = /bits/ 8 <0x1>;
|
||||
in_links = <0 &afbc_osd2_block>;
|
||||
num_out_links = /bits/ 8 <0x1>;
|
||||
out_links = <2 &osd_blend_block>;
|
||||
};
|
||||
scaler_osd3_block: block@8 {
|
||||
id = /bits/ 8 <SCALER_OSD3_BLOCK>;
|
||||
index = /bits/ 8 <2>;
|
||||
type = /bits/ 8 <2>;
|
||||
block_name = "scaler_osd3_block";
|
||||
num_in_links = /bits/ 8 <0x1>;
|
||||
in_links = <0 &afbc_osd3_block>;
|
||||
num_out_links = /bits/ 8 <0x1>;
|
||||
out_links = <3 &osd_blend_block>;
|
||||
};
|
||||
osd_blend_block: block@9 {
|
||||
id = /bits/ 8 <OSD_BLEND_BLOCK>;
|
||||
block_name = "osd_blend_block";
|
||||
type = /bits/ 8 <3>;
|
||||
num_in_links = /bits/ 8 <0x3>;
|
||||
in_links = <0 &afbc_osd1_block>,
|
||||
<0 &scaler_osd2_block>,
|
||||
<0 &scaler_osd3_block>;
|
||||
num_out_links = /bits/ 8 <0x2>;
|
||||
out_links = <0 &osd1_hdr_dolby_block>,
|
||||
<1 &vpp_postblend_block>;
|
||||
};
|
||||
osd1_hdr_dolby_block: block@10 {
|
||||
id = /bits/ 8 <OSD1_HDR_BLOCK>;
|
||||
block_name = "osd1_hdr_dolby_block";
|
||||
type = /bits/ 8 <4>;
|
||||
num_in_links = /bits/ 8 <0x1>;
|
||||
in_links = <0 &osd_blend_block>;
|
||||
num_out_links = /bits/ 8 <0x1>;
|
||||
out_links = <0 &scaler_osd1_block>;
|
||||
};
|
||||
vpp_postblend_block: block@12 {
|
||||
id = /bits/ 8 <VPP_POSTBLEND_BLOCK>;
|
||||
block_name = "vpp_postblend_block";
|
||||
type = /bits/ 8 <6>;
|
||||
num_in_links = /bits/ 8 <0x2>;
|
||||
in_links = <0 &scaler_osd1_block>,
|
||||
<1 &osd_blend_block>;
|
||||
num_out_links = <0x0>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
vpu_hw_para: vpu_hw_para@0 {
|
||||
osd_ver = /bits/ 8 <0x2>;
|
||||
afbc_type = /bits/ 8 <0x2>;
|
||||
has_deband = /bits/ 8 <0x1>;
|
||||
has_lut = /bits/ 8 <0x1>;
|
||||
has_rdma = /bits/ 8 <0x1>;
|
||||
osd_fifo_len = /bits/ 8 <64>;
|
||||
vpp_fifo_len = /bits/ 32 <0xfff>;
|
||||
};
|
||||
};
|
||||
};
|
||||
@@ -196,6 +196,55 @@
|
||||
0xff 0 0 0>;
|
||||
backlight_index = <0>;
|
||||
};
|
||||
lcd_8{
|
||||
model_name = "SLT_720P";
|
||||
interface = "mipi";
|
||||
basic_setting = <1280 720 /*h_active, v_active*/
|
||||
1590 750 /*h_period, v_period*/
|
||||
8 /*lcd_bits*/
|
||||
16 9>; /*screen_widht, screen_height*/
|
||||
lcd_timing = <40 60 0 /*hs_width,hs_bp,hs_pol*/
|
||||
5 20 0>; /*vs_width,vs_bp,vs_pol*/
|
||||
clk_attr = <0 /*fr_adj_type(0=clock,1=htotal,2=vtotal)*/
|
||||
0 /*clk_ss_level*/
|
||||
1 /*clk_auto_generate*/
|
||||
74250000>; /*pixel_clk(unit in Hz)*/
|
||||
mipi_attr = <4 /*lane_num*/
|
||||
550 /*bit_rate_max(MHz)*/
|
||||
0 /*factor(*100, default 0 for auto)*/
|
||||
1 /*operation_mode_init(0=video, 1=command)*/
|
||||
0 /*operation_mode_display(0=video, 1=command)*/
|
||||
0 /*
|
||||
*video_mode_type
|
||||
*(0=sync_pulse,1=sync_event,2=burst)
|
||||
*/
|
||||
1 /*clk_always_hs(0=disable,1=enable)*/
|
||||
0>; /*phy_switch(0=auto,1=standard,2=slow)*/
|
||||
/* dsi_init: data_type, num, data... */
|
||||
dsi_init_on = <
|
||||
0x05 1 0x11
|
||||
0xff 200
|
||||
0x05 1 0x29
|
||||
0xff 20
|
||||
0xff 0xff>; /* ending flag */
|
||||
dsi_init_off = <
|
||||
0x05 1 0x28
|
||||
0xff 10
|
||||
0x05 1 0x10
|
||||
0xff 10
|
||||
0xff 0xff>; /* ending flag */
|
||||
/* extern_init: 0xff for invalid */
|
||||
extern_init = <0xff>;
|
||||
/* power step: type,index,value,delay(ms) */
|
||||
power_on_step = <
|
||||
3 7 0 100
|
||||
2 0 0 0
|
||||
0xff 0 0 0>;
|
||||
power_off_step = <
|
||||
2 0 0 0
|
||||
0xff 0 0 0>;
|
||||
backlight_index = <0xff>;
|
||||
};
|
||||
};
|
||||
|
||||
lcd_extern{
|
||||
@@ -482,6 +531,127 @@
|
||||
0xff 200 /* delay 50ms */
|
||||
0xff 0xff>; /*ending*/
|
||||
};
|
||||
extern_7{
|
||||
index = <7>;
|
||||
extern_name = "ext_default";/*LT8912*/
|
||||
status = "okay";
|
||||
type = <0>; /* 0=i2c, 1=spi, 2=mipi */
|
||||
i2c_address = <0x48>; /*7bit i2c_addr*/
|
||||
i2c_second_address = <0x49>;
|
||||
cmd_size = <0xff>;
|
||||
init_on = <
|
||||
0xc0 2 0x08 0xff
|
||||
0xc0 2 0x09 0xff
|
||||
0xc0 2 0x0a 0xff
|
||||
0xc0 2 0x0b 0x7c
|
||||
0xc0 2 0x0c 0xff
|
||||
0xfd 1 10
|
||||
|
||||
0xc0 2 0x31 0xa1
|
||||
0xc0 2 0x32 0xa1
|
||||
0xc0 2 0x33 0x03
|
||||
0xc0 2 0x37 0x00
|
||||
0xc0 2 0x38 0x22
|
||||
0xc0 2 0x60 0x82
|
||||
0xfd 1 10
|
||||
|
||||
0xc0 2 0x39 0x45
|
||||
0xc0 2 0x3b 0x00
|
||||
0xfd 1 10
|
||||
|
||||
0xc0 2 0x44 0x31
|
||||
0xc0 2 0x55 0x44
|
||||
0xc0 2 0x57 0x01
|
||||
0xc0 2 0x5a 0x02
|
||||
0xfd 1 10
|
||||
|
||||
0xc0 2 0x3e 0xc6
|
||||
0xc0 2 0x41 0x7c
|
||||
0xfd 1 10
|
||||
|
||||
0xc1 2 0x10 0x04
|
||||
0xc1 2 0x11 0x04
|
||||
0xc1 2 0x12 0x04
|
||||
0xc1 2 0x13 0x00
|
||||
0xc1 2 0x14 0x00
|
||||
0xc1 2 0x15 0x00
|
||||
0xc1 2 0x1a 0x03
|
||||
0xc1 2 0x1b 0x03
|
||||
0xfd 1 20
|
||||
|
||||
0xc1 2 0x18 0x28
|
||||
0xc1 2 0x19 0x05
|
||||
0xc1 2 0x1c 0x00
|
||||
0xc1 2 0x1d 0x05
|
||||
0xc1 2 0x2f 0x0c
|
||||
0xc1 2 0x34 0x72
|
||||
0xc1 2 0x35 0x06
|
||||
0xc1 2 0x36 0xee
|
||||
0xc1 2 0x37 0x02
|
||||
0xc1 2 0x38 0x14
|
||||
0xc1 2 0x39 0x00
|
||||
0xc1 2 0x3a 0x05
|
||||
0xc1 2 0x3b 0x00
|
||||
0xc1 2 0x3c 0xdc
|
||||
0xc1 2 0x3d 0x00
|
||||
0xc1 2 0x3e 0x6e
|
||||
0xc1 2 0x3f 0x00
|
||||
0xfd 1 10
|
||||
|
||||
0xc0 2 0x03 0x7f
|
||||
0xfd 1 200
|
||||
0xc0 2 0x03 0xff
|
||||
0xfd 1 200
|
||||
|
||||
0xc1 2 0x4e 0x6A
|
||||
0xc1 2 0x4f 0x4D
|
||||
0xc1 2 0x50 0xF3
|
||||
0xc1 2 0x51 0x80
|
||||
0xc1 2 0x1f 0x90
|
||||
0xc1 2 0x20 0x01
|
||||
0xc1 2 0x21 0x68
|
||||
0xc1 2 0x22 0x01
|
||||
0xc1 2 0x23 0x5E
|
||||
0xc1 2 0x24 0x01
|
||||
0xc1 2 0x25 0x54
|
||||
0xc1 2 0x26 0x01
|
||||
0xc1 2 0x27 0x90
|
||||
0xc1 2 0x28 0x01
|
||||
0xc1 2 0x29 0x68
|
||||
0xc1 2 0x2a 0x01
|
||||
0xc1 2 0x2b 0x5E
|
||||
0xc1 2 0x2c 0x01
|
||||
0xc1 2 0x2d 0x54
|
||||
0xc1 2 0x2e 0x01
|
||||
0xc1 2 0x42 0x64
|
||||
0xc1 2 0x43 0x00
|
||||
0xc1 2 0x44 0x04
|
||||
0xc1 2 0x45 0x00
|
||||
0xc1 2 0x46 0x59
|
||||
0xc1 2 0x47 0x00
|
||||
0xc1 2 0x48 0xf2
|
||||
0xc1 2 0x49 0x06
|
||||
0xc1 2 0x4a 0x00
|
||||
0xc1 2 0x4b 0x72
|
||||
0xc1 2 0x4c 0x45
|
||||
0xc1 2 0x4d 0x00
|
||||
0xc1 2 0x52 0x08
|
||||
0xc1 2 0x53 0x00
|
||||
0xc1 2 0x54 0xb2
|
||||
0xc1 2 0x55 0x00
|
||||
0xc1 2 0x56 0xe4
|
||||
0xc1 2 0x57 0x0d
|
||||
0xc1 2 0x58 0x00
|
||||
0xc1 2 0x59 0xe4
|
||||
0xc1 2 0x5a 0x8a
|
||||
0xc1 2 0x5b 0x00
|
||||
0xc1 2 0x5c 0x34
|
||||
0xc1 2 0x1e 0x4f
|
||||
0xc1 2 0x51 0x00
|
||||
0xff 0>; /*ending*/
|
||||
init_off = <
|
||||
0xff 0>; /*ending*/
|
||||
};
|
||||
};
|
||||
|
||||
backlight{
|
||||
|
||||
@@ -25,7 +25,7 @@
|
||||
#include <dt-bindings/clock/amlogic,tl1-clkc.h>
|
||||
#include <dt-bindings/clock/amlogic,tl1-audio-clk.h>
|
||||
#include "mesong12a-bifrost.dtsi"
|
||||
|
||||
#include <dt-bindings/iio/adc/amlogic-saradc.h>
|
||||
/ {
|
||||
interrupt-parent = <&gic>;
|
||||
#address-cells = <1>;
|
||||
@@ -55,7 +55,10 @@
|
||||
/*set dynamic gp1 clk to val * 1000 *1000*/
|
||||
dynamic_gp1_clk = <1000>;
|
||||
cpu-supply = <&vddcpu0>;
|
||||
cpu-idle-states = <&CPU_SLEEP_0 &SYSTEM_SLEEP_0>;
|
||||
//cpu-idle-states = <&SYSTEM_SLEEP_0>;
|
||||
voltage-tolerance = <0>;
|
||||
clock-latency = <50000>;
|
||||
};
|
||||
|
||||
CPU1:cpu@1 {
|
||||
@@ -78,7 +81,10 @@
|
||||
/*set dynamic gp1 clk to val * 1000 *1000*/
|
||||
dynamic_gp1_clk = <1000>;
|
||||
cpu-supply = <&vddcpu0>;
|
||||
cpu-idle-states = <&CPU_SLEEP_0 &SYSTEM_SLEEP_0>;
|
||||
//cpu-idle-states = <&SYSTEM_SLEEP_0>;
|
||||
voltage-tolerance = <0>;
|
||||
clock-latency = <50000>;
|
||||
};
|
||||
|
||||
CPU2:cpu@2 {
|
||||
@@ -101,13 +107,16 @@
|
||||
/*set dynamic gp1 clk to val * 1000 *1000*/
|
||||
dynamic_gp1_clk = <1000>;
|
||||
cpu-supply = <&vddcpu0>;
|
||||
cpu-idle-states = <&CPU_SLEEP_0 &SYSTEM_SLEEP_0>;
|
||||
//cpu-idle-states = <&SYSTEM_SLEEP_0>;
|
||||
voltage-tolerance = <0>;
|
||||
clock-latency = <50000>;
|
||||
};
|
||||
|
||||
CPU3:cpu@3 {
|
||||
device_type = "cpu";
|
||||
compatible = "arm,cortex-a9";
|
||||
reg = <0x0 0x3>;
|
||||
reg = <0x3>;
|
||||
//timer=<&timer_d>;
|
||||
enable-method = "psci";
|
||||
clocks = <&clkc CLKID_CPU_CLK>,
|
||||
@@ -124,12 +133,35 @@
|
||||
/*set dynamic gp1 clk to val * 1000 *1000*/
|
||||
dynamic_gp1_clk = <1000>;
|
||||
cpu-supply = <&vddcpu0>;
|
||||
cpu-idle-states = <&CPU_SLEEP_0 &SYSTEM_SLEEP_0>;
|
||||
//cpu-idle-states = <&SYSTEM_SLEEP_0>;
|
||||
voltage-tolerance = <0>;
|
||||
clock-latency = <50000>;
|
||||
};
|
||||
|
||||
idle-states {
|
||||
entry-method = "arm,psci";
|
||||
CPU_SLEEP_0: cpu-sleep-0 {
|
||||
compatible = "arm,idle-state";
|
||||
arm,psci-suspend-param = <0x0010000>;
|
||||
local-timer-stop;
|
||||
entry-latency-us = <4000>;
|
||||
exit-latency-us = <4000>;
|
||||
min-residency-us = <9000>;
|
||||
};
|
||||
SYSTEM_SLEEP_0: system-sleep-0 {
|
||||
compatible = "arm,idle-state";
|
||||
arm,psci-suspend-param = <0x0020000>;
|
||||
local-timer-stop;
|
||||
entry-latency-us = <0x3fffffff>;
|
||||
exit-latency-us = <0x40000000>;
|
||||
min-residency-us = <0xffffffff>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
timer {
|
||||
compatible = "arm,armv8-timer";
|
||||
compatible = "arm,armv7-timer";
|
||||
interrupts = <GIC_PPI 13 0xff01>,
|
||||
<GIC_PPI 14 0xff01>,
|
||||
<GIC_PPI 11 0xff01>,
|
||||
@@ -151,19 +183,14 @@
|
||||
|
||||
arm_pmu {
|
||||
compatible = "arm,cortex-a15-pmu";
|
||||
/* clusterb-enabled; */
|
||||
interrupts = <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>;
|
||||
reg = <0xff634400 0x1000>;
|
||||
|
||||
/* addr = base + offset << 2 */
|
||||
sys_cpu_status0_offset = <0xa0>;
|
||||
|
||||
sys_cpu_status0_pmuirq_mask = <0xf>;
|
||||
|
||||
reg = <0xff634680 0x4>;
|
||||
cpumasks = <0xf>;
|
||||
/* default 10ms */
|
||||
relax_timer_ns = <10000000>;
|
||||
|
||||
relax-timer-ns = <10000000>;
|
||||
/* default 10000us */
|
||||
max_wait_cnt = <10000>;
|
||||
max-wait-cnt = <10000>;
|
||||
};
|
||||
|
||||
gic: interrupt-controller@2c001000 {
|
||||
@@ -181,17 +208,6 @@
|
||||
method = "smc";
|
||||
};
|
||||
|
||||
scpi_clocks {
|
||||
compatible = "arm, scpi-clks";
|
||||
|
||||
scpi_dvfs: scpi_clocks@0 {
|
||||
compatible = "arm, scpi-clk-indexed";
|
||||
#clock-cells = <1>;
|
||||
clock-indices = <0>;
|
||||
clock-output-names = "vcpu";
|
||||
};
|
||||
};
|
||||
|
||||
secmon {
|
||||
compatible = "amlogic, secmon";
|
||||
memory-region = <&secmon_reserved>;
|
||||
@@ -200,6 +216,12 @@
|
||||
reserve_mem_size = <0x00300000>;
|
||||
};
|
||||
|
||||
pixel_probe: pixel_probe {
|
||||
compatible = "amlogic, pixel_probe";
|
||||
vpp_probe_func = <0x820000f1>;
|
||||
vdin_probe_func = <0x820000f2>;
|
||||
};
|
||||
|
||||
securitykey {
|
||||
compatible = "amlogic, securitykey";
|
||||
status = "okay";
|
||||
@@ -267,6 +289,16 @@
|
||||
device_name = "aml_pm";
|
||||
debug_reg = <0xff8000a8>;
|
||||
exit_reg = <0xff80023c>;
|
||||
dmc_asr = <0xff638634>;
|
||||
cpu_reg = <0xff63c19c>;
|
||||
clocks = <&clkc CLKID_SWITCH_CLK81>,
|
||||
<&clkc CLKID_CLK81>,
|
||||
<&clkc CLKID_FIXED_PLL>,
|
||||
<&xtal>;
|
||||
clock-names = "switch_clk81",
|
||||
"clk81",
|
||||
"fixed_pll",
|
||||
"xtal";
|
||||
};
|
||||
|
||||
cpuinfo {
|
||||
@@ -275,15 +307,27 @@
|
||||
cpuinfo_cmd = <0x82000044>;
|
||||
};
|
||||
|
||||
rtc{
|
||||
compatible = "amlogic, aml_vrtc";
|
||||
alarm_reg_addr = <0xff8000a8>;
|
||||
timer_e_addr = <0xffd0f188>;
|
||||
init_date = "2018/01/01";
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
reboot {
|
||||
compatible = "amlogic,reboot";
|
||||
sys_reset = <0x84000009>;
|
||||
sys_poweroff = <0x84000008>;
|
||||
reboot_reason_addr = <0xff80023c>;
|
||||
};
|
||||
|
||||
ram-dump {
|
||||
compatible = "amlogic, ram_dump";
|
||||
status = "okay";
|
||||
reg = <0xFF6345E0 4>;
|
||||
reg-names = "PREG_STICKY_REG8";
|
||||
store_device = "data";
|
||||
};
|
||||
|
||||
securitykey {
|
||||
@@ -489,8 +533,14 @@
|
||||
};
|
||||
|
||||
wdt: watchdog@0xffd0f0d0 {
|
||||
compatible = "amlogic,meson-tl1-wdt";
|
||||
compatible = "amlogic, meson-wdt";
|
||||
status = "okay";
|
||||
default_timeout=<10>;
|
||||
reset_watchdog_method=<1>; /* 0:sysfs,1:kernel */
|
||||
reset_watchdog_time=<2>;
|
||||
shutdown_timeout=<10>;
|
||||
firmware_timeout=<6>;
|
||||
suspend_timeout=<6>;
|
||||
reg = <0xffd0f0d0 0x10>;
|
||||
clock-names = "xtal";
|
||||
clocks = <&xtal>;
|
||||
@@ -498,16 +548,10 @@
|
||||
|
||||
jtag {
|
||||
compatible = "amlogic, jtag";
|
||||
status = "disabled";
|
||||
select = "apao"; /* disable/apao/apee */
|
||||
jtagao-gpios = <&gpio_ao GPIOAO_6 0
|
||||
&gpio_ao GPIOAO_7 0
|
||||
&gpio_ao GPIOAO_8 0
|
||||
&gpio_ao GPIOAO_9 0>;
|
||||
jtagee-gpios = <&gpio GPIOC_0 0
|
||||
&gpio GPIOC_1 0
|
||||
&gpio GPIOC_4 0
|
||||
&gpio GPIOC_5 0>;
|
||||
status = "okay";
|
||||
select = "disable"; /* disable/apao */
|
||||
pinctrl-names="jtag_apao_pins";
|
||||
pinctrl-0=<&jtag_apao_pins>;
|
||||
};
|
||||
|
||||
saradc:saradc {
|
||||
@@ -522,44 +566,50 @@
|
||||
|
||||
vddcpu0: pwmao_d-regulator {
|
||||
compatible = "pwm-regulator";
|
||||
pwms = <&pwm_AO_cd MESON_PWM_1 1250 0>;
|
||||
pwms = <&pwm_AO_cd MESON_PWM_1 1500 0>;
|
||||
regulator-name = "vddcpu0";
|
||||
regulator-min-microvolt = <721000>;
|
||||
regulator-max-microvolt = <1021000>;
|
||||
regulator-min-microvolt = <689000>;
|
||||
regulator-max-microvolt = <1049000>;
|
||||
regulator-always-on;
|
||||
max-duty-cycle = <1250>;
|
||||
max-duty-cycle = <1500>;
|
||||
/* Voltage Duty-Cycle */
|
||||
voltage-table = <1021000 0>,
|
||||
<1011000 3>,
|
||||
<1001000 6>,
|
||||
<991000 10>,
|
||||
<981000 13>,
|
||||
<971000 16>,
|
||||
<961000 20>,
|
||||
<951000 23>,
|
||||
<941000 26>,
|
||||
<931000 30>,
|
||||
<921000 33>,
|
||||
<911000 36>,
|
||||
<901000 40>,
|
||||
<891000 43>,
|
||||
<881000 46>,
|
||||
<871000 50>,
|
||||
<861000 53>,
|
||||
<851000 56>,
|
||||
<841000 60>,
|
||||
<831000 63>,
|
||||
<821000 67>,
|
||||
<811000 70>,
|
||||
<801000 73>,
|
||||
<791000 76>,
|
||||
<781000 80>,
|
||||
<771000 83>,
|
||||
<761000 86>,
|
||||
<751000 90>,
|
||||
<741000 93>,
|
||||
<731000 96>,
|
||||
<721000 100>;
|
||||
voltage-table = <1049000 0>,
|
||||
<1039000 3>,
|
||||
<1029000 6>,
|
||||
<1019000 8>,
|
||||
<1009000 11>,
|
||||
<999000 14>,
|
||||
<989000 17>,
|
||||
<979000 20>,
|
||||
<969000 23>,
|
||||
<959000 26>,
|
||||
<949000 29>,
|
||||
<939000 31>,
|
||||
<929000 34>,
|
||||
<919000 37>,
|
||||
<909000 40>,
|
||||
<899000 43>,
|
||||
<889000 45>,
|
||||
<879000 48>,
|
||||
<869000 51>,
|
||||
<859000 54>,
|
||||
<849000 56>,
|
||||
<839000 59>,
|
||||
<829000 62>,
|
||||
<819000 65>,
|
||||
<809000 68>,
|
||||
<799000 70>,
|
||||
<789000 73>,
|
||||
<779000 76>,
|
||||
<769000 79>,
|
||||
<759000 81>,
|
||||
<749000 84>,
|
||||
<739000 87>,
|
||||
<729000 89>,
|
||||
<719000 92>,
|
||||
<709000 95>,
|
||||
<699000 98>,
|
||||
<689000 100>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
@@ -606,6 +656,7 @@
|
||||
clkc: clock-controller@0 {
|
||||
compatible = "amlogic,tl1-clkc";
|
||||
#clock-cells = <1>;
|
||||
#reset-cells = <1>;
|
||||
reg = <0x0 0x3fc>;
|
||||
};
|
||||
};/* end of hiubus*/
|
||||
@@ -903,11 +954,12 @@
|
||||
max_frame_time = <200>;
|
||||
};
|
||||
|
||||
meson_irblaster: irblaster@14c {
|
||||
irblaster: meson-irblaster@14c {
|
||||
compatible = "amlogic, meson_irblaster";
|
||||
reg = <0x14c 0x10>,
|
||||
<0x40 0x4>;
|
||||
interrupts = <0 198 1>;
|
||||
#irblaster-cells = <2>;
|
||||
interrupts = <GIC_SPI 198 IRQ_TYPE_EDGE_RISING>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
@@ -1134,7 +1186,7 @@
|
||||
};
|
||||
|
||||
sd_emmc_c: emmc@ffe07000 {
|
||||
status = "okay";
|
||||
status = "disabled";
|
||||
compatible = "amlogic, meson-mmc-tl1";
|
||||
reg = <0xffe07000 0x800>;
|
||||
interrupts = <0 191 1>;
|
||||
@@ -1172,57 +1224,28 @@
|
||||
};
|
||||
};
|
||||
|
||||
sd_emmc_b: sd@ffe05000 {
|
||||
status = "okay";
|
||||
compatible = "amlogic, meson-mmc-tl1";
|
||||
reg = <0xffe05000 0x800>;
|
||||
interrupts = <0 190 1>;
|
||||
|
||||
pinctrl-names = "sd_all_pins",
|
||||
"sd_clk_cmd_pins",
|
||||
"sd_1bit_pins",
|
||||
"sd_clk_cmd_uart_pins",
|
||||
"sd_1bit_uart_pins",
|
||||
"sd_to_ao_uart_pins",
|
||||
"ao_to_sd_uart_pins",
|
||||
"sd_to_ao_jtag_pins",
|
||||
"ao_to_sd_jtag_pins";
|
||||
pinctrl-0 = <&sd_all_pins>;
|
||||
pinctrl-1 = <&sd_clk_cmd_pins>;
|
||||
pinctrl-2 = <&sd_1bit_pins>;
|
||||
pinctrl-3 = <&sd_to_ao_uart_clr_pins
|
||||
&sd_clk_cmd_pins &ao_to_sd_uart_pins>;
|
||||
pinctrl-4 = <&sd_to_ao_uart_clr_pins
|
||||
&sd_1bit_pins &ao_to_sd_uart_pins>;
|
||||
pinctrl-5 = <&sd_all_pins &sd_to_ao_uart_pins>;
|
||||
pinctrl-6 = <&sd_to_ao_uart_clr_pins &ao_to_sd_uart_pins>;
|
||||
pinctrl-7 = <&sd_all_pins &sd_to_ao_uart_pins>;
|
||||
pinctrl-8 = <&sd_to_ao_uart_clr_pins &ao_to_sd_uart_pins>;
|
||||
|
||||
clocks = <&clkc CLKID_SD_EMMC_B>,
|
||||
<&clkc CLKID_SD_EMMC_B_P0_COMP>,
|
||||
<&clkc CLKID_FCLK_DIV2>,
|
||||
<&clkc CLKID_FCLK_DIV5>,
|
||||
<&xtal>;
|
||||
clock-names = "core", "clkin0", "clkin1", "clkin2", "xtal";
|
||||
|
||||
bus-width = <4>;
|
||||
cap-sd-highspeed;
|
||||
cap-mmc-highspeed;
|
||||
max-frequency = <100000000>;
|
||||
disable-wp;
|
||||
sd {
|
||||
pinname = "sd";
|
||||
ocr_avail = <0x200080>; /**VDD voltage 3.3 ~ 3.4 */
|
||||
max_req_size = <0x20000>; /**128KB*/
|
||||
gpio_dat3 = <&gpio GPIOC_3 GPIO_ACTIVE_HIGH>;
|
||||
jtag_pin = <&gpio GPIOC_0 GPIO_ACTIVE_HIGH>;
|
||||
gpio_cd = <&gpio GPIOC_6 GPIO_ACTIVE_HIGH>;
|
||||
card_type = <5>;
|
||||
/* 3:sdio device(ie:sdio-wifi),
|
||||
* 4:SD combo (IO+mem) card
|
||||
*/
|
||||
};
|
||||
spicc_a: spicc@ffd13000 {
|
||||
compatible = "amlogic, spicc";
|
||||
status = "disabled";
|
||||
device_id = <0>;
|
||||
reg = <0xffd13000 0x3c>;
|
||||
clocks = <&clkc CLKID_SPICC0>,
|
||||
<&clkc CLKID_SPICC0_COMP>;
|
||||
clock-names = "cts_spicc_hclk", "spicc_clk";
|
||||
clk_rate = <400000000>;
|
||||
//interrupts = <0 81 1>;
|
||||
enhance = <1>;
|
||||
dma_tx_threshold = <3>;
|
||||
dma_rx_threshold = <3>;
|
||||
dma_num_per_read_burst = <3>;
|
||||
dma_num_per_write_burst = <3>;
|
||||
ssctl = <0>;
|
||||
dma_en = <0>;
|
||||
delay_control = <0x15>;
|
||||
cs_delay = <10>;
|
||||
enhance_dlyctl = <0>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
};
|
||||
|
||||
spifc: spifc@ffd14000 {
|
||||
@@ -1278,6 +1301,7 @@
|
||||
clocks = <&clkc CLKID_U_PARSER
|
||||
&clkc CLKID_DEMUX
|
||||
&clkc CLKID_AHB_ARB0
|
||||
&clkc CLKID_CLK81
|
||||
&clkc CLKID_DOS
|
||||
&clkc CLKID_VDEC_MUX
|
||||
&clkc CLKID_HCODEC_MUX
|
||||
@@ -1286,6 +1310,7 @@
|
||||
clock-names = "parser_top",
|
||||
"demux",
|
||||
"ahbarb0",
|
||||
"clk_81",
|
||||
"vdec",
|
||||
"clk_vdec_mux",
|
||||
"clk_hcodec_mux",
|
||||
@@ -1411,6 +1436,15 @@
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
ddr_bandwidth {
|
||||
compatible = "amlogic, ddr-bandwidth";
|
||||
status = "okay";
|
||||
reg = <0xff638000 0x100
|
||||
0xff638c00 0x100>;
|
||||
interrupts = <0 52 1>;
|
||||
interrupt-names = "ddr_bandwidth";
|
||||
};
|
||||
|
||||
dmc_monitor {
|
||||
compatible = "amlogic, dmc_monitor";
|
||||
status = "okay";
|
||||
@@ -1456,6 +1490,18 @@
|
||||
size = <16>;
|
||||
};
|
||||
};
|
||||
|
||||
audio_data: audio_data {
|
||||
compatible = "amlogic, audio_data";
|
||||
query_licence_cmd = <0x82000050>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
defendkey: defendkey {
|
||||
compatible = "amlogic, defendkey";
|
||||
mem_size = <0 0x100000>;
|
||||
status = "okay";
|
||||
};
|
||||
}; /* end of / */
|
||||
|
||||
&pinctrl_aobus {
|
||||
@@ -1642,6 +1688,16 @@
|
||||
function = "remote_out_ao";
|
||||
};
|
||||
};
|
||||
|
||||
jtag_apao_pins:jtag_apao_pin {
|
||||
mux {
|
||||
groups = "jtag_a_tdi",
|
||||
"jtag_a_tdo",
|
||||
"jtag_a_clk",
|
||||
"jtag_a_tms";
|
||||
function = "jtag_a";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&pinctrl_periphs {
|
||||
@@ -1653,7 +1709,7 @@
|
||||
function = "emmc";
|
||||
input-enable;
|
||||
bias-pull-up;
|
||||
drive-strength = <3>;
|
||||
drive-strength = <2>;
|
||||
};
|
||||
};
|
||||
|
||||
@@ -1672,7 +1728,7 @@
|
||||
function = "emmc";
|
||||
input-enable;
|
||||
bias-pull-up;
|
||||
drive-strength = <3>;
|
||||
drive-strength = <2>;
|
||||
};
|
||||
};
|
||||
|
||||
@@ -1682,7 +1738,7 @@
|
||||
function = "emmc";
|
||||
input-enable;
|
||||
bias-pull-down;
|
||||
drive-strength = <3>;
|
||||
drive-strength = <2>;
|
||||
};
|
||||
};
|
||||
|
||||
@@ -1727,9 +1783,7 @@
|
||||
|
||||
ao_to_sd_uart_pins: ao_to_sd_uart_pins {
|
||||
mux {
|
||||
groups = "uart_ao_a_rx_c",
|
||||
"uart_ao_a_tx_c",
|
||||
"uart_ao_a_rx_w3",
|
||||
groups ="uart_ao_a_rx_w3",
|
||||
"uart_ao_a_tx_w2",
|
||||
"uart_ao_a_rx_w7",
|
||||
"uart_ao_a_tx_w6",
|
||||
@@ -1770,12 +1824,12 @@
|
||||
};
|
||||
};
|
||||
|
||||
/* sdemmc portA */
|
||||
/* sdemmc port */
|
||||
sdio_clk_cmd_pins: sdio_clk_cmd_pins {
|
||||
mux {
|
||||
groups = "sdio_clk",
|
||||
"sdio_cmd";
|
||||
function = "sdio";
|
||||
groups = "sdcard_clk",
|
||||
"sdcard_cmd";
|
||||
function = "sdcard";
|
||||
input-enable;
|
||||
bias-pull-up;
|
||||
drive-strength = <3>;
|
||||
@@ -1784,13 +1838,13 @@
|
||||
|
||||
sdio_all_pins: sdio_all_pins {
|
||||
mux {
|
||||
groups = "sdio_d0",
|
||||
"sdio_d1",
|
||||
"sdio_d2",
|
||||
"sdio_d3",
|
||||
"sdio_clk",
|
||||
"sdio_cmd";
|
||||
function = "sdio";
|
||||
groups = "sdcard_d0",
|
||||
"sdcard_d1",
|
||||
"sdcard_d2",
|
||||
"sdcard_d3",
|
||||
"sdcard_clk",
|
||||
"sdcard_cmd";
|
||||
function = "sdcard";
|
||||
input-enable;
|
||||
bias-pull-up;
|
||||
drive-strength = <3>;
|
||||
@@ -2026,7 +2080,7 @@
|
||||
"spi0_miso_h",
|
||||
"spi0_clk_h";
|
||||
function = "spi0";
|
||||
drive-strength = <1>;
|
||||
drive-strength = <3>;
|
||||
};
|
||||
};
|
||||
|
||||
@@ -2050,8 +2104,8 @@
|
||||
|
||||
internal_gpio_pins: internal_gpio_pins {
|
||||
mux {
|
||||
groups = "GPIOZ_14",
|
||||
"GPIOZ_15";
|
||||
groups = "GPIOH_0",
|
||||
"GPIOH_1";
|
||||
function = "gpio_periphs";
|
||||
bias-disable;
|
||||
input-enable;
|
||||
@@ -2105,4 +2159,65 @@
|
||||
};
|
||||
};
|
||||
|
||||
atvdemod_agc_pins: atvdemod_agc_pins {
|
||||
mux {
|
||||
groups = "atv_if_agc_dv";
|
||||
function = "atv";
|
||||
};
|
||||
};
|
||||
|
||||
dtvdemod_agc_pins: dtvdemod_agc_pins {
|
||||
mux {
|
||||
groups = "dtv_if_agc_dv2";
|
||||
function = "dtv";
|
||||
};
|
||||
};
|
||||
|
||||
lcd_vbyone_pins: lcd_vbyone_pin {
|
||||
mux {
|
||||
groups = "vx1_lockn","vx1_htpdn";
|
||||
function = "vx1";
|
||||
};
|
||||
};
|
||||
|
||||
lcd_vbyone_off_pins: lcd_vbyone_off_pin {
|
||||
mux {
|
||||
groups = "GPIOH_15","GPIOH_16";
|
||||
function = "gpio_periphs";
|
||||
input-enable;
|
||||
};
|
||||
};
|
||||
|
||||
lcd_tcon_pins: lcd_tcon_pin {
|
||||
mux {
|
||||
groups = "tcon_0","tcon_1","tcon_2","tcon_3",
|
||||
"tcon_4","tcon_5","tcon_6","tcon_7",
|
||||
"tcon_8","tcon_9","tcon_10","tcon_11",
|
||||
"tcon_12","tcon_13","tcon_14","tcon_15",
|
||||
"tcon_lock","tcon_spi_mo","tcon_spi_mi",
|
||||
"tcon_spi_clk","tcon_spi_ss";
|
||||
function = "tcon";
|
||||
};
|
||||
};
|
||||
lcd_tcon_off_pins: lcd_tcon_off_pin {
|
||||
mux {
|
||||
groups = "GPIOH_0","GPIOH_1","GPIOH_2","GPIOH_3",
|
||||
"GPIOH_4","GPIOH_5","GPIOH_6","GPIOH_7",
|
||||
"GPIOH_8","GPIOH_9","GPIOH_10","GPIOH_11",
|
||||
"GPIOH_12","GPIOH_13","GPIOH_14","GPIOH_15",
|
||||
"GPIOH_16","GPIOH_17","GPIOH_18","GPIOH_19",
|
||||
"GPIOH_20";
|
||||
function = "gpio_periphs";
|
||||
input-enable;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&gpu{
|
||||
tbl = <&dvfs285_cfg
|
||||
&dvfs400_cfg
|
||||
&dvfs500_cfg
|
||||
&dvfs666_cfg
|
||||
&dvfs800_cfg
|
||||
&dvfs800_cfg>;
|
||||
};
|
||||
|
||||
211
arch/arm/boot/dts/amlogic/mesontl1_drm.dtsi
Normal file
211
arch/arm/boot/dts/amlogic/mesontl1_drm.dtsi
Normal file
@@ -0,0 +1,211 @@
|
||||
/*
|
||||
* arch/arm/boot/dts/amlogic/meson_drm.dtsi
|
||||
*
|
||||
* Copyright (C) 2015 Amlogic, Inc. All rights reserved.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful, but WITHOUT
|
||||
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
||||
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
||||
* more details.
|
||||
*
|
||||
*/
|
||||
#include <dt-bindings/display/meson-drm-ids.h>
|
||||
|
||||
/ {
|
||||
venc-cvbs {
|
||||
status = "okay";
|
||||
compatible = "amlogic, meson-tl1-cvbs";
|
||||
|
||||
ports {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
enc_cvbs_in: port@0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
reg = <0>;
|
||||
|
||||
//venc_cvbs_in_vpu: endpoint@0 {
|
||||
// reg = <0>;
|
||||
// remote-endpoint = <&vpu_out_venc_cvbs>;
|
||||
//};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
drm_amhdmitx: drm-amhdmitx {
|
||||
status = "disabled";
|
||||
hdcp = "disabled";
|
||||
compatible = "amlogic,drm-amhdmitx";
|
||||
dev_name = "meson-amhdmitx";
|
||||
interrupts = <GIC_SPI 3 IRQ_TYPE_EDGE_RISING>;
|
||||
ports {
|
||||
port {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
hdmi_in_vpu: endpoint@0 {
|
||||
reg = <0>;
|
||||
remote-endpoint = <&vpu_out_hdmi>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
drm_lcd: drm-lcd {
|
||||
status = "disabled";
|
||||
compatible = "amlogic,drm-lcd";
|
||||
dev_name = "meson-lcd";
|
||||
ports {
|
||||
port {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
lcd_in_vpu: endpoint@0 {
|
||||
reg = <0>;
|
||||
remote-endpoint = <&vpu_out_lcd>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
drm_vpu: drm-vpu@0xff900000 {
|
||||
status = "disabled";
|
||||
compatible = "amlogic, meson-tl1-vpu";
|
||||
memory-region = <&logo_reserved>;
|
||||
reg = <0xff900000 0x40000>,
|
||||
<0xff63c000 0x2000>,
|
||||
<0xff638000 0x2000>;
|
||||
reg-names = "base", "hhi", "dmc";
|
||||
interrupts = <GIC_SPI 3 IRQ_TYPE_EDGE_RISING>,
|
||||
<GIC_SPI 56 IRQ_TYPE_EDGE_RISING>;
|
||||
interrupt-names = "viu-vsync", "viu2-vsync";
|
||||
clocks = <&clkc CLKID_VPU_CLKC_MUX>;
|
||||
clock-names = "vpu_clkc";
|
||||
dma-coherent;
|
||||
vpu_out: port {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
vpu_out_hdmi: endpoint@0 {
|
||||
reg = <0>;
|
||||
remote-endpoint = <&hdmi_in_vpu>;
|
||||
};
|
||||
vpu_out_lcd: endpoint@1 {
|
||||
reg = <1>;
|
||||
remote-endpoint = <&lcd_in_vpu>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
drm_subsystem: drm-subsystem {
|
||||
status = "okay";
|
||||
compatible = "amlogic,drm-subsystem";
|
||||
ports = <&vpu_out>;
|
||||
|
||||
vpu_topology: vpu_topology {
|
||||
vpu_blocks {
|
||||
osd1_block: block@0 {
|
||||
id = /bits/ 8 <OSD1_BLOCK>;
|
||||
index = /bits/ 8 <0>;
|
||||
type = /bits/ 8 <0>;
|
||||
block_name = "osd1_block";
|
||||
num_in_links = /bits/ 8 <0x0>;
|
||||
num_out_links = /bits/ 8 <0x1>;
|
||||
out_links = <0 &afbc_osd1_block>;
|
||||
};
|
||||
osd2_block: block@1 {
|
||||
id = /bits/ 8 <OSD2_BLOCK>;
|
||||
index = /bits/ 8 <1>;
|
||||
type = /bits/ 8 <0>;
|
||||
block_name = "osd2_block";
|
||||
num_in_links = /bits/ 8 <0x0>;
|
||||
num_out_links = /bits/ 8 <0x1>;
|
||||
out_links = <0 &afbc_osd2_block>;
|
||||
};
|
||||
afbc_osd1_block: block@3 {
|
||||
id = /bits/ 8 <AFBC_OSD1_BLOCK>;
|
||||
index = /bits/ 8 <0>;
|
||||
type = /bits/ 8 <1>;
|
||||
block_name = "afbc_osd1_block";
|
||||
num_in_links = /bits/ 8 <0x1>;
|
||||
in_links = <0 &osd1_block>;
|
||||
num_out_links = /bits/ 8 <0x1>;
|
||||
out_links = <0 &osd_blend_block>;
|
||||
};
|
||||
afbc_osd2_block: block@4 {
|
||||
id = /bits/ 8 <AFBC_OSD2_BLOCK>;
|
||||
index = /bits/ 8 <1>;
|
||||
type = /bits/ 8 <1>;
|
||||
block_name = "afbc_osd2_block";
|
||||
num_in_links = /bits/ 8 <0x1>;
|
||||
in_links = <0 &osd2_block>;
|
||||
num_out_links = /bits/ 8 <0x1>;
|
||||
out_links = <0 &scaler_osd2_block>;
|
||||
};
|
||||
scaler_osd1_block: block@6 {
|
||||
id = /bits/ 8 <SCALER_OSD1_BLOCK>;
|
||||
index = /bits/ 8 <0>;
|
||||
type = /bits/ 8 <2>;
|
||||
block_name = "scaler_osd1_block";
|
||||
num_in_links = /bits/ 8 <0x1>;
|
||||
in_links = <0 &osd1_hdr_dolby_block>;
|
||||
num_out_links = /bits/ 8 <0x1>;
|
||||
out_links = <0 &vpp_postblend_block>;
|
||||
};
|
||||
scaler_osd2_block: block@7 {
|
||||
id = /bits/ 8 <SCALER_OSD2_BLOCK>;
|
||||
index = /bits/ 8 <1>;
|
||||
type = /bits/ 8 <2>;
|
||||
block_name = "scaler_osd2_block";
|
||||
num_in_links = /bits/ 8 <0x1>;
|
||||
in_links = <0 &afbc_osd2_block>;
|
||||
num_out_links = /bits/ 8 <0x1>;
|
||||
out_links = <2 &osd_blend_block>;
|
||||
};
|
||||
osd_blend_block: block@9 {
|
||||
id = /bits/ 8 <OSD_BLEND_BLOCK>;
|
||||
block_name = "osd_blend_block";
|
||||
type = /bits/ 8 <3>;
|
||||
num_in_links = /bits/ 8 <0x2>;
|
||||
in_links = <0 &afbc_osd1_block>,
|
||||
<0 &scaler_osd2_block>;
|
||||
num_out_links = /bits/ 8 <0x2>;
|
||||
out_links = <0 &osd1_hdr_dolby_block>,
|
||||
<1 &vpp_postblend_block>;
|
||||
};
|
||||
osd1_hdr_dolby_block: block@10 {
|
||||
id = /bits/ 8 <OSD1_HDR_BLOCK>;
|
||||
block_name = "osd1_hdr_dolby_block";
|
||||
type = /bits/ 8 <4>;
|
||||
num_in_links = /bits/ 8 <0x1>;
|
||||
in_links = <0 &osd_blend_block>;
|
||||
num_out_links = /bits/ 8 <0x1>;
|
||||
out_links = <0 &scaler_osd1_block>;
|
||||
};
|
||||
vpp_postblend_block: block@12 {
|
||||
id = /bits/ 8 <VPP_POSTBLEND_BLOCK>;
|
||||
block_name = "vpp_postblend_block";
|
||||
type = /bits/ 8 <6>;
|
||||
num_in_links = /bits/ 8 <0x2>;
|
||||
in_links = <0 &scaler_osd1_block>,
|
||||
<1 &osd_blend_block>;
|
||||
num_out_links = <0x0>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
vpu_hw_para: vpu_hw_para@0 {
|
||||
osd_ver = /bits/ 8 <0x2>;
|
||||
afbc_type = /bits/ 8 <0x2>;
|
||||
has_deband = /bits/ 8 <0x1>;
|
||||
has_lut = /bits/ 8 <0x1>;
|
||||
has_rdma = /bits/ 8 <0x1>;
|
||||
osd_fifo_len = /bits/ 8 <64>;
|
||||
vpp_fifo_len = /bits/ 32 <0xfff>;
|
||||
};
|
||||
};
|
||||
};
|
||||
@@ -1,92 +0,0 @@
|
||||
/*
|
||||
* arch/arm64/boot/dts/amlogic/mesontl1_pxp-panel.dtsi
|
||||
*
|
||||
* Copyright (C) 2016 Amlogic, Inc. All rights reserved.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful, but WITHOUT
|
||||
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
||||
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
||||
* more details.
|
||||
*
|
||||
*/
|
||||
|
||||
/ {
|
||||
lcd {
|
||||
compatible = "amlogic, lcd-tl1";
|
||||
status = "okay";
|
||||
mode = "tv";
|
||||
fr_auto_policy = <0>; /* 0=disable, 1=60/50hz, 2=60/50/48hz */
|
||||
key_valid = <0>;
|
||||
clocks = <&clkc CLKID_VCLK2_ENCL
|
||||
&clkc CLKID_VCLK2_VENCL
|
||||
&clkc CLKID_TCON
|
||||
&clkc CLKID_FCLK_DIV5
|
||||
&clkc CLKID_TCON_PLL_COMP>;
|
||||
clock-names = "encl_top_gate",
|
||||
"encl_int_gate",
|
||||
"tcon_gate",
|
||||
"fclk_div5",
|
||||
"clk_tcon";
|
||||
reg = <0xff660000 0x8100
|
||||
0xff634400 0x100>;
|
||||
interrupts = <0 3 1
|
||||
0 78 1
|
||||
0 88 1>;
|
||||
interrupt-names = "vsync","vbyone","tcon";
|
||||
pinctrl_version = <2>; /* for uboot */
|
||||
|
||||
/* power type:(0=cpu_gpio, 2=signal, 3=extern, 0xff=ending) */
|
||||
/* power index:(gpios_index, or extern_index, 0xff=invalid) */
|
||||
/* power value:(0=output low, 1=output high, 2=input) */
|
||||
/* power delay:(unit in ms) */
|
||||
|
||||
lvds_0{
|
||||
model_name = "1080p-vfreq";
|
||||
interface = "lvds"; /*lcd_interface(lvds, vbyone)*/
|
||||
basic_setting = <
|
||||
1920 1080 /*h_active, v_active*/
|
||||
2200 1125 /*h_period, v_period*/
|
||||
8 /*lcd_bits */
|
||||
16 9>; /*screen_widht, screen_height*/
|
||||
range_setting = <
|
||||
2060 2650 /*h_period_min,max*/
|
||||
1100 1480 /*v_period_min,max*/
|
||||
120000000 160000000>; /*pclk_min,max*/
|
||||
lcd_timing = <
|
||||
44 148 0 /*hs_width, hs_bp, hs_pol*/
|
||||
5 30 0>; /*vs_width, vs_bp, vs_pol*/
|
||||
clk_attr = <
|
||||
2 /*fr_adj_type
|
||||
*(0=clk, 1=htotal, 2=vtotal, 3=auto_range,
|
||||
* 4=hdmi_mode)
|
||||
*/
|
||||
0 /*clk_ss_level*/
|
||||
1 /*clk_auto_generate*/
|
||||
0>; /*pixel_clk(unit in Hz)*/
|
||||
lvds_attr = <
|
||||
1 /*lvds_repack*/
|
||||
1 /*dual_port*/
|
||||
0 /*pn_swap*/
|
||||
0 /*port_swap*/
|
||||
0>; /*lane_reverse*/
|
||||
phy_attr=<
|
||||
3 0 /*vswing_level, preem_level*/
|
||||
0 0>; /*clk vswing_level, preem_level*/
|
||||
|
||||
/* power step: type, index, value, delay(ms) */
|
||||
power_on_step = <
|
||||
2 0 0 0 /*signal enable*/
|
||||
0xff 0 0 0>; /*ending*/
|
||||
power_off_step = <
|
||||
2 0 0 10 /*signal disable*/
|
||||
0xff 0 0 0>; /*ending*/
|
||||
backlight_index = <0xff>;
|
||||
};
|
||||
}; /* end of lcd */
|
||||
|
||||
}; /* end of / */
|
||||
591
arch/arm/boot/dts/amlogic/mesontl1_skt-panel.dtsi
Normal file
591
arch/arm/boot/dts/amlogic/mesontl1_skt-panel.dtsi
Normal file
@@ -0,0 +1,591 @@
|
||||
/*
|
||||
* arch/arm64/boot/dts/amlogic/mesontl1_skt-panel.dtsi
|
||||
*
|
||||
* Copyright (C) 2016 Amlogic, Inc. All rights reserved.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful, but WITHOUT
|
||||
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
||||
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
||||
* more details.
|
||||
*
|
||||
*/
|
||||
|
||||
/ {
|
||||
lcd {
|
||||
compatible = "amlogic, lcd-tl1";
|
||||
status = "okay";
|
||||
mode = "tv";
|
||||
fr_auto_policy = <0>; /* 0=disable, 1=60/50hz, 2=60/50/48hz */
|
||||
key_valid = <0>;
|
||||
clocks = <&clkc CLKID_VCLK2_ENCL
|
||||
&clkc CLKID_VCLK2_VENCL
|
||||
&clkc CLKID_TCON
|
||||
&clkc CLKID_FCLK_DIV5
|
||||
&clkc CLKID_TCON_PLL_COMP>;
|
||||
clock-names = "encl_top_gate",
|
||||
"encl_int_gate",
|
||||
"tcon_gate",
|
||||
"fclk_div5",
|
||||
"clk_tcon";
|
||||
reg = <0xff660000 0xd000
|
||||
0xff634400 0x300>;
|
||||
interrupts = <0 3 1
|
||||
0 78 1
|
||||
0 88 1>;
|
||||
interrupt-names = "vsync","vbyone","tcon";
|
||||
pinctrl-names = "vbyone","vbyone_off","tcon","tcon_off";
|
||||
pinctrl-0 = <&lcd_vbyone_pins>;
|
||||
pinctrl-1 = <&lcd_vbyone_off_pins>;
|
||||
pinctrl-2 = <&lcd_tcon_pins>;
|
||||
pinctrl-3 = <&lcd_tcon_off_pins>;
|
||||
pinctrl_version = <2>; /* for uboot */
|
||||
|
||||
/* power type:(0=cpu_gpio, 2=signal, 3=extern, 0xff=ending) */
|
||||
/* power index:(gpios_index, or extern_index, 0xff=invalid) */
|
||||
/* power value:(0=output low, 1=output high, 2=input) */
|
||||
/* power delay:(unit in ms) */
|
||||
|
||||
lvds_0{
|
||||
model_name = "1080p-vfreq";
|
||||
interface = "lvds"; /*lcd_interface(lvds, vbyone)*/
|
||||
basic_setting = <
|
||||
1920 1080 /*h_active, v_active*/
|
||||
2200 1125 /*h_period, v_period*/
|
||||
8 /*lcd_bits */
|
||||
16 9>; /*screen_widht, screen_height*/
|
||||
range_setting = <
|
||||
2060 2650 /*h_period_min,max*/
|
||||
1100 1480 /*v_period_min,max*/
|
||||
120000000 160000000>; /*pclk_min,max*/
|
||||
lcd_timing = <
|
||||
44 148 0 /*hs_width, hs_bp, hs_pol*/
|
||||
5 30 0>; /*vs_width, vs_bp, vs_pol*/
|
||||
clk_attr = <
|
||||
2 /*fr_adj_type
|
||||
*(0=clk, 1=htotal, 2=vtotal, 3=auto_range,
|
||||
* 4=hdmi_mode)
|
||||
*/
|
||||
0 /*clk_ss_level*/
|
||||
1 /*clk_auto_generate*/
|
||||
0>; /*pixel_clk(unit in Hz)*/
|
||||
lvds_attr = <
|
||||
1 /*lvds_repack*/
|
||||
1 /*dual_port*/
|
||||
0 /*pn_swap*/
|
||||
0 /*port_swap*/
|
||||
0>; /*lane_reverse*/
|
||||
phy_attr=<0xf 0>; /*vswing_level, preem_level*/
|
||||
|
||||
/* power step: type, index, value, delay(ms) */
|
||||
power_on_step = <
|
||||
2 0 0 0 /*signal enable*/
|
||||
0xff 0 0 0>; /*ending*/
|
||||
power_off_step = <
|
||||
2 0 0 10 /*signal disable*/
|
||||
0xff 0 0 0>; /*ending*/
|
||||
backlight_index = <0xff>;
|
||||
};
|
||||
lvds_1{
|
||||
model_name = "1080p-hfreq_hdmi";
|
||||
interface = "lvds"; /*lcd_interface(lvds, vbyone)*/
|
||||
basic_setting = <
|
||||
1920 1080 /*h_active, v_active*/
|
||||
2200 1125 /*h_period, v_period*/
|
||||
8 /*lcd_bits*/
|
||||
16 9>; /*screen_widht, screen_height*/
|
||||
range_setting = <
|
||||
2080 2720 /*h_period min, max*/
|
||||
1100 1380 /*v_period min, max*/
|
||||
133940000 156000000>; /*pclk_min, max*/
|
||||
lcd_timing = <
|
||||
44 148 0 /*hs_width, hs_bp, hs_pol*/
|
||||
5 30 0>; /*vs_width, vs_bp, vs_pol*/
|
||||
clk_attr = <
|
||||
4 /*fr_adj_type
|
||||
*(0=clk, 1=htotal, 2=vtotal, 3=auto_range,
|
||||
* 4=hdmi_mode)
|
||||
*/
|
||||
0 /*clk_ss_level */
|
||||
1 /*clk_auto_generate*/
|
||||
0>; /*pixel_clk(unit in Hz)*/
|
||||
lvds_attr = <
|
||||
1 /*lvds_repack*/
|
||||
1 /*dual_port*/
|
||||
0 /*pn_swap*/
|
||||
0 /*port_swap*/
|
||||
0>; /*lane_reverse*/
|
||||
phy_attr=<0xf 0>; /*vswing_level, preem_level*/
|
||||
|
||||
/* power step: type, index, value, delay(ms) */
|
||||
power_on_step = <
|
||||
2 0 0 0 /*signal enable*/
|
||||
0xff 0 0 0>; /*ending*/
|
||||
power_off_step = <
|
||||
2 0 0 10 /*signal disable*/
|
||||
0xff 0 0 0>; /*ending*/
|
||||
backlight_index = <0xff>;
|
||||
};
|
||||
vbyone_0{
|
||||
model_name = "public_2region";
|
||||
interface = "vbyone"; /*lcd_interface(lvds, vbyone)*/
|
||||
basic_setting = <
|
||||
3840 2160 /*h_active, v_active*/
|
||||
4400 2250 /*h_period, v_period*/
|
||||
10 /*lcd_bits */
|
||||
16 9>; /*screen_widht, screen_height*/
|
||||
range_setting = <
|
||||
4240 4800 /*h_period_min, max*/
|
||||
2200 2760 /*v_period_min, max*/
|
||||
480000000 624000000>; /*pclk_min, max*/
|
||||
lcd_timing = <
|
||||
33 477 0 /*hs_width, hs_bp, hs_pol*/
|
||||
6 65 0>; /*vs_width, vs_bp, vs_pol*/
|
||||
clk_attr = <
|
||||
2 /*fr_adj_type
|
||||
*(0=clk, 1=htotal, 2=vtotal, 3=auto_range,
|
||||
* 4=hdmi_mode)
|
||||
*/
|
||||
0 /*clk_ss_level*/
|
||||
1 /*clk_auto_generate*/
|
||||
0>; /*pixel_clk(unit in Hz)*/
|
||||
vbyone_attr = <
|
||||
8 /*lane_count*/
|
||||
2 /*region_num*/
|
||||
4 /*byte_mode*/
|
||||
4>; /*color_fmt*/
|
||||
vbyone_intr_enable = <
|
||||
1 /*vbyone_intr_enable */
|
||||
3>; /*vbyone_vsync_intr_enable*/
|
||||
phy_attr=<0xf 1>; /* vswing_level, preem_level */
|
||||
hw_filter=<0 0>; /* filter_time, filter_cnt*/
|
||||
|
||||
/* power step: type, index, value, delay(ms) */
|
||||
power_on_step = <
|
||||
2 0 0 10 /*signal enable*/
|
||||
0xff 0 0 0>; /*ending*/
|
||||
power_off_step = <
|
||||
2 0 0 10 /*signal disable*/
|
||||
0xff 0 0 0>; /*ending*/
|
||||
backlight_index = <0xff>;
|
||||
};
|
||||
vbyone_1{
|
||||
model_name = "public_1region";
|
||||
interface = "vbyone"; /*lcd_interface(lvds, vbyone)*/
|
||||
basic_setting = <
|
||||
3840 2160 /*h_active, v_active*/
|
||||
4400 2250 /*h_period, v_period*/
|
||||
10 /*lcd_bits*/
|
||||
16 9>; /*screen_widht, screen_height*/
|
||||
range_setting = <
|
||||
4240 4800 /*h_period_min, max*/
|
||||
2200 2790 /*v_period_min, max*/
|
||||
552000000 632000000>; /*pclk_min,max*/
|
||||
lcd_timing = <
|
||||
33 477 0 /*hs_width, hs_bp, hs_pol*/
|
||||
6 65 0>; /*vs_width, vs_bp, vs_pol*/
|
||||
clk_attr = <
|
||||
2 /*fr_adj_type
|
||||
*(0=clk, 1=htotal, 2=vtotal, 3=auto_range,
|
||||
* 4=hdmi_mode)
|
||||
*/
|
||||
0 /*clk_ss_level*/
|
||||
1 /*clk_auto_generate*/
|
||||
0>; /*pixel_clk(unit in Hz)*/
|
||||
vbyone_attr = <
|
||||
8 /*lane_count*/
|
||||
1 /*region_num*/
|
||||
4 /*byte_mode*/
|
||||
4>; /*color_fmt*/
|
||||
vbyone_intr_enable = <
|
||||
1 /*vbyone_intr_enable*/
|
||||
3>; /*vbyone_vsync_intr_enable*/
|
||||
phy_attr=<0xf 1>; /* vswing_level, preem_level */
|
||||
hw_filter=<0 0>; /* filter_time, filter_cnt*/
|
||||
|
||||
/* power step: type, index, value, delay(ms) */
|
||||
power_on_step = <
|
||||
2 0 0 10 /*signal enable*/
|
||||
0xff 0 0 0>; /*ending*/
|
||||
power_off_step = <
|
||||
2 0 0 10 /*signal disable*/
|
||||
0xff 0 0 0>; /*ending*/
|
||||
backlight_index = <0xff>;
|
||||
};
|
||||
p2p_0{
|
||||
model_name = "p2p_ceds";
|
||||
interface = "p2p"; /*lcd_interface
|
||||
*(lvds, vbyone, minilvds, p2p)
|
||||
*/
|
||||
basic_setting = <
|
||||
3840 2160 /*h_active, v_active*/
|
||||
5000 2250 /*h_period, v_period*/
|
||||
8 /*lcd_bits */
|
||||
16 9>; /*screen_widht, screen_height*/
|
||||
range_setting = <
|
||||
4240 5100 /*h_period_min, max*/
|
||||
2200 2760 /*v_period_min, max*/
|
||||
480000000 624000000>; /*pclk_min, max*/
|
||||
lcd_timing = <
|
||||
16 29 0 /*hs_width, hs_bp, hs_pol*/
|
||||
6 65 0>; /*vs_width, vs_bp, vs_pol*/
|
||||
clk_attr = <
|
||||
2 /*fr_adj_type
|
||||
*(0=clk, 1=htotal, 2=vtotal, 3=auto_range,
|
||||
* 4=hdmi_mode)
|
||||
*/
|
||||
0 /*clk_ss_level*/
|
||||
1 /*clk_auto_generate*/
|
||||
0>; /*pixel_clk(unit in Hz)*/
|
||||
p2p_attr = <
|
||||
0x0 /* p2p_teyp:
|
||||
* 0x0=ceds, 0x1=cmpi, 0x2=isp, 0x3=epi,
|
||||
* 0x10=chpi, 0x11=cspi, 0x12=usit
|
||||
*/
|
||||
12 /* channel_num */
|
||||
0x76543210 /* channel_sel0 */
|
||||
0xba98 /* channel_sel1 */
|
||||
0 /* pn_swap */
|
||||
0>; /* bit_swap */
|
||||
phy_attr=<0xf 1>; /* vswing_level, preem_level */
|
||||
|
||||
/* power step: type, index, value, delay(ms) */
|
||||
power_on_step = <
|
||||
2 0 0 10 /*signal enable*/
|
||||
0xff 0 0 0>; /*ending*/
|
||||
power_off_step = <
|
||||
2 0 0 10 /*signal disable*/
|
||||
0xff 0 0 0>; /*ending*/
|
||||
backlight_index = <0xff>;
|
||||
};
|
||||
p2p_1{
|
||||
model_name = "p2p_ceds";
|
||||
interface = "p2p"; /*lcd_interface
|
||||
*(lvds, vbyone, minilvds, p2p)
|
||||
*/
|
||||
basic_setting = <
|
||||
3840 2160 /*h_active, v_active*/
|
||||
5000 2250 /*h_period, v_period*/
|
||||
8 /*lcd_bits */
|
||||
16 9>; /*screen_widht, screen_height*/
|
||||
range_setting = <
|
||||
4240 5100 /*h_period_min, max*/
|
||||
2200 2760 /*v_period_min, max*/
|
||||
480000000 624000000>; /*pclk_min, max*/
|
||||
lcd_timing = <
|
||||
16 29 0 /*hs_width, hs_bp, hs_pol*/
|
||||
6 65 0>; /*vs_width, vs_bp, vs_pol*/
|
||||
clk_attr = <
|
||||
2 /*fr_adj_type
|
||||
*(0=clk, 1=htotal, 2=vtotal, 3=auto_range,
|
||||
* 4=hdmi_mode)
|
||||
*/
|
||||
0 /*clk_ss_level*/
|
||||
1 /*clk_auto_generate*/
|
||||
0>; /*pixel_clk(unit in Hz)*/
|
||||
p2p_attr = <
|
||||
0x0 /* p2p_teyp:
|
||||
* 0x0=ceds, 0x1=cmpi, 0x2=isp, 0x3=epi,
|
||||
* 0x10=chpi, 0x11=cspi, 0x12=usit
|
||||
*/
|
||||
6 /* channel_num */
|
||||
0x76543210 /* channel_sel0 */
|
||||
0xba98 /* channel_sel1 */
|
||||
0 /* pn_swap */
|
||||
0>; /* bit_swap */
|
||||
phy_attr=<0xf 1>; /* vswing_level, preem_level */
|
||||
|
||||
/* power step: type, index, value, delay(ms) */
|
||||
power_on_step = <
|
||||
2 0 0 10 /*signal enable*/
|
||||
0xff 0 0 0>; /*ending*/
|
||||
power_off_step = <
|
||||
2 0 0 10 /*signal disable*/
|
||||
0xff 0 0 0>; /*ending*/
|
||||
backlight_index = <0xff>;
|
||||
};
|
||||
p2p_2{
|
||||
model_name = "p2p_chpi";
|
||||
interface = "p2p"; /*lcd_interface
|
||||
*(lvds, vbyone, minilvds, p2p)
|
||||
*/
|
||||
basic_setting = <
|
||||
3840 2160 /*h_active, v_active*/
|
||||
4400 2250 /*h_period, v_period*/
|
||||
8 /*lcd_bits */
|
||||
16 9>; /*screen_widht, screen_height*/
|
||||
range_setting = <
|
||||
4240 5100 /*h_period_min, max*/
|
||||
2200 2760 /*v_period_min, max*/
|
||||
480000000 624000000>; /*pclk_min, max*/
|
||||
lcd_timing = <
|
||||
16 29 0 /*hs_width, hs_bp, hs_pol*/
|
||||
6 65 0>; /*vs_width, vs_bp, vs_pol*/
|
||||
clk_attr = <
|
||||
2 /*fr_adj_type
|
||||
*(0=clk, 1=htotal, 2=vtotal, 3=auto_range,
|
||||
* 4=hdmi_mode)
|
||||
*/
|
||||
0 /*clk_ss_level*/
|
||||
1 /*clk_auto_generate*/
|
||||
0>; /*pixel_clk(unit in Hz)*/
|
||||
p2p_attr = <
|
||||
0x10 /* p2p_teyp:
|
||||
* 0x0=ceds, 0x1=cmpi, 0x2=isp, 0x3=epi,
|
||||
* 0x10=chpi, 0x11=cspi, 0x12=usit
|
||||
*/
|
||||
6 /* channel_num */
|
||||
0x76543210 /* channel_sel0 */
|
||||
0xba98 /* channel_sel1 */
|
||||
0 /* pn_swap */
|
||||
0>; /* bit_swap */
|
||||
phy_attr=<0xf 1>; /* vswing_level, preem_level */
|
||||
|
||||
/* power step: type, index, value, delay(ms) */
|
||||
power_on_step = <
|
||||
2 0 0 10 /*signal enable*/
|
||||
0xff 0 0 0>; /*ending*/
|
||||
power_off_step = <
|
||||
2 0 0 10 /*signal disable*/
|
||||
0xff 0 0 0>; /*ending*/
|
||||
backlight_index = <0xff>;
|
||||
};
|
||||
p2p_3{
|
||||
model_name = "p2p_chpi";
|
||||
interface = "p2p"; /*lcd_interface
|
||||
*(lvds, vbyone, minilvds, p2p)
|
||||
*/
|
||||
basic_setting = <
|
||||
3840 2160 /*h_active, v_active*/
|
||||
4400 2250 /*h_period, v_period*/
|
||||
8 /*lcd_bits */
|
||||
16 9>; /*screen_widht, screen_height*/
|
||||
range_setting = <
|
||||
4240 5100 /*h_period_min, max*/
|
||||
2200 2760 /*v_period_min, max*/
|
||||
480000000 624000000>; /*pclk_min, max*/
|
||||
lcd_timing = <
|
||||
16 29 0 /*hs_width, hs_bp, hs_pol*/
|
||||
6 65 0>; /*vs_width, vs_bp, vs_pol*/
|
||||
clk_attr = <
|
||||
2 /*fr_adj_type
|
||||
*(0=clk, 1=htotal, 2=vtotal, 3=auto_range,
|
||||
* 4=hdmi_mode)
|
||||
*/
|
||||
0 /*clk_ss_level*/
|
||||
1 /*clk_auto_generate*/
|
||||
0>; /*pixel_clk(unit in Hz)*/
|
||||
p2p_attr = <
|
||||
0x10 /* p2p_teyp:
|
||||
* 0x0=ceds, 0x1=cmpi, 0x2=isp, 0x3=epi,
|
||||
* 0x10=chpi, 0x11=cspi, 0x12=usit
|
||||
*/
|
||||
12 /* channel_num */
|
||||
0x76543210 /* channel_sel0 */
|
||||
0xba98 /* channel_sel1 */
|
||||
0 /* pn_swap */
|
||||
0>; /* bit_swap */
|
||||
phy_attr=<0xf 1>; /* vswing_level, preem_level */
|
||||
|
||||
/* power step: type, index, value, delay(ms) */
|
||||
power_on_step = <
|
||||
2 0 0 10 /*signal enable*/
|
||||
0xff 0 0 0>; /*ending*/
|
||||
power_off_step = <
|
||||
2 0 0 10 /*signal disable*/
|
||||
0xff 0 0 0>; /*ending*/
|
||||
backlight_index = <0xff>;
|
||||
};
|
||||
mlvds_0{
|
||||
model_name = "mlvds_1080p";
|
||||
interface = "minilvds"; /*lcd_interface
|
||||
*(lvds, vbyone, minilvds, p2p)
|
||||
*/
|
||||
basic_setting = <
|
||||
1920 1080 /*h_active, v_active*/
|
||||
2200 1125 /*h_period, v_period*/
|
||||
8 /*lcd_bits */
|
||||
16 9>; /*screen_widht, screen_height*/
|
||||
range_setting = <
|
||||
2080 2720 /*h_period_min, max*/
|
||||
2200 1125 /*v_period_min, max*/
|
||||
133940000 156000000>; /*pclk_min, max*/
|
||||
lcd_timing = <
|
||||
44 148 0 /*hs_width, hs_bp, hs_pol*/
|
||||
5 30 0>; /*vs_width, vs_bp, vs_pol*/
|
||||
clk_attr = <
|
||||
2 /*fr_adj_type
|
||||
*(0=clk, 1=htotal, 2=vtotal, 3=auto_range,
|
||||
* 4=hdmi_mode)
|
||||
*/
|
||||
0 /*clk_ss_level*/
|
||||
1 /*clk_auto_generate*/
|
||||
0>; /*pixel_clk(unit in Hz)*/
|
||||
minilvds_attr = <
|
||||
6 /* channel_num */
|
||||
0x76543210 /* channel_sel0 */
|
||||
0xba98 /* channel_sel1 */
|
||||
0x660 /* clk_phase */
|
||||
0 /* pn_swap */
|
||||
0>; /* bit_swap */
|
||||
phy_attr=<0xf 0>; /* vswing_level, preem_level */
|
||||
|
||||
/* power step: type, index, value, delay(ms) */
|
||||
power_on_step = <
|
||||
2 0 0 10 /*signal enable*/
|
||||
0xff 0 0 0>; /*ending*/
|
||||
power_off_step = <
|
||||
2 0 0 10 /*signal disable*/
|
||||
0xff 0 0 0>; /*ending*/
|
||||
backlight_index = <0xff>;
|
||||
};
|
||||
mlvds_1{
|
||||
model_name = "mlvds_768p";
|
||||
interface = "minilvds"; /*lcd_interface
|
||||
*(lvds, vbyone, minilvds, p2p)
|
||||
*/
|
||||
basic_setting = <
|
||||
1366 768 /*h_active, v_active*/
|
||||
1560 806 /*h_period, v_period*/
|
||||
8 /*lcd_bits */
|
||||
16 9>; /*screen_widht, screen_height*/
|
||||
range_setting = <
|
||||
1460 2000 /*h_period_min, max*/
|
||||
784 1015 /*v_period_min, max*/
|
||||
50000000 85000000>; /*pclk_min, max*/
|
||||
lcd_timing = <
|
||||
56 64 0 /*hs_width, hs_bp, hs_pol*/
|
||||
3 28 0>; /*vs_width, vs_bp, vs_pol*/
|
||||
clk_attr = <
|
||||
2 /*fr_adj_type
|
||||
*(0=clk, 1=htotal, 2=vtotal, 3=auto_range,
|
||||
* 4=hdmi_mode)
|
||||
*/
|
||||
0 /*clk_ss_level*/
|
||||
1 /*clk_auto_generate*/
|
||||
0>; /*pixel_clk(unit in Hz)*/
|
||||
minilvds_attr = <
|
||||
6 /* channel_num */
|
||||
0x76543210 /* channel_sel0 */
|
||||
0xba98 /* channel_sel1 */
|
||||
0x660 /* clk_phase */
|
||||
0 /* pn_swap */
|
||||
0>; /* bit_swap */
|
||||
phy_attr=<0xf 0>; /* vswing_level, preem_level */
|
||||
|
||||
/* power step: type, index, value, delay(ms) */
|
||||
power_on_step = <
|
||||
2 0 0 10 /*signal enable*/
|
||||
0xff 0 0 0>; /*ending*/
|
||||
power_off_step = <
|
||||
2 0 0 10 /*signal disable*/
|
||||
0xff 0 0 0>; /*ending*/
|
||||
backlight_index = <0xff>;
|
||||
};
|
||||
};
|
||||
|
||||
lcd_extern{
|
||||
compatible = "amlogic, lcd_extern";
|
||||
status = "okay";
|
||||
key_valid = <0>;
|
||||
i2c_bus = "i2c_bus_1";
|
||||
|
||||
extern_0{
|
||||
index = <0>;
|
||||
extern_name = "ext_default";
|
||||
status = "disabled";
|
||||
type = <0>; /*0=i2c, 1=spi, 2=mipi*/
|
||||
i2c_address = <0x1c>; /*7bit i2c_addr*/
|
||||
i2c_address2 = <0xff>;
|
||||
cmd_size = <0xff>; /*dynamic cmd_size*/
|
||||
|
||||
/* init on/off:
|
||||
* fixed cmd_size: (type, value...);
|
||||
* cmd_size include all data.
|
||||
* dynamic cmd_size: (type, cmd_size, value...);
|
||||
* cmd_size include value.
|
||||
*/
|
||||
/* type: 0x00=cmd with delay(bit[3:0]=1 for address2),
|
||||
* 0xc0=cmd(bit[3:0]=1 for address2),
|
||||
* 0xf0=gpio,
|
||||
* 0xfd=delay,
|
||||
* 0xff=ending
|
||||
*/
|
||||
/* value: i2c or spi cmd, or gpio index & level */
|
||||
/* delay: unit ms */
|
||||
init_on = <
|
||||
0xc0 7 0x20 0x01 0x02 0x00 0x40 0xFF 0x00
|
||||
0xc0 7 0x80 0x02 0x00 0x40 0x62 0x51 0x73
|
||||
0xc0 7 0x61 0x06 0x00 0x00 0x00 0x00 0x00
|
||||
0xc0 7 0xC1 0x05 0x0F 0x00 0x08 0x70 0x00
|
||||
0xc0 7 0x13 0x01 0x00 0x00 0x00 0x00 0x00
|
||||
0xc0 7 0x3D 0x02 0x01 0x00 0x00 0x00 0x00
|
||||
0xc0 7 0xED 0x0D 0x01 0x00 0x00 0x00 0x00
|
||||
0xc0 7 0x23 0x02 0x00 0x00 0x00 0x00 0x00
|
||||
0xfd 1 10 /* delay 10ms */
|
||||
0xff 0>; /*ending*/
|
||||
init_off = <0xff 0>; /*ending*/
|
||||
};
|
||||
extern_1{
|
||||
index = <1>;
|
||||
extern_name = "i2c_T5800Q";
|
||||
status = "disabled";
|
||||
type = <0>; /* 0=i2c, 1=spi, 2=mipi */
|
||||
i2c_address = <0x1c>; /* 7bit i2c address */
|
||||
};
|
||||
extern_2{
|
||||
index = <2>;
|
||||
extern_name = "i2c_ANX6862_7911";
|
||||
status = "okay";
|
||||
type = <0>; /* 0=i2c, 1=spi, 2=mipi */
|
||||
i2c_address = <0x20>; /* 7bit i2c address */
|
||||
i2c_address2 = <0x74>; /* 7bit i2c address */
|
||||
cmd_size = <0xff>;
|
||||
|
||||
init_on = <
|
||||
0xc0 2 0x01 0x2b
|
||||
0xc0 2 0x02 0x05
|
||||
0xc0 2 0x03 0x00
|
||||
0xc0 2 0x04 0x00
|
||||
0xc0 2 0x05 0x0c
|
||||
0xc0 2 0x06 0x04
|
||||
0xc0 2 0x07 0x21
|
||||
0xc0 2 0x08 0x0f
|
||||
0xc0 2 0x09 0x04
|
||||
0xc0 2 0x0a 0x00
|
||||
0xc0 2 0x0b 0x04
|
||||
0xc0 2 0xff 0x00
|
||||
0xfd 1 100 /* delay 100ms */
|
||||
|
||||
0xc1 2 0x01 0xca
|
||||
0xc1 2 0x02 0x3b
|
||||
0xc1 2 0x03 0x33
|
||||
0xc1 2 0x04 0x05
|
||||
0xc1 2 0x05 0x2c
|
||||
0xc1 2 0x06 0xf2
|
||||
0xc1 2 0x07 0x9c
|
||||
0xc1 2 0x08 0x1b
|
||||
0xc1 2 0x09 0x82
|
||||
0xc1 2 0x0a 0x3d
|
||||
0xc1 2 0x0b 0x20
|
||||
0xc1 2 0x0c 0x11
|
||||
0xc1 2 0x0d 0xc4
|
||||
0xc1 2 0x0e 0x1a
|
||||
0xc1 2 0x0f 0x31
|
||||
0xc1 2 0x10 0x4c
|
||||
0xc1 2 0x11 0x12
|
||||
0xc1 2 0x12 0x90
|
||||
0xc1 2 0x13 0xf7
|
||||
0xc1 2 0x14 0x0c
|
||||
0xc1 2 0x15 0x20
|
||||
0xc1 2 0x16 0x13
|
||||
0xff 0>; /*ending*/
|
||||
init_off = <0xff 0>; /*ending*/
|
||||
};
|
||||
};
|
||||
|
||||
}; /* end of / */
|
||||
1068
arch/arm/boot/dts/amlogic/mesontl1_t309-panel.dtsi
Normal file
1068
arch/arm/boot/dts/amlogic/mesontl1_t309-panel.dtsi
Normal file
File diff suppressed because it is too large
Load Diff
1071
arch/arm/boot/dts/amlogic/mesontl1_x301-panel.dtsi
Normal file
1071
arch/arm/boot/dts/amlogic/mesontl1_x301-panel.dtsi
Normal file
File diff suppressed because it is too large
Load Diff
2583
arch/arm/boot/dts/amlogic/mesontm2.dtsi
Normal file
2583
arch/arm/boot/dts/amlogic/mesontm2.dtsi
Normal file
File diff suppressed because it is too large
Load Diff
241
arch/arm/boot/dts/amlogic/mesontm2_drm.dtsi
Normal file
241
arch/arm/boot/dts/amlogic/mesontm2_drm.dtsi
Normal file
@@ -0,0 +1,241 @@
|
||||
/*
|
||||
* arch/arm/boot/dts/amlogic/mesontm2_drm.dtsi
|
||||
*
|
||||
* Copyright (C) 2015 Amlogic, Inc. All rights reserved.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful, but WITHOUT
|
||||
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
||||
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
||||
* more details.
|
||||
*
|
||||
*/
|
||||
#include <dt-bindings/display/meson-drm-ids.h>
|
||||
|
||||
/ {
|
||||
venc-cvbs {
|
||||
status = "okay";
|
||||
compatible = "amlogic, meson-tm2-cvbs";
|
||||
|
||||
ports {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
enc_cvbs_in: port@0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
reg = <0>;
|
||||
|
||||
//venc_cvbs_in_vpu: endpoint@0 {
|
||||
// reg = <0>;
|
||||
// remote-endpoint = <&vpu_out_venc_cvbs>;
|
||||
//};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
drm_amhdmitx: drm-amhdmitx {
|
||||
status = "disabled";
|
||||
hdcp = "disabled";
|
||||
compatible = "amlogic,drm-amhdmitx";
|
||||
dev_name = "meson-amhdmitx";
|
||||
interrupts = <GIC_SPI 3 IRQ_TYPE_EDGE_RISING>;
|
||||
ports {
|
||||
port {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
hdmi_in_vpu: endpoint@0 {
|
||||
reg = <0>;
|
||||
remote-endpoint = <&vpu_out_hdmi>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
drm_lcd: drm-lcd {
|
||||
status = "disabled";
|
||||
compatible = "amlogic,drm-lcd";
|
||||
dev_name = "meson-lcd";
|
||||
ports {
|
||||
port {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
lcd_in_vpu: endpoint@0 {
|
||||
reg = <0>;
|
||||
remote-endpoint = <&vpu_out_lcd>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
drm_vpu: drm-vpu@0xff900000 {
|
||||
status = "disabled";
|
||||
compatible = "amlogic, meson-tm2-vpu";
|
||||
memory-region = <&logo_reserved>;
|
||||
reg = <0x0 0xff900000 0x0 0x40000>,
|
||||
<0x0 0xff63c000 0x0 0x2000>,
|
||||
<0x0 0xff638000 0x0 0x2000>;
|
||||
reg-names = "base", "hhi", "dmc";
|
||||
interrupts = <GIC_SPI 3 IRQ_TYPE_EDGE_RISING>,
|
||||
<GIC_SPI 56 IRQ_TYPE_EDGE_RISING>;
|
||||
interrupt-names = "viu-vsync", "viu2-vsync";
|
||||
clocks = <&clkc CLKID_VPU_CLKC_MUX>;
|
||||
clock-names = "vpu_clkc";
|
||||
dma-coherent;
|
||||
vpu_out: port {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
vpu_out_hdmi: endpoint@0 {
|
||||
reg = <0>;
|
||||
remote-endpoint = <&hdmi_in_vpu>;
|
||||
};
|
||||
vpu_out_lcd: endpoint@1 {
|
||||
reg = <1>;
|
||||
remote-endpoint = <&lcd_in_vpu>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
drm_subsystem: drm-subsystem {
|
||||
status = "okay";
|
||||
compatible = "amlogic,drm-subsystem";
|
||||
ports = <&vpu_out>;
|
||||
|
||||
vpu_topology: vpu_topology {
|
||||
vpu_blocks {
|
||||
osd1_block: block@0 {
|
||||
id = /bits/ 8 <OSD1_BLOCK>;
|
||||
index = /bits/ 8 <0>;
|
||||
type = /bits/ 8 <0>;
|
||||
block_name = "osd1_block";
|
||||
num_in_links = /bits/ 8 <0x0>;
|
||||
num_out_links = /bits/ 8 <0x1>;
|
||||
out_links = <0 &afbc_osd1_block>;
|
||||
};
|
||||
osd2_block: block@1 {
|
||||
id = /bits/ 8 <OSD2_BLOCK>;
|
||||
index = /bits/ 8 <1>;
|
||||
type = /bits/ 8 <0>;
|
||||
block_name = "osd2_block";
|
||||
num_in_links = /bits/ 8 <0x0>;
|
||||
num_out_links = /bits/ 8 <0x1>;
|
||||
out_links = <0 &afbc_osd2_block>;
|
||||
};
|
||||
osd3_block: block@2 {
|
||||
id = /bits/ 8 <OSD3_BLOCK>;
|
||||
index = /bits/ 8 <2>;
|
||||
type = /bits/ 8 <0>;
|
||||
block_name = "osd3_block";
|
||||
num_in_links = /bits/ 8 <0x0>;
|
||||
num_out_links = /bits/ 8 <0x1>;
|
||||
out_links = <0 &afbc_osd3_block>;
|
||||
};
|
||||
afbc_osd1_block: block@3 {
|
||||
id = /bits/ 8 <AFBC_OSD1_BLOCK>;
|
||||
index = /bits/ 8 <0>;
|
||||
type = /bits/ 8 <1>;
|
||||
block_name = "afbc_osd1_block";
|
||||
num_in_links = /bits/ 8 <0x1>;
|
||||
in_links = <0 &osd1_block>;
|
||||
num_out_links = /bits/ 8 <0x1>;
|
||||
out_links = <0 &osd_blend_block>;
|
||||
};
|
||||
afbc_osd2_block: block@4 {
|
||||
id = /bits/ 8 <AFBC_OSD2_BLOCK>;
|
||||
index = /bits/ 8 <1>;
|
||||
type = /bits/ 8 <1>;
|
||||
block_name = "afbc_osd2_block";
|
||||
num_in_links = /bits/ 8 <0x1>;
|
||||
in_links = <0 &osd2_block>;
|
||||
num_out_links = /bits/ 8 <0x1>;
|
||||
out_links = <0 &scaler_osd2_block>;
|
||||
};
|
||||
afbc_osd3_block: block@5 {
|
||||
id = /bits/ 8 <AFBC_OSD3_BLOCK>;
|
||||
index = /bits/ 8 <2>;
|
||||
type = /bits/ 8 <1>;
|
||||
block_name = "afbc_osd3_block";
|
||||
num_in_links = /bits/ 8 <0x1>;
|
||||
in_links = <0 &osd3_block>;
|
||||
num_out_links = /bits/ 8 <0x1>;
|
||||
out_links = <0 &scaler_osd3_block>;
|
||||
};
|
||||
scaler_osd1_block: block@6 {
|
||||
id = /bits/ 8 <SCALER_OSD1_BLOCK>;
|
||||
index = /bits/ 8 <0>;
|
||||
type = /bits/ 8 <2>;
|
||||
block_name = "scaler_osd1_block";
|
||||
num_in_links = /bits/ 8 <0x1>;
|
||||
in_links = <0 &osd1_hdr_dolby_block>;
|
||||
num_out_links = /bits/ 8 <0x1>;
|
||||
out_links = <0 &vpp_postblend_block>;
|
||||
};
|
||||
scaler_osd2_block: block@7 {
|
||||
id = /bits/ 8 <SCALER_OSD2_BLOCK>;
|
||||
index = /bits/ 8 <1>;
|
||||
type = /bits/ 8 <2>;
|
||||
block_name = "scaler_osd2_block";
|
||||
num_in_links = /bits/ 8 <0x1>;
|
||||
in_links = <0 &afbc_osd2_block>;
|
||||
num_out_links = /bits/ 8 <0x1>;
|
||||
out_links = <2 &osd_blend_block>;
|
||||
};
|
||||
scaler_osd3_block: block@8 {
|
||||
id = /bits/ 8 <SCALER_OSD3_BLOCK>;
|
||||
index = /bits/ 8 <2>;
|
||||
type = /bits/ 8 <2>;
|
||||
block_name = "scaler_osd3_block";
|
||||
num_in_links = /bits/ 8 <0x1>;
|
||||
in_links = <0 &afbc_osd3_block>;
|
||||
num_out_links = /bits/ 8 <0x1>;
|
||||
out_links = <3 &osd_blend_block>;
|
||||
};
|
||||
osd_blend_block: block@9 {
|
||||
id = /bits/ 8 <OSD_BLEND_BLOCK>;
|
||||
block_name = "osd_blend_block";
|
||||
type = /bits/ 8 <3>;
|
||||
num_in_links = /bits/ 8 <0x3>;
|
||||
in_links = <0 &afbc_osd1_block>,
|
||||
<0 &scaler_osd2_block>,
|
||||
<0 &scaler_osd3_block>;
|
||||
num_out_links = /bits/ 8 <0x2>;
|
||||
out_links = <0 &osd1_hdr_dolby_block>,
|
||||
<1 &vpp_postblend_block>;
|
||||
};
|
||||
osd1_hdr_dolby_block: block@10 {
|
||||
id = /bits/ 8 <OSD1_HDR_BLOCK>;
|
||||
block_name = "osd1_hdr_dolby_block";
|
||||
type = /bits/ 8 <4>;
|
||||
num_in_links = /bits/ 8 <0x1>;
|
||||
in_links = <0 &osd_blend_block>;
|
||||
num_out_links = /bits/ 8 <0x1>;
|
||||
out_links = <0 &scaler_osd1_block>;
|
||||
};
|
||||
vpp_postblend_block: block@12 {
|
||||
id = /bits/ 8 <VPP_POSTBLEND_BLOCK>;
|
||||
block_name = "vpp_postblend_block";
|
||||
type = /bits/ 8 <6>;
|
||||
num_in_links = /bits/ 8 <0x2>;
|
||||
in_links = <0 &scaler_osd1_block>,
|
||||
<1 &osd_blend_block>;
|
||||
num_out_links = <0x0>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
vpu_hw_para: vpu_hw_para@0 {
|
||||
osd_ver = /bits/ 8 <0x2>;
|
||||
afbc_type = /bits/ 8 <0x2>;
|
||||
has_deband = /bits/ 8 <0x1>;
|
||||
has_lut = /bits/ 8 <0x1>;
|
||||
has_rdma = /bits/ 8 <0x1>;
|
||||
osd_fifo_len = /bits/ 8 <64>;
|
||||
vpp_fifo_len = /bits/ 32 <0xfff>;
|
||||
};
|
||||
};
|
||||
};
|
||||
1071
arch/arm/boot/dts/amlogic/mesontm2_t962x3_ab301-panel.dtsi
Normal file
1071
arch/arm/boot/dts/amlogic/mesontm2_t962x3_ab301-panel.dtsi
Normal file
File diff suppressed because it is too large
Load Diff
591
arch/arm/boot/dts/amlogic/mesontm2_t962x3_ab309-panel.dtsi
Normal file
591
arch/arm/boot/dts/amlogic/mesontm2_t962x3_ab309-panel.dtsi
Normal file
@@ -0,0 +1,591 @@
|
||||
/*
|
||||
* arch/arm/boot/dts/amlogic/mesontm2_t962x3_ab309-panel.dtsi
|
||||
*
|
||||
* Copyright (C) 2016 Amlogic, Inc. All rights reserved.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful, but WITHOUT
|
||||
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
||||
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
||||
* more details.
|
||||
*
|
||||
*/
|
||||
|
||||
/ {
|
||||
lcd {
|
||||
compatible = "amlogic, lcd-tm2";
|
||||
status = "okay";
|
||||
mode = "tv";
|
||||
fr_auto_policy = <0>; /* 0=disable, 1=60/50hz, 2=60/50/48hz */
|
||||
key_valid = <1>;
|
||||
clocks = <&clkc CLKID_VCLK2_ENCL
|
||||
&clkc CLKID_VCLK2_VENCL
|
||||
&clkc CLKID_TCON
|
||||
&clkc CLKID_FCLK_DIV5
|
||||
&clkc CLKID_TCON_PLL_COMP>;
|
||||
clock-names = "encl_top_gate",
|
||||
"encl_int_gate",
|
||||
"tcon_gate",
|
||||
"fclk_div5",
|
||||
"clk_tcon";
|
||||
reg = <0xff660000 0xd000
|
||||
0xff634400 0x300>;
|
||||
interrupts = <0 3 1
|
||||
0 78 1
|
||||
0 88 1>;
|
||||
interrupt-names = "vsync","vbyone","tcon";
|
||||
pinctrl-names = "vbyone","vbyone_off","tcon","tcon_off";
|
||||
pinctrl-0 = <&lcd_vbyone_pins>;
|
||||
pinctrl-1 = <&lcd_vbyone_off_pins>;
|
||||
pinctrl-2 = <&lcd_tcon_pins>;
|
||||
pinctrl-3 = <&lcd_tcon_off_pins>;
|
||||
pinctrl_version = <2>; /* for uboot */
|
||||
|
||||
/* power type:(0=cpu_gpio, 2=signal, 3=extern, 0xff=ending) */
|
||||
/* power index:(gpios_index, or extern_index, 0xff=invalid) */
|
||||
/* power value:(0=output low, 1=output high, 2=input) */
|
||||
/* power delay:(unit in ms) */
|
||||
|
||||
lvds_0{
|
||||
model_name = "1080p-vfreq";
|
||||
interface = "lvds"; /*lcd_interface(lvds, vbyone)*/
|
||||
basic_setting = <
|
||||
1920 1080 /*h_active, v_active*/
|
||||
2200 1125 /*h_period, v_period*/
|
||||
8 /*lcd_bits */
|
||||
16 9>; /*screen_widht, screen_height*/
|
||||
range_setting = <
|
||||
2060 2650 /*h_period_min,max*/
|
||||
1100 1480 /*v_period_min,max*/
|
||||
120000000 160000000>; /*pclk_min,max*/
|
||||
lcd_timing = <
|
||||
44 148 0 /*hs_width, hs_bp, hs_pol*/
|
||||
5 30 0>; /*vs_width, vs_bp, vs_pol*/
|
||||
clk_attr = <
|
||||
2 /*fr_adj_type
|
||||
*(0=clk, 1=htotal, 2=vtotal, 3=auto_range,
|
||||
* 4=hdmi_mode)
|
||||
*/
|
||||
0 /*clk_ss_level*/
|
||||
1 /*clk_auto_generate*/
|
||||
0>; /*pixel_clk(unit in Hz)*/
|
||||
lvds_attr = <
|
||||
1 /*lvds_repack*/
|
||||
1 /*dual_port*/
|
||||
0 /*pn_swap*/
|
||||
0 /*port_swap*/
|
||||
0>; /*lane_reverse*/
|
||||
phy_attr=<0xf 0>; /*vswing_level, preem_level*/
|
||||
|
||||
/* power step: type, index, value, delay(ms) */
|
||||
power_on_step = <
|
||||
2 0 0 0 /*signal enable*/
|
||||
0xff 0 0 0>; /*ending*/
|
||||
power_off_step = <
|
||||
2 0 0 10 /*signal disable*/
|
||||
0xff 0 0 0>; /*ending*/
|
||||
backlight_index = <0xff>;
|
||||
};
|
||||
lvds_1{
|
||||
model_name = "1080p-hfreq_hdmi";
|
||||
interface = "lvds"; /*lcd_interface(lvds, vbyone)*/
|
||||
basic_setting = <
|
||||
1920 1080 /*h_active, v_active*/
|
||||
2200 1125 /*h_period, v_period*/
|
||||
8 /*lcd_bits*/
|
||||
16 9>; /*screen_widht, screen_height*/
|
||||
range_setting = <
|
||||
2080 2720 /*h_period min, max*/
|
||||
1100 1380 /*v_period min, max*/
|
||||
133940000 156000000>; /*pclk_min, max*/
|
||||
lcd_timing = <
|
||||
44 148 0 /*hs_width, hs_bp, hs_pol*/
|
||||
5 30 0>; /*vs_width, vs_bp, vs_pol*/
|
||||
clk_attr = <
|
||||
4 /*fr_adj_type
|
||||
*(0=clk, 1=htotal, 2=vtotal, 3=auto_range,
|
||||
* 4=hdmi_mode)
|
||||
*/
|
||||
0 /*clk_ss_level */
|
||||
1 /*clk_auto_generate*/
|
||||
0>; /*pixel_clk(unit in Hz)*/
|
||||
lvds_attr = <
|
||||
1 /*lvds_repack*/
|
||||
1 /*dual_port*/
|
||||
0 /*pn_swap*/
|
||||
0 /*port_swap*/
|
||||
0>; /*lane_reverse*/
|
||||
phy_attr=<0xf 0>; /*vswing_level, preem_level*/
|
||||
|
||||
/* power step: type, index, value, delay(ms) */
|
||||
power_on_step = <
|
||||
2 0 0 0 /*signal enable*/
|
||||
0xff 0 0 0>; /*ending*/
|
||||
power_off_step = <
|
||||
2 0 0 10 /*signal disable*/
|
||||
0xff 0 0 0>; /*ending*/
|
||||
backlight_index = <0xff>;
|
||||
};
|
||||
vbyone_0{
|
||||
model_name = "public_2region";
|
||||
interface = "vbyone"; /*lcd_interface(lvds, vbyone)*/
|
||||
basic_setting = <
|
||||
3840 2160 /*h_active, v_active*/
|
||||
4400 2250 /*h_period, v_period*/
|
||||
10 /*lcd_bits */
|
||||
16 9>; /*screen_widht, screen_height*/
|
||||
range_setting = <
|
||||
4240 4800 /*h_period_min, max*/
|
||||
2200 2760 /*v_period_min, max*/
|
||||
480000000 624000000>; /*pclk_min, max*/
|
||||
lcd_timing = <
|
||||
33 477 0 /*hs_width, hs_bp, hs_pol*/
|
||||
6 65 0>; /*vs_width, vs_bp, vs_pol*/
|
||||
clk_attr = <
|
||||
2 /*fr_adj_type
|
||||
*(0=clk, 1=htotal, 2=vtotal, 3=auto_range,
|
||||
* 4=hdmi_mode)
|
||||
*/
|
||||
0 /*clk_ss_level*/
|
||||
1 /*clk_auto_generate*/
|
||||
0>; /*pixel_clk(unit in Hz)*/
|
||||
vbyone_attr = <
|
||||
8 /*lane_count*/
|
||||
2 /*region_num*/
|
||||
4 /*byte_mode*/
|
||||
4>; /*color_fmt*/
|
||||
vbyone_intr_enable = <
|
||||
1 /*vbyone_intr_enable */
|
||||
3>; /*vbyone_vsync_intr_enable*/
|
||||
phy_attr=<0xf 1>; /* vswing_level, preem_level */
|
||||
hw_filter=<0 0>; /* filter_time, filter_cnt*/
|
||||
|
||||
/* power step: type, index, value, delay(ms) */
|
||||
power_on_step = <
|
||||
2 0 0 10 /*signal enable*/
|
||||
0xff 0 0 0>; /*ending*/
|
||||
power_off_step = <
|
||||
2 0 0 10 /*signal disable*/
|
||||
0xff 0 0 0>; /*ending*/
|
||||
backlight_index = <0xff>;
|
||||
};
|
||||
vbyone_1{
|
||||
model_name = "public_1region";
|
||||
interface = "vbyone"; /*lcd_interface(lvds, vbyone)*/
|
||||
basic_setting = <
|
||||
3840 2160 /*h_active, v_active*/
|
||||
4400 2250 /*h_period, v_period*/
|
||||
10 /*lcd_bits*/
|
||||
16 9>; /*screen_widht, screen_height*/
|
||||
range_setting = <
|
||||
4240 4800 /*h_period_min, max*/
|
||||
2200 2790 /*v_period_min, max*/
|
||||
552000000 632000000>; /*pclk_min,max*/
|
||||
lcd_timing = <
|
||||
33 477 0 /*hs_width, hs_bp, hs_pol*/
|
||||
6 65 0>; /*vs_width, vs_bp, vs_pol*/
|
||||
clk_attr = <
|
||||
2 /*fr_adj_type
|
||||
*(0=clk, 1=htotal, 2=vtotal, 3=auto_range,
|
||||
* 4=hdmi_mode)
|
||||
*/
|
||||
0 /*clk_ss_level*/
|
||||
1 /*clk_auto_generate*/
|
||||
0>; /*pixel_clk(unit in Hz)*/
|
||||
vbyone_attr = <
|
||||
8 /*lane_count*/
|
||||
1 /*region_num*/
|
||||
4 /*byte_mode*/
|
||||
4>; /*color_fmt*/
|
||||
vbyone_intr_enable = <
|
||||
1 /*vbyone_intr_enable*/
|
||||
3>; /*vbyone_vsync_intr_enable*/
|
||||
phy_attr=<0xf 1>; /* vswing_level, preem_level */
|
||||
hw_filter=<0 0>; /* filter_time, filter_cnt*/
|
||||
|
||||
/* power step: type, index, value, delay(ms) */
|
||||
power_on_step = <
|
||||
2 0 0 10 /*signal enable*/
|
||||
0xff 0 0 0>; /*ending*/
|
||||
power_off_step = <
|
||||
2 0 0 10 /*signal disable*/
|
||||
0xff 0 0 0>; /*ending*/
|
||||
backlight_index = <0xff>;
|
||||
};
|
||||
p2p_0{
|
||||
model_name = "p2p_ceds";
|
||||
interface = "p2p"; /*lcd_interface
|
||||
*(lvds, vbyone, minilvds, p2p)
|
||||
*/
|
||||
basic_setting = <
|
||||
3840 2160 /*h_active, v_active*/
|
||||
5000 2250 /*h_period, v_period*/
|
||||
8 /*lcd_bits */
|
||||
16 9>; /*screen_widht, screen_height*/
|
||||
range_setting = <
|
||||
4240 5100 /*h_period_min, max*/
|
||||
2200 2760 /*v_period_min, max*/
|
||||
480000000 624000000>; /*pclk_min, max*/
|
||||
lcd_timing = <
|
||||
16 29 0 /*hs_width, hs_bp, hs_pol*/
|
||||
6 65 0>; /*vs_width, vs_bp, vs_pol*/
|
||||
clk_attr = <
|
||||
2 /*fr_adj_type
|
||||
*(0=clk, 1=htotal, 2=vtotal, 3=auto_range,
|
||||
* 4=hdmi_mode)
|
||||
*/
|
||||
0 /*clk_ss_level*/
|
||||
1 /*clk_auto_generate*/
|
||||
0>; /*pixel_clk(unit in Hz)*/
|
||||
p2p_attr = <
|
||||
0x0 /* p2p_teyp:
|
||||
* 0x0=ceds, 0x1=cmpi, 0x2=isp, 0x3=epi,
|
||||
* 0x10=chpi, 0x11=cspi, 0x12=usit
|
||||
*/
|
||||
12 /* channel_num */
|
||||
0x76543210 /* channel_sel0 */
|
||||
0xba98 /* channel_sel1 */
|
||||
0 /* pn_swap */
|
||||
0>; /* bit_swap */
|
||||
phy_attr=<0xf 1>; /* vswing_level, preem_level */
|
||||
|
||||
/* power step: type, index, value, delay(ms) */
|
||||
power_on_step = <
|
||||
2 0 0 10 /*signal enable*/
|
||||
0xff 0 0 0>; /*ending*/
|
||||
power_off_step = <
|
||||
2 0 0 10 /*signal disable*/
|
||||
0xff 0 0 0>; /*ending*/
|
||||
backlight_index = <0xff>;
|
||||
};
|
||||
p2p_1{
|
||||
model_name = "p2p_ceds";
|
||||
interface = "p2p"; /*lcd_interface
|
||||
*(lvds, vbyone, minilvds, p2p)
|
||||
*/
|
||||
basic_setting = <
|
||||
3840 2160 /*h_active, v_active*/
|
||||
5000 2250 /*h_period, v_period*/
|
||||
8 /*lcd_bits */
|
||||
16 9>; /*screen_widht, screen_height*/
|
||||
range_setting = <
|
||||
4240 5100 /*h_period_min, max*/
|
||||
2200 2760 /*v_period_min, max*/
|
||||
480000000 624000000>; /*pclk_min, max*/
|
||||
lcd_timing = <
|
||||
16 29 0 /*hs_width, hs_bp, hs_pol*/
|
||||
6 65 0>; /*vs_width, vs_bp, vs_pol*/
|
||||
clk_attr = <
|
||||
2 /*fr_adj_type
|
||||
*(0=clk, 1=htotal, 2=vtotal, 3=auto_range,
|
||||
* 4=hdmi_mode)
|
||||
*/
|
||||
0 /*clk_ss_level*/
|
||||
1 /*clk_auto_generate*/
|
||||
0>; /*pixel_clk(unit in Hz)*/
|
||||
p2p_attr = <
|
||||
0x0 /* p2p_teyp:
|
||||
* 0x0=ceds, 0x1=cmpi, 0x2=isp, 0x3=epi,
|
||||
* 0x10=chpi, 0x11=cspi, 0x12=usit
|
||||
*/
|
||||
6 /* channel_num */
|
||||
0x76543210 /* channel_sel0 */
|
||||
0xba98 /* channel_sel1 */
|
||||
0 /* pn_swap */
|
||||
0>; /* bit_swap */
|
||||
phy_attr=<0xf 1>; /* vswing_level, preem_level */
|
||||
|
||||
/* power step: type, index, value, delay(ms) */
|
||||
power_on_step = <
|
||||
2 0 0 10 /*signal enable*/
|
||||
0xff 0 0 0>; /*ending*/
|
||||
power_off_step = <
|
||||
2 0 0 10 /*signal disable*/
|
||||
0xff 0 0 0>; /*ending*/
|
||||
backlight_index = <0xff>;
|
||||
};
|
||||
p2p_2{
|
||||
model_name = "p2p_chpi";
|
||||
interface = "p2p"; /*lcd_interface
|
||||
*(lvds, vbyone, minilvds, p2p)
|
||||
*/
|
||||
basic_setting = <
|
||||
3840 2160 /*h_active, v_active*/
|
||||
4400 2250 /*h_period, v_period*/
|
||||
8 /*lcd_bits */
|
||||
16 9>; /*screen_widht, screen_height*/
|
||||
range_setting = <
|
||||
4240 5100 /*h_period_min, max*/
|
||||
2200 2760 /*v_period_min, max*/
|
||||
480000000 624000000>; /*pclk_min, max*/
|
||||
lcd_timing = <
|
||||
16 29 0 /*hs_width, hs_bp, hs_pol*/
|
||||
6 65 0>; /*vs_width, vs_bp, vs_pol*/
|
||||
clk_attr = <
|
||||
2 /*fr_adj_type
|
||||
*(0=clk, 1=htotal, 2=vtotal, 3=auto_range,
|
||||
* 4=hdmi_mode)
|
||||
*/
|
||||
0 /*clk_ss_level*/
|
||||
1 /*clk_auto_generate*/
|
||||
0>; /*pixel_clk(unit in Hz)*/
|
||||
p2p_attr = <
|
||||
0x10 /* p2p_teyp:
|
||||
* 0x0=ceds, 0x1=cmpi, 0x2=isp, 0x3=epi,
|
||||
* 0x10=chpi, 0x11=cspi, 0x12=usit
|
||||
*/
|
||||
6 /* channel_num */
|
||||
0x76543210 /* channel_sel0 */
|
||||
0xba98 /* channel_sel1 */
|
||||
0 /* pn_swap */
|
||||
0>; /* bit_swap */
|
||||
phy_attr=<0xf 1>; /* vswing_level, preem_level */
|
||||
|
||||
/* power step: type, index, value, delay(ms) */
|
||||
power_on_step = <
|
||||
2 0 0 10 /*signal enable*/
|
||||
0xff 0 0 0>; /*ending*/
|
||||
power_off_step = <
|
||||
2 0 0 10 /*signal disable*/
|
||||
0xff 0 0 0>; /*ending*/
|
||||
backlight_index = <0xff>;
|
||||
};
|
||||
p2p_3{
|
||||
model_name = "p2p_chpi";
|
||||
interface = "p2p"; /*lcd_interface
|
||||
*(lvds, vbyone, minilvds, p2p)
|
||||
*/
|
||||
basic_setting = <
|
||||
3840 2160 /*h_active, v_active*/
|
||||
4400 2250 /*h_period, v_period*/
|
||||
8 /*lcd_bits */
|
||||
16 9>; /*screen_widht, screen_height*/
|
||||
range_setting = <
|
||||
4240 5100 /*h_period_min, max*/
|
||||
2200 2760 /*v_period_min, max*/
|
||||
480000000 624000000>; /*pclk_min, max*/
|
||||
lcd_timing = <
|
||||
16 29 0 /*hs_width, hs_bp, hs_pol*/
|
||||
6 65 0>; /*vs_width, vs_bp, vs_pol*/
|
||||
clk_attr = <
|
||||
2 /*fr_adj_type
|
||||
*(0=clk, 1=htotal, 2=vtotal, 3=auto_range,
|
||||
* 4=hdmi_mode)
|
||||
*/
|
||||
0 /*clk_ss_level*/
|
||||
1 /*clk_auto_generate*/
|
||||
0>; /*pixel_clk(unit in Hz)*/
|
||||
p2p_attr = <
|
||||
0x10 /* p2p_teyp:
|
||||
* 0x0=ceds, 0x1=cmpi, 0x2=isp, 0x3=epi,
|
||||
* 0x10=chpi, 0x11=cspi, 0x12=usit
|
||||
*/
|
||||
12 /* channel_num */
|
||||
0x76543210 /* channel_sel0 */
|
||||
0xba98 /* channel_sel1 */
|
||||
0 /* pn_swap */
|
||||
0>; /* bit_swap */
|
||||
phy_attr=<0xf 1>; /* vswing_level, preem_level */
|
||||
|
||||
/* power step: type, index, value, delay(ms) */
|
||||
power_on_step = <
|
||||
2 0 0 10 /*signal enable*/
|
||||
0xff 0 0 0>; /*ending*/
|
||||
power_off_step = <
|
||||
2 0 0 10 /*signal disable*/
|
||||
0xff 0 0 0>; /*ending*/
|
||||
backlight_index = <0xff>;
|
||||
};
|
||||
mlvds_0{
|
||||
model_name = "mlvds_1080p";
|
||||
interface = "minilvds"; /*lcd_interface
|
||||
*(lvds, vbyone, minilvds, p2p)
|
||||
*/
|
||||
basic_setting = <
|
||||
1920 1080 /*h_active, v_active*/
|
||||
2200 1125 /*h_period, v_period*/
|
||||
8 /*lcd_bits */
|
||||
16 9>; /*screen_widht, screen_height*/
|
||||
range_setting = <
|
||||
2080 2720 /*h_period_min, max*/
|
||||
2200 1125 /*v_period_min, max*/
|
||||
133940000 156000000>; /*pclk_min, max*/
|
||||
lcd_timing = <
|
||||
44 148 0 /*hs_width, hs_bp, hs_pol*/
|
||||
5 30 0>; /*vs_width, vs_bp, vs_pol*/
|
||||
clk_attr = <
|
||||
2 /*fr_adj_type
|
||||
*(0=clk, 1=htotal, 2=vtotal, 3=auto_range,
|
||||
* 4=hdmi_mode)
|
||||
*/
|
||||
0 /*clk_ss_level*/
|
||||
1 /*clk_auto_generate*/
|
||||
0>; /*pixel_clk(unit in Hz)*/
|
||||
minilvds_attr = <
|
||||
6 /* channel_num */
|
||||
0x76543210 /* channel_sel0 */
|
||||
0xba98 /* channel_sel1 */
|
||||
0x660 /* clk_phase */
|
||||
0 /* pn_swap */
|
||||
0>; /* bit_swap */
|
||||
phy_attr=<0xf 0>; /* vswing_level, preem_level */
|
||||
|
||||
/* power step: type, index, value, delay(ms) */
|
||||
power_on_step = <
|
||||
2 0 0 10 /*signal enable*/
|
||||
0xff 0 0 0>; /*ending*/
|
||||
power_off_step = <
|
||||
2 0 0 10 /*signal disable*/
|
||||
0xff 0 0 0>; /*ending*/
|
||||
backlight_index = <0xff>;
|
||||
};
|
||||
mlvds_1{
|
||||
model_name = "mlvds_768p";
|
||||
interface = "minilvds";/*lcd_interface
|
||||
*(lvds, vbyone, minilvds, p2p)
|
||||
*/
|
||||
basic_setting = <
|
||||
1366 768 /*h_active, v_active*/
|
||||
1560 806 /*h_period, v_period*/
|
||||
8 /*lcd_bits */
|
||||
16 9>; /*screen_widht, screen_height*/
|
||||
range_setting = <
|
||||
1460 2000 /*h_period_min, max*/
|
||||
784 1015 /*v_period_min, max*/
|
||||
50000000 85000000>; /*pclk_min, max*/
|
||||
lcd_timing = <
|
||||
56 64 0 /*hs_width, hs_bp, hs_pol*/
|
||||
3 28 0>; /*vs_width, vs_bp, vs_pol*/
|
||||
clk_attr = <
|
||||
2 /*fr_adj_type
|
||||
*(0=clk, 1=htotal, 2=vtotal, 3=auto_range,
|
||||
* 4=hdmi_mode)
|
||||
*/
|
||||
0 /*clk_ss_level*/
|
||||
1 /*clk_auto_generate*/
|
||||
0>; /*pixel_clk(unit in Hz)*/
|
||||
minilvds_attr = <
|
||||
6 /* channel_num */
|
||||
0x76543210 /* channel_sel0 */
|
||||
0xba98 /* channel_sel1 */
|
||||
0x660 /* clk_phase */
|
||||
0 /* pn_swap */
|
||||
0>; /* bit_swap */
|
||||
phy_attr=<0xf 0>; /* vswing_level, preem_level */
|
||||
|
||||
/* power step: type, index, value, delay(ms) */
|
||||
power_on_step = <
|
||||
2 0 0 10 /*signal enable*/
|
||||
0xff 0 0 0>; /*ending*/
|
||||
power_off_step = <
|
||||
2 0 0 10 /*signal disable*/
|
||||
0xff 0 0 0>; /*ending*/
|
||||
backlight_index = <0xff>;
|
||||
};
|
||||
};
|
||||
|
||||
lcd_extern{
|
||||
compatible = "amlogic, lcd_extern";
|
||||
status = "okay";
|
||||
key_valid = <1>;
|
||||
i2c_bus = "i2c_bus_1";
|
||||
|
||||
extern_0{
|
||||
index = <0>;
|
||||
extern_name = "ext_default";
|
||||
status = "disabled";
|
||||
type = <0>; /*0=i2c, 1=spi, 2=mipi*/
|
||||
i2c_address = <0x1c>; /*7bit i2c_addr*/
|
||||
i2c_address2 = <0xff>;
|
||||
cmd_size = <0xff>; /*dynamic cmd_size*/
|
||||
|
||||
/* init on/off:
|
||||
* fixed cmd_size: (type, value...);
|
||||
* cmd_size include all data.
|
||||
* dynamic cmd_size: (type, cmd_size, value...);
|
||||
* cmd_size include value.
|
||||
*/
|
||||
/* type: 0x00=cmd with delay(bit[3:0]=1 for address2),
|
||||
* 0xc0=cmd(bit[3:0]=1 for address2),
|
||||
* 0xf0=gpio,
|
||||
* 0xfd=delay,
|
||||
* 0xff=ending
|
||||
*/
|
||||
/* value: i2c or spi cmd, or gpio index & level */
|
||||
/* delay: unit ms */
|
||||
init_on = <
|
||||
0xc0 7 0x20 0x01 0x02 0x00 0x40 0xFF 0x00
|
||||
0xc0 7 0x80 0x02 0x00 0x40 0x62 0x51 0x73
|
||||
0xc0 7 0x61 0x06 0x00 0x00 0x00 0x00 0x00
|
||||
0xc0 7 0xC1 0x05 0x0F 0x00 0x08 0x70 0x00
|
||||
0xc0 7 0x13 0x01 0x00 0x00 0x00 0x00 0x00
|
||||
0xc0 7 0x3D 0x02 0x01 0x00 0x00 0x00 0x00
|
||||
0xc0 7 0xED 0x0D 0x01 0x00 0x00 0x00 0x00
|
||||
0xc0 7 0x23 0x02 0x00 0x00 0x00 0x00 0x00
|
||||
0xfd 1 10 /* delay 10ms */
|
||||
0xff 0>; /*ending*/
|
||||
init_off = <0xff 0>; /*ending*/
|
||||
};
|
||||
extern_1{
|
||||
index = <1>;
|
||||
extern_name = "i2c_T5800Q";
|
||||
status = "disabled";
|
||||
type = <0>; /* 0=i2c, 1=spi, 2=mipi */
|
||||
i2c_address = <0x1c>; /* 7bit i2c address */
|
||||
};
|
||||
extern_2{
|
||||
index = <2>;
|
||||
extern_name = "i2c_ANX6862_7911";
|
||||
status = "okay";
|
||||
type = <0>; /* 0=i2c, 1=spi, 2=mipi */
|
||||
i2c_address = <0x20>; /* 7bit i2c address */
|
||||
i2c_address2 = <0x74>; /* 7bit i2c address */
|
||||
cmd_size = <0xff>;
|
||||
|
||||
init_on = <
|
||||
0xc0 2 0x01 0x2b
|
||||
0xc0 2 0x02 0x05
|
||||
0xc0 2 0x03 0x00
|
||||
0xc0 2 0x04 0x00
|
||||
0xc0 2 0x05 0x0c
|
||||
0xc0 2 0x06 0x04
|
||||
0xc0 2 0x07 0x21
|
||||
0xc0 2 0x08 0x0f
|
||||
0xc0 2 0x09 0x04
|
||||
0xc0 2 0x0a 0x00
|
||||
0xc0 2 0x0b 0x04
|
||||
0xc0 2 0xff 0x00
|
||||
0xfd 1 100 /* delay 100ms */
|
||||
|
||||
0xc1 2 0x01 0xca
|
||||
0xc1 2 0x02 0x3b
|
||||
0xc1 2 0x03 0x33
|
||||
0xc1 2 0x04 0x05
|
||||
0xc1 2 0x05 0x2c
|
||||
0xc1 2 0x06 0xf2
|
||||
0xc1 2 0x07 0x9c
|
||||
0xc1 2 0x08 0x1b
|
||||
0xc1 2 0x09 0x82
|
||||
0xc1 2 0x0a 0x3d
|
||||
0xc1 2 0x0b 0x20
|
||||
0xc1 2 0x0c 0x11
|
||||
0xc1 2 0x0d 0xc4
|
||||
0xc1 2 0x0e 0x1a
|
||||
0xc1 2 0x0f 0x31
|
||||
0xc1 2 0x10 0x4c
|
||||
0xc1 2 0x11 0x12
|
||||
0xc1 2 0x12 0x90
|
||||
0xc1 2 0x13 0xf7
|
||||
0xc1 2 0x14 0x0c
|
||||
0xc1 2 0x15 0x20
|
||||
0xc1 2 0x16 0x13
|
||||
0xff 0>; /*ending*/
|
||||
init_off = <0xff 0>; /*ending*/
|
||||
};
|
||||
};
|
||||
|
||||
}; /* end of / */
|
||||
1066
arch/arm/boot/dts/amlogic/mesontm2_t962x3_t312-panel.dtsi
Normal file
1066
arch/arm/boot/dts/amlogic/mesontm2_t962x3_t312-panel.dtsi
Normal file
File diff suppressed because it is too large
Load Diff
Some files were not shown because too many files have changed in this diff Show More
Reference in New Issue
Block a user