arm64: dts: rockchip: rk3568: delete unused node for lvds

Change-Id: I9807f261804e9c79bb37041ab974e1c6df925899
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
This commit is contained in:
Sandy Huang
2020-11-24 11:18:06 +08:00
parent 6dd31db615
commit 6a9eb7b334

View File

@@ -34,8 +34,6 @@
i2c3 = &i2c3;
i2c4 = &i2c4;
i2c5 = &i2c5;
lvds0 = &lvds0;
lvds1 = &lvds1;
serial0 = &uart0;
serial1 = &uart1;
serial2 = &uart2;
@@ -448,7 +446,7 @@
status = "disabled";
};
lvds0: lvds0 {
lvds: lvds {
compatible = "rockchip,rk3568-lvds";
phys = <&video_phy0>;
phy-names = "phy";
@@ -463,42 +461,14 @@
#address-cells = <1>;
#size-cells = <0>;
lvds0_in_vp1: endpoint@0 {
lvds_in_vp1: endpoint@0 {
reg = <0>;
remote-endpoint = <&vp1_out_lvds0>;
remote-endpoint = <&vp1_out_lvds>;
};
lvds0_in_vp2: endpoint@1 {
lvds_in_vp2: endpoint@1 {
reg = <1>;
remote-endpoint = <&vp2_out_lvds0>;
};
};
};
};
lvds1: lvds1 {
compatible = "rockchip,rk3568-lvds";
phys = <&video_phy1>;
phy-names = "phy";
status = "disabled";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
#address-cells = <1>;
#size-cells = <0>;
lvds1_in_vp1: endpoint@0 {
reg = <0>;
remote-endpoint = <&vp1_out_lvds1>;
};
lvds1_in_vp2: endpoint@1 {
reg = <1>;
remote-endpoint = <&vp2_out_lvds1>;
remote-endpoint = <&vp2_out_lvds>;
};
};
};
@@ -1361,16 +1331,10 @@
remote-endpoint = <&hdmi_in_vp1>;
};
vp1_out_lvds0: endpoint@4 {
vp1_out_lvds: endpoint@4 {
reg = <4>;
remote-endpoint = <&lvds0_in_vp1>;
remote-endpoint = <&lvds_in_vp1>;
};
vp1_out_lvds1: endpoint@5 {
reg = <5>;
remote-endpoint = <&lvds1_in_vp1>;
};
};
port@2 {
@@ -1379,18 +1343,13 @@
reg = <2>;
vp2_out_lvds0: endpoint@0 {
vp2_out_lvds: endpoint@0 {
reg = <0>;
remote-endpoint = <&lvds0_in_vp2>;
remote-endpoint = <&lvds_in_vp2>;
};
vp2_out_lvds1: endpoint@1 {
vp2_out_rgb: endpoint@1 {
reg = <1>;
remote-endpoint = <&lvds1_in_vp2>;
};
vp2_out_rgb: endpoint@2 {
reg = <2>;
remote-endpoint = <&rgb_in_vp2>;
};
};
@@ -2710,21 +2669,6 @@
status = "disabled";
};
video_phy1: video-phy@fe860000 {
compatible = "rockchip,rk3568-video-phy";
reg = <0x0 0xfe860000 0x0 0x10000>,
<0x0 0xfe070000 0x0 0x10000>;
clocks = <&pmucru CLK_MIPIDSIPHY1_REF>,
<&cru PCLK_MIPIDSIPHY1>, <&cru PCLK_DSITX_1>;
clock-names = "ref", "pclk_phy", "pclk_host";
#clock-cells = <0>;
resets = <&cru SRST_P_MIPIDSIPHY1>;
reset-names = "rst";
power-domains = <&power RK3568_PD_VO>;
#phy-cells = <0>;
status = "disabled";
};
csi_dphy: csi-dphy@fe870000 {
compatible = "rockchip,rk3568-csi-dphy";
reg = <0x0 0xfe870000 0x0 0x1000>;