drm/rockchip: vop2: set reg done every field for interlace

Signed-off-by: Sandy Huang <hjc@rock-chips.com>
Change-Id: Ie003f46f78700a8a01399616619ffaa68f2d7ec9
This commit is contained in:
Sandy Huang
2024-02-21 18:07:49 +08:00
committed by Tao Huang
parent 0b9ec0ec3c
commit 6b1476cb36
3 changed files with 4 additions and 0 deletions

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@@ -4103,6 +4103,8 @@ static void vop2_initial(struct drm_crtc *crtc)
VOP_CTRL_SET(vop2, lut_use_axi1, 0);
}
/* Set reg done every field for interlace */
VOP_CTRL_SET(vop2, reg_done_frm, 0);
VOP_CTRL_SET(vop2, cfg_done_en, 1);
/*
* Disable auto gating, this is a workaround to

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@@ -206,6 +206,7 @@ enum dst_factor_mode {
#define RK3568_SYS_AUTO_GATING_CTRL 0x008
#define RK3568_SYS_AXI_LUT_CTRL 0x024
#define RK3568_DSP_IF_EN 0x028
#define RK3576_SYS_PORT_CTRL_IMD 0x028
#define RK3568_DSP_IF_CTRL 0x02c
#define RK3568_DSP_IF_POL 0x030
#define RK3568_WB_CTRL 0x40

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@@ -4496,6 +4496,7 @@ static const struct vop_grf_ctrl rk3576_ioc_grf_ctrl = {
static const struct vop2_ctrl rk3576_vop_ctrl = {
.cfg_done_en = VOP_REG(RK3568_REG_CFG_DONE, 0x1, 15),
.reg_done_frm = VOP_REG_MASK(RK3576_SYS_PORT_CTRL_IMD, 0x7, 0),
.wb_cfg_done = VOP_REG_MASK(RK3568_REG_CFG_DONE, 0x1, 14),
.auto_gating_en = VOP_REG(RK3568_SYS_AUTO_GATING_CTRL, 0x1, 31),
.aclk_pre_auto_gating_en = VOP_REG(RK3568_SYS_AUTO_GATING_CTRL, 0x1, 7),