shinys000114/linux
1
0
Fork 0
mirror of https://github.com/hardkernel/linux.git synced 2026-06-10 12:57:06 +09:00
Code Issues Packages Projects Releases Wiki Activity

gpu: ipu-v3: Fix CSI selection for VDIC

Browse Source 
[ Upstream commit b7dfee2433 ]

The description of the CSI_SEL bit in the i.MX6 reference manual is
incorrect. It states "This bit defines which CSI is the input to the
IC. This bit is effective only if IC_INPUT is bit cleared".

From experiment it was found this is in fact not correct. The CSI_SEL
bit selects which CSI is input to _both_ the VDIC _and_ the IC. If the
IC_INPUT bit is set so that the IC is receiving from the VDIC, the IC
ignores the CSI_SEL bit, but CSI_SEL still selects which CSI the VDIC
receives from in that case.

Signed-off-by: Marek Vasut <marex@denx.de>
Signed-off-by: Steve Longerbeam <steve_longerbeam@mentor.com>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Sasha Levin <sashal@kernel.org>
This commit is contained in:
Marek Vasut
2017-06-03 11:57:21 -07:00
committed by Greg Kroah-Hartman
parent 7b54078436
commit 6b51100d8a
1 changed files with 8 additions and 7 deletions
Download Patch File Download Diff File Expand all files Collapse all files

15
drivers/gpu/ipu-v3/ipu-common.c
View File

@@ -715,15 +715,16 @@ void ipu_set_ic_src_mux(struct ipu_soc *ipu, int csi_id, bool vdi)
spin_lock_irqsave(&ipu->lock, flags);
val = ipu_cm_read(ipu, IPU_CONF);
if (vdi) {
if (vdi)
val |= IPU_CONF_IC_INPUT;
} else {
else
val &= ~IPU_CONF_IC_INPUT;
if (csi_id == 1)
val |= IPU_CONF_CSI_SEL;
else
val &= ~IPU_CONF_CSI_SEL;
}
if (csi_id == 1)
val |= IPU_CONF_CSI_SEL;
else
val &= ~IPU_CONF_CSI_SEL;
ipu_cm_write(ipu, val, IPU_CONF);
spin_unlock_irqrestore(&ipu->lock, flags);