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cec: none tv chip set arc cause crash [1/1]

Browse Source 
PD#OTT-5149

Problem:
ceca isr cost long time, and delayed vdin vs.

Solution:
move function to tasklet

Verify:
test on txlx customer platform.

Change-Id: Iaae5b682f858787b25527518d2f787c3ee73e1be
Signed-off-by: Yong Qin <yong.qin@amlogic.com>
This commit is contained in:
Yong Qin
2019-07-12 14:12:06 +08:00
committed by Luke Go
parent 6b1df50cfd
commit 6b752d167f
2 changed files with 50 additions and 9 deletions
Download Patch File Download Diff File Expand all files Collapse all files

44
drivers/amlogic/cec/hdmi_ao_cec.c
View File

@@ -76,7 +76,7 @@ static struct early_suspend aocec_suspend_handler;
#endif
struct cec_platform_data_s {
/*unsigned int chip_id;*/
enum cec_chip_ver chip_id;
unsigned char line_reg;/*cec gpio_i reg:0 ao;1 periph*/
unsigned int line_bit;/*cec gpio position in reg*/
bool ee_to_ao;/*ee cec hw module mv to ao;ao cec delete*/
@@ -1229,15 +1229,21 @@ void cec_clear_all_logical_addr(unsigned int cec_sel)
void cec_enable_arc_pin(bool enable)
{
unsigned int data;
unsigned int chipid = cec_dev->plat_data->chip_id;
if (is_meson_sm1_cpu() ||
cpu_after_eq(MESON_CPU_MAJOR_ID_TM2)) {
/*sm1 and tm2 later, audio module handle this*/
/* box no arc out*/
if ((chipid != CEC_CHIP_TXL) &&
(chipid != CEC_CHIP_TXLX) &&
(chipid != CEC_CHIP_TL1) &&
(chipid != CEC_CHIP_TM2))
return;
}
if (cec_dev->plat_data->cecb_ver >= CECB_VER_2) {
/*tm2 later, audio module handle this*/
if (chipid >= CEC_CHIP_TM2)
return;
/* tl1 tm2*/
if (chipid == CEC_CHIP_TL1) {
data = rd_reg_hhi(HHI_HDMIRX_ARC_CNTL);
/* enable bit 1:1 bit 0: 0*/
if (enable)
@@ -1247,7 +1253,7 @@ void cec_enable_arc_pin(bool enable)
wr_reg_hhi(HHI_HDMIRX_ARC_CNTL, data);
CEC_INFO("set arc en:%d, reg:%x\n", enable, data);
} else {
/* select arc according arg */
/* only tv chip select arc according arg */
if (enable)
hdmirx_wr_top(TOP_ARCTX_CNTL, 0x01);
else
@@ -3277,6 +3283,7 @@ static void aocec_late_resume(struct early_suspend *h)
#ifdef CONFIG_OF
static const struct cec_platform_data_s cec_gxl_data = {
.chip_id = CEC_CHIP_GXL,
.line_reg = 0,
.line_bit = 8,
.ee_to_ao = 0,
@@ -3287,6 +3294,7 @@ static const struct cec_platform_data_s cec_gxl_data = {
};
static const struct cec_platform_data_s cec_txlx_data = {
.chip_id = CEC_CHIP_TXLX,
.line_reg = 0,
.line_bit = 7,
.ee_to_ao = 1,
@@ -3297,6 +3305,18 @@ static const struct cec_platform_data_s cec_txlx_data = {
};
static const struct cec_platform_data_s cec_g12a_data = {
.chip_id = CEC_CHIP_G12A,
.line_reg = 1,
.line_bit = 3,
.ee_to_ao = 1,
.ceca_sts_reg = 0,
.ceca_ver = CECA_VER_0,
.cecb_ver = CECB_VER_1,
.share_io = false,
};
static const struct cec_platform_data_s cec_g12b_data = {
.chip_id = CEC_CHIP_G12B,
.line_reg = 1,
.line_bit = 3,
.ee_to_ao = 1,
@@ -3307,6 +3327,7 @@ static const struct cec_platform_data_s cec_g12a_data = {
};
static const struct cec_platform_data_s cec_txl_data = {
.chip_id = CEC_CHIP_TXL,
.line_reg = 0,
.line_bit = 7,
.ee_to_ao = 0,
@@ -3317,6 +3338,7 @@ static const struct cec_platform_data_s cec_txl_data = {
};
static const struct cec_platform_data_s cec_tl1_data = {
.chip_id = CEC_CHIP_TL1,
.line_reg = 0,
.line_bit = 10,
.ee_to_ao = 1,
@@ -3327,6 +3349,7 @@ static const struct cec_platform_data_s cec_tl1_data = {
};
static const struct cec_platform_data_s cec_sm1_data = {
.chip_id = CEC_CHIP_SM1,
.line_reg = 1,
.line_bit = 3,
.ee_to_ao = 1,
@@ -3337,6 +3360,7 @@ static const struct cec_platform_data_s cec_sm1_data = {
};
static const struct cec_platform_data_s cec_tm2_data = {
.chip_id = CEC_CHIP_TM2,
.line_reg = 0,
.line_bit = 3,
.ee_to_ao = 1,
@@ -3359,6 +3383,10 @@ static const struct of_device_id aml_cec_dt_match[] = {
.compatible = "amlogic, aocec-g12a",
.data = &cec_g12a_data,
},
{
.compatible = "amlogic, aocec-g12b",
.data = &cec_g12b_data,
},
{
.compatible = "amlogic, aocec-txl",
.data = &cec_txl_data,

15
drivers/amlogic/cec/hdmi_ao_cec.h
View File

@@ -19,7 +19,7 @@
#define __AO_CEC_H__
#define CEC_DRIVER_VERSION "2019/6/26: ceca int cost long time\n"
#define CEC_DRIVER_VERSION "2019/7/12: add cec chip id\n"
#define CEC_FRAME_DELAY msecs_to_jiffies(400)
#define CEC_DEV_NAME "cec"
@@ -29,6 +29,19 @@
#define CEC_PHY_PORT_NUM 4
#define HR_DELAY(n) (ktime_set(0, n * 1000 * 1000))
enum cec_chip_ver {
CEC_CHIP_GXL = 0,
CEC_CHIP_GXM,
CEC_CHIP_TXL,
CEC_CHIP_TXLX,
CEC_CHIP_TXHD,
CEC_CHIP_G12A,
CEC_CHIP_G12B,
CEC_CHIP_SM1,
CEC_CHIP_TL1,
CEC_CHIP_TM2,
};
enum cecaver {
/*
* first version, only support one logical addr