shinys000114/linux
1
0
Fork 0
mirror of https://github.com/hardkernel/linux.git synced 2026-06-07 19:30:30 +09:00
Code Issues Packages Projects Releases Wiki Activity

lcd: add mipi-dsi support for sm1 [2/2]

Browse Source 
PD#SWPL-6114

Problem:
add mipi-dsi support for sm1

Solution:
add lcd_chip_sm1

Verify:
verify by S905x3

Change-Id: I1b95676ad1300f8cbf859f89b557f680cccff117
Signed-off-by: Evoke Zhang <evoke.zhang@amlogic.com>
This commit is contained in:
Evoke Zhang
2019-03-20 18:54:47 +08:00
committed by Luan Yuan
parent eead0b2e8a
commit 6be67a49ba
15 changed files with 1029 additions and 6 deletions
Download Patch File Download Diff File Expand all files Collapse all files

5
MAINTAINERS
View File

@@ -14793,6 +14793,11 @@ M: Shunzhou Jiang <shunzhou.jiang@amlogic.com>
F: drivers/amlogic/power/power_ctrl.c
F: include/linux/amlogic/power_ctrl.h
AMLOGIC SM1 DTS
M: shaochan.liu <shaochan.liu@amlogic.com>
F: arch/arm64/boot/dts/amlogic/mesonsm1_skt-panel.dtsi
F: arch/arm/boot/dts/amlogic/mesonsm1_skt-panel.dtsi
AMLOGIC TL1 VAD
M: Wenbiao Zhang <wenbiao.zhang@amlogic.com>
F: include/linux/amlogic/vad_api.h

4
arch/arm/boot/dts/amlogic/mesong12a_skt-panel.dtsi
View File

@@ -34,8 +34,8 @@
"encl_top_gate",
"encl_int_gate",
"gp0_pll";
reg = <0x0 0xffd07000 0x0 0x400 /* dsi_host */
0x0 0xff644000 0x0 0x200>; /* dsi_phy */
reg = <0xffd07000 0x400 /* dsi_host */
0xff644000 0x200>; /* dsi_phy */
interrupts = <0 3 1
0 56 1>;
interrupt-names = "vsync","vsync2";

503
arch/arm/boot/dts/amlogic/mesonsm1_skt-panel.dtsi Normal file
View File

@@ -0,0 +1,503 @@
/*
* arch/arm64/boot/dts/amlogic/mesong12a_skt-panel.dtsi
*
* Copyright (C) 2016 Amlogic, Inc. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
*/
/ {
lcd{
compatible = "amlogic, sm1";
dev_name = "lcd";
mode = "tablet";
status = "okay";
key_valid = <0>;
clocks = <&clkc CLKID_MIPI_DSI_HOST
&clkc CLKID_MIPI_DSI_PHY
&clkc CLKID_DSI_MEAS_COMP
&clkc CLKID_VCLK2_ENCL
&clkc CLKID_VCLK2_VENCL
&clkc CLKID_GP0_PLL>;
clock-names = "dsi_host_gate",
"dsi_phy_gate",
"dsi_meas",
"encl_top_gate",
"encl_int_gate",
"gp0_pll";
reg = <0xffd07000 0x400 /* dsi_host */
0xff644000 0x200>; /* dsi_phy */
interrupts = <0 3 1
0 56 1>;
interrupt-names = "vsync","vsync2";
pinctrl_version = <2>; /* for uboot */
/* power type:
* (0=cpu_gpio, 1=pmu_gpio, 2=signal,3=extern, 0xff=ending)
* power index:
* (point gpios_index, or extern_index,0xff=invalid)
* power value:(0=output low, 1=output high, 2=input)
* power delay:(unit in ms)
*/
lcd_cpu-gpios = <&gpio GPIOZ_9 GPIO_ACTIVE_HIGH
&gpio GPIOZ_8 GPIO_ACTIVE_HIGH>;
lcd_cpu_gpio_names = "GPIOZ_9","GPIOZ_8";
lcd_0{
model_name = "B080XAN01";
interface = "mipi";
basic_setting = <768 1024 /*h_active, v_active*/
948 1140 /*h_period, v_period*/
8 /*lcd_bits*/
119 159>; /*screen_widht, screen_height*/
lcd_timing = <64 56 0 /*hs_width, hs_bp, hs_pol*/
50 30 0>; /*vs_width, vs_bp, vs_pol*/
clk_attr = <0 /*fr_adj_type(0=clk, 1=htotal, 2=vtotal)*/
0 /*clk_ss_level */
1 /*clk_auto_generate*/
64843200>; /*pixel_clk(unit in Hz)*/
mipi_attr = <4 /*lane_num*/
550 /*bit_rate_max(MHz)*/
0 /*factor(*100, default 0 for auto)*/
1 /*operation_mode_init(0=video, 1=command)*/
0 /*operation_mode_display(0=video, 1=command)*/
2 /*
*video_mode_type
*(0=sync_pulse,1=sync_event,2=burst)
*/
1 /*clk_always_hs(0=disable,1=enable)*/
0>; /*phy_switch(0=auto,1=standard,2=slow)*/
/* dsi_init: data_type, num, data... */
dsi_init_on = <0x05 1 0x11
0xff 20 /*delay(ms)*/
0x05 1 0x29
0xff 20 /*delay(ms)*/
0xff 0xff>; /*ending*/
dsi_init_off = <0x05 1 0x28
0xff 10 /*delay(ms)*/
0x05 1 0x10
0xff 10 /*delay(ms)*/
0xff 0xff>; /*ending*/
extern_init = <0xff>; /*0xff for invalid*/
/* power step: type, index, value, delay(ms) */
power_on_step = <
0 1 0 100
0 0 0 10
0 0 1 20
2 0 0 0
0xff 0 0 0>; /*ending*/
power_off_step = <
2 0 0 50
0 0 0 10
0 1 1 100
0xff 0 0 0>; /*ending*/
backlight_index = <0>;
};
lcd_1{
model_name = "P070ACB_FT";
interface = "mipi";
basic_setting = <600 1024 /*h_active, v_active*/
770 1070 /*h_period, v_period*/
8 /*lcd_bits*/
3 5>; /*screen_widht, screen_height*/
lcd_timing = <10 80 0 /*hs_width,hs_bp,hs_pol*/
6 20 0>; /*vs_width,vs_bp,vs_pol*/
clk_attr = <0 /*fr_adj_type(0=clock,1=htotal,2=vtotal)*/
0 /*clk_ss_level*/
1 /*clk_auto_generate*/
49434000>; /*pixel_clk(unit in Hz)*/
mipi_attr = <4 /*lane_num*/
400 /*bit_rate_max(MHz)*/
0 /*factor(*100, default 0 for auto)*/
1 /*operation_mode_init(0=video, 1=command)*/
0 /*operation_mode_display(0=video, 1=command)*/
2 /*
*video_mode_type
*(0=sync_pulse,1=sync_event,2=burst)
*/
0 /*clk_always_hs(0=disable,1=enable)*/
0>; /*phy_switch(0=auto,1=standard,2=slow)*/
/* dsi_init: data_type, num, data... */
dsi_init_on = <
0xff 10
0xf0 3 0 1 30 /* reset high, delay 30ms */
0xf0 3 0 0 10 /* reset low, delay 10ms */
0xf0 3 0 1 30 /* reset high, delay 30ms */
0xfc 2 0x04 3 /* check_reg, check_cnt */
0xff 0xff>; /* ending flag */
dsi_init_off = <0xff 0xff>; /* ending flag */
/* extern_init: 0xff for invalid */
extern_init = <5>;
/* power step: type,index,value,delay(ms) */
power_on_step = <
0 1 0 200 /* panel power on */
2 0 0 0
0xff 0 0 0>;
power_off_step = <
2 0 0 0
0 0 0 20 /* reset low */
0 1 1 100 /* panel power off */
0xff 0 0 0>;
backlight_index = <0>;
};
};
lcd_extern{
compatible = "amlogic, lcd_extern";
dev_name = "lcd_extern";
status = "okay";
i2c_bus = "i2c_bus_0";
key_valid = <0>;
extern_0{
index = <0>;
extern_name = "mipi_default";/*default*/
status = "okay";
type = <2>; /* 0=i2c, 1=spi, 2=mipi */
cmd_size = <0xff>;
init_on = <
0xff 10
0x05 1 0x11
0xff 120 /* delay 120ms */
0x05 1 0x29
0xff 0xff>; /*ending*/
init_off = <
0x05 1 0x28 /* display off */
0xff 10 /* delay 10ms */
0x05 1 0x10 /* sleep in */
0xff 150 /* delay 150ms */
0xff 0xff>; /*ending*/
};
extern_1{
index = <1>;
extern_name = "mipi_default";/*P070ACB_FT*/
status = "okay";
type = <2>; /* 0=i2c, 1=spi, 2=mipi */
cmd_size = <0xff>;
init_on = <
0x23 2 0xE0 0x00 /* Page 0 */
0x23 2 0xE1 0x93 /* PASSWORD */
0x23 2 0xE2 0x65
0x23 2 0xE3 0xF8
0x23 2 0x80 0x03
0x23 2 0xE0 0x01 /* Page 01 */
0x23 2 0x0C 0x74 /* Set PWRIC */
0x23 2 0x17 0x00 /* Set Gamma Power */
0x23 2 0x18 0xEF /* VGMP=5.1V */
0x23 2 0x19 0x00
0x23 2 0x1A 0x00
0x23 2 0x1B 0xEF /* VGMN=-5.1V */
0x23 2 0x1C 0x00
0x23 2 0x1F 0x70 /* Set Gate Power */
0x23 2 0x20 0x2D
0x23 2 0x21 0x2D
0x23 2 0x22 0x7E
0x23 2 0x26 0xF3 /* VDDD from IOVCC */
0x23 2 0x37 0x09 /* SetPanel */
0x23 2 0x38 0x04 /* SET RGBCYC */
0x23 2 0x39 0x00
0x23 2 0x3A 0x01
0x23 2 0x3C 0x90
0x23 2 0x3D 0xFF
0x23 2 0x3E 0xFF
0x23 2 0x3F 0xFF
0x23 2 0x40 0x02 /* Set TCON */
0x23 2 0x41 0x80
0x23 2 0x42 0x99
0x23 2 0x43 0x14
0x23 2 0x44 0x19
0x23 2 0x45 0x5A
0x23 2 0x4B 0x04
0x23 2 0x55 0x02 /* power voltage */
0x23 2 0x56 0x01
0x23 2 0x57 0x69
0x23 2 0x58 0x0A
0x23 2 0x59 0x0A
0x23 2 0x5A 0x2E /* VGH = 16.2V */
0x23 2 0x5B 0x19 /* VGL = -12V */
0x23 2 0x5C 0x15
0x23 2 0x5D 0x77 /* Gamma */
0x23 2 0x5E 0x56
0x23 2 0x5F 0x45
0x23 2 0x60 0x38
0x23 2 0x61 0x35
0x23 2 0x62 0x27
0x23 2 0x63 0x2D
0x23 2 0x64 0x18
0x23 2 0x65 0x33
0x23 2 0x66 0x34
0x23 2 0x67 0x35
0x23 2 0x68 0x56
0x23 2 0x69 0x45
0x23 2 0x6A 0x4F
0x23 2 0x6B 0x42
0x23 2 0x6C 0x40
0x23 2 0x6D 0x34
0x23 2 0x6E 0x25
0x23 2 0x6F 0x02
0x23 2 0x70 0x77
0x23 2 0x71 0x56
0x23 2 0x72 0x45
0x23 2 0x73 0x38
0x23 2 0x74 0x35
0x23 2 0x75 0x27
0x23 2 0x76 0x2D
0x23 2 0x77 0x18
0x23 2 0x78 0x33
0x23 2 0x79 0x34
0x23 2 0x7A 0x35
0x23 2 0x7B 0x56
0x23 2 0x7C 0x45
0x23 2 0x7D 0x4F
0x23 2 0x7E 0x42
0x23 2 0x7F 0x40
0x23 2 0x80 0x34
0x23 2 0x81 0x25
0x23 2 0x82 0x02
0x23 2 0xE0 0x02 /* Page2 */
0x23 2 0x00 0x53
/* GIP_L Pin mapping RESET_EVEN */
0x23 2 0x01 0x55 /* VSSG_EVEN */
0x23 2 0x02 0x55 /* VSSA_EVEN */
0x23 2 0x03 0x51 /* STV2_EVEN */
0x23 2 0x04 0x77 /* VDD2_EVEN */
0x23 2 0x05 0x57 /* VDD1_EVEN */
0x23 2 0x06 0x1F
0x23 2 0x07 0x4F /* CK12 */
0x23 2 0x08 0x4D /* CK10 */
0x23 2 0x09 0x1F
0x23 2 0x0A 0x4B /* CK8 */
0x23 2 0x0B 0x49 /* CK6 */
0x23 2 0x0C 0x1F
0x23 2 0x0D 0x47 /* CK4 */
0x23 2 0x0E 0x45 /* CK2 */
0x23 2 0x0F 0x41 /* STV1_EVEN */
0x23 2 0x10 0x1F
0x23 2 0x11 0x1F
0x23 2 0x12 0x1F
0x23 2 0x13 0x55 /* VGG */
0x23 2 0x14 0x1F
0x23 2 0x15 0x1F
0x23 2 0x16 0x52
/* GIP_R Pin mapping RESET_ODD */
0x23 2 0x17 0x55 /* VSSG_ODD */
0x23 2 0x18 0x55 /* VSSA_ODD */
0x23 2 0x19 0x50 /* STV2_ODD */
0x23 2 0x1A 0x77 /* VDD2_ODD */
0x23 2 0x1B 0x57 /* VDD1_ODD */
0x23 2 0x1C 0x1F
0x23 2 0x1D 0x4E /* CK11 */
0x23 2 0x1E 0x4C /* CK9 */
0x23 2 0x1F 0x1F
0x23 2 0x20 0x4A /* CK7 */
0x23 2 0x21 0x48 /* CK5 */
0x23 2 0x22 0x1F
0x23 2 0x23 0x46 /* CK3 */
0x23 2 0x24 0x44 /* CK1 */
0x23 2 0x25 0x40 /* STV1_ODD */
0x23 2 0x26 0x1F
0x23 2 0x27 0x1F
0x23 2 0x28 0x1F
0x23 2 0x29 0x1F
0x23 2 0x2A 0x1F
0x23 2 0x2B 0x55 /* VGG */
0x23 2 0x2C 0x12 /* GIP_L_GS Pin mapping */
0x23 2 0x2D 0x15
0x23 2 0x2E 0x15
0x23 2 0x2F 0x00
0x23 2 0x30 0x37
0x23 2 0x31 0x17
0x23 2 0x32 0x1F
0x23 2 0x33 0x08
0x23 2 0x34 0x0A
0x23 2 0x35 0x1F
0x23 2 0x36 0x0C
0x23 2 0x37 0x0E
0x23 2 0x38 0x1F
0x23 2 0x39 0x04
0x23 2 0x3A 0x06
0x23 2 0x3B 0x10
0x23 2 0x3C 0x1F
0x23 2 0x3D 0x1F
0x23 2 0x3E 0x1F
0x23 2 0x3F 0x15
0x23 2 0x40 0x1F
0x23 2 0x41 0x1F
0x23 2 0x42 0x13 /* GIP_R_GS Pin mapping */
0x23 2 0x43 0x15
0x23 2 0x44 0x15
0x23 2 0x45 0x01
0x23 2 0x46 0x37
0x23 2 0x47 0x17
0x23 2 0x48 0x1F
0x23 2 0x49 0x09
0x23 2 0x4A 0x0B
0x23 2 0x4B 0x1F
0x23 2 0x4C 0x0D
0x23 2 0x4D 0x0F
0x23 2 0x4E 0x1F
0x23 2 0x4F 0x05
0x23 2 0x50 0x07
0x23 2 0x51 0x11
0x23 2 0x52 0x1F
0x23 2 0x53 0x1F
0x23 2 0x54 0x1F
0x23 2 0x55 0x1F
0x23 2 0x56 0x1F
0x23 2 0x57 0x15
0x23 2 0x58 0x40 /* GIP Timing */
0x23 2 0x59 0x00
0x23 2 0x5A 0x00
0x23 2 0x5B 0x10
0x23 2 0x5C 0x14
0x23 2 0x5D 0x40
0x23 2 0x5E 0x01
0x23 2 0x5F 0x02
0x23 2 0x60 0x40
0x23 2 0x61 0x03
0x23 2 0x62 0x04
0x23 2 0x63 0x7A
0x23 2 0x64 0x7A
0x23 2 0x65 0x74
0x23 2 0x66 0x16
0x23 2 0x67 0xB4
0x23 2 0x68 0x16
0x23 2 0x69 0x7A
0x23 2 0x6A 0x7A
0x23 2 0x6B 0x0C
0x23 2 0x6C 0x00
0x23 2 0x6D 0x04
0x23 2 0x6E 0x04
0x23 2 0x6F 0x88
0x23 2 0x70 0x00
0x23 2 0x71 0x00
0x23 2 0x72 0x06
0x23 2 0x73 0x7B
0x23 2 0x74 0x00
0x23 2 0x75 0xBC
0x23 2 0x76 0x00
0x23 2 0x77 0x04
0x23 2 0x78 0x2C
0x23 2 0x79 0x00
0x23 2 0x7A 0x00
0x23 2 0x7B 0x00
0x23 2 0x7C 0x00
0x23 2 0x7D 0x03
0x23 2 0x7E 0x7B
0x23 2 0xE0 0x04 /* Page4 */
0x23 2 0x09 0x11 /* Set RGBCYC2 */
0x23 2 0x0E 0x48
0x23 2 0x2B 0x2B /* ESD Protect */
0x23 2 0x2E 0x44
0x23 2 0xE0 0x00 /* Page0 */
0x23 2 0xE6 0x02 /* Watch dog */
0x23 2 0xE7 0x0C
0x05 1 0x11 /* sleep out */
0xff 120
0x05 1 0x29 /* display on */
0x05 1 0x35
0xFF 20 /* delay(ms) */
0xFF 0xFF>; /*ending*/
init_off = <
0x05 1 0x28 /* display off */
0xff 10 /* delay 10ms */
0x05 1 0x10 /* sleep in */
0xff 150 /* delay 150ms */
0xff 0xff>; /*ending*/
};
};
backlight{
compatible = "amlogic, backlight-sm1";
dev_name = "backlight";
status = "okay";
key_valid = <0>;
pinctrl-names = "pwm_on","pwm_off";
pinctrl-0 = <&pwm_f_pins2>;
pinctrl-1 = <&bl_pwm_off_pins>;
pinctrl_version = <2>; /* for uboot */
bl_pwm_config = <&bl_pwm_conf>;
bl-gpios = <&gpio GPIOH_4 GPIO_ACTIVE_HIGH
&gpio GPIOH_5 GPIO_ACTIVE_HIGH>;
bl_gpio_names = "GPIOH_4","GPIOH_5";
/* pwm port: PWM_A, PWM_B, PWM_C, PWM_D, PWM_E, PWM_F, PWM_VS*/
/* power index:(point gpios_index, 0xff=invalid)
* power value:(0=output low, 1=output high, 2=input)
* power delay:(unit in ms)
*/
backlight_0{
index = <0>;
bl_name = "backlight_pwm";
bl_level_default_uboot_kernel = <100 100>;
bl_level_attr = <255 10 /*max, min*/
128 128>; /*mid, mid_mapping*/
bl_ctrl_method = <1>; /* 1=pwm, 2=pwm_combo, 4=extern */
bl_power_attr = <0 /*en_gpio_index*/
1 0 /*on_value, off_value*/
200 200>; /*on_delay(ms), off_delay(ms)*/
bl_pwm_port = "PWM_F";
bl_pwm_attr = <0 /*pwm_method*/
180 /*pwm_freq(pwm:Hz, pwm_vs:multiple of vs)*/
100 25>; /*duty_max(%), duty_min(%)*/
bl_pwm_power = <1 1 /*pwm_gpio_index, pwm_gpio_off*/
10 10>; /*pwm_on_delay(ms), pwm_off_delay(ms)*/
bl_pwm_en_sequence_reverse = <0>; /* 1 for reverse */
};
backlight_1{
index = <1>;
bl_name = "bl_extern";
bl_level_default_uboot_kernel = <100 100>;
bl_level_attr = <255 10 /*max, min*/
128 128>; /*mid, mid_mapping*/
bl_ctrl_method = <4>; /*1=pwm, 2=pwm_combo, 4=extern*/
bl_power_attr = <1 /*en_gpio_index*/
1 0 /*on_value, off_value*/
200 200>; /*on_delay(ms), off_delay(ms)*/
bl_extern_index = <0>;
};
};
bl_pwm_conf:bl_pwm_conf{
pwm_channel_0 {
pwm_port_index = <5>;
pwms = <&pwm_ef MESON_PWM_1 30040 0>;
};
};
bl_extern{
compatible = "amlogic, bl_extern";
dev_name = "bl_extern";
status = "disabled";
i2c_bus = "i2c_bus_3";
extern_0{
index = <0>;
extern_name = "i2c_lp8556";
type = <0>; /*0=i2c, 1=spi, 2=mipi*/
i2c_address = <0x2c>; /*7bit i2c address*/
dim_max_min = <255 10>;
};
extern_1{
index = <1>;
extern_name = "mipi_lt070me05";
type = <2>; /*0=i2c, 1=spi, 2=mipi*/
dim_max_min = <255 10>;
};
};
};/* end of panel */

2
arch/arm/boot/dts/amlogic/sm1_s905d3_ac200.dts
View File

@@ -19,7 +19,7 @@
#include "mesonsm1.dtsi"
#include "partition_mbox_normal.dtsi"
#include "mesong12a_skt-panel.dtsi"
#include "mesonsm1_skt-panel.dtsi"
/ {
model = "Amlogic";

2
arch/arm/boot/dts/amlogic/sm1_s905d3_skt.dts
View File

@@ -19,7 +19,7 @@
#include "mesonsm1.dtsi"
#include "partition_mbox_normal.dtsi"
#include "mesong12a_skt-panel.dtsi"
#include "mesonsm1_skt-panel.dtsi"
/ {
model = "Amlogic";

488
arch/arm64/boot/dts/amlogic/mesonsm1_skt-panel.dtsi Normal file
View File

@@ -0,0 +1,488 @@
/*
*
* Copyright (C) 2019 Amlogic, Inc. All rights reserved.
*
*/
/ {
lcd{
compatible = "amlogic, lcd-sm1";
mode = "tablet";
status = "okay";
key_valid = <0>;
clocks = <&clkc CLKID_MIPI_DSI_HOST
&clkc CLKID_MIPI_DSI_PHY
&clkc CLKID_DSI_MEAS_COMP
&clkc CLKID_VCLK2_ENCL
&clkc CLKID_VCLK2_VENCL
&clkc CLKID_GP0_PLL>;
clock-names = "dsi_host_gate",
"dsi_phy_gate",
"dsi_meas",
"encl_top_gate",
"encl_int_gate",
"gp0_pll";
reg = <0x0 0xffd07000 0x0 0x400 /* dsi_host */
0x0 0xff644000 0x0 0x200>; /* dsi_phy */
interrupts = <0 3 1
0 56 1>;
interrupt-names = "vsync","vsync2";
pinctrl_version = <2>; /* for uboot */
/* power type:
* (0=cpu_gpio, 1=pmu_gpio, 2=signal,3=extern, 0xff=ending)
* power index:
* (point gpios_index, or extern_index,0xff=invalid)
* power value:(0=output low, 1=output high, 2=input)
* power delay:(unit in ms)
*/
lcd_cpu-gpios = <&gpio GPIOZ_9 GPIO_ACTIVE_HIGH
&gpio GPIOZ_8 GPIO_ACTIVE_HIGH>;
lcd_cpu_gpio_names = "GPIOZ_9","GPIOZ_8";
lcd_0{
model_name = "B080XAN01";
interface = "mipi";
basic_setting = <768 1024 /*h_active, v_active*/
948 1140 /*h_period, v_period*/
8 /*lcd_bits*/
119 159>; /*screen_widht, screen_height*/
lcd_timing = <64 56 0 /*hs_width, hs_bp, hs_pol*/
50 30 0>; /*vs_width, vs_bp, vs_pol*/
clk_attr = <0 /*fr_adj_type(0=clk, 1=htotal, 2=vtotal)*/
0 /*clk_ss_level */
1 /*clk_auto_generate*/
64843200>; /*pixel_clk(unit in Hz)*/
mipi_attr = <4 /*lane_num*/
550 /*bit_rate_max(MHz)*/
0 /*factor(*100, default 0 for auto)*/
1 /*operation_mode_init(0=video, 1=command)*/
0 /*operation_mode_display(0=video, 1=command)*/
2 /*
*video_mode_type
*(0=sync_pulse,1=sync_event,2=burst)
*/
1 /*clk_always_hs(0=disable,1=enable)*/
0>; /*phy_switch(0=auto,1=standard,2=slow)*/
/* dsi_init: data_type, num, data... */
dsi_init_on = <0x05 1 0x11
0xfd 1 20 /*delay(ms)*/
0x05 1 0x29
0xfd 1 20 /*delay(ms)*/
0xff 0>; /*ending*/
dsi_init_off = <0x05 1 0x28
0xfd 1 10 /*delay(ms)*/
0x05 1 0x10
0xfd 1 10 /*delay(ms)*/
0xff 0>; /*ending*/
extern_init = <0xff>; /*0xff for invalid*/
/* power step: type, index, value, delay(ms) */
power_on_step = <
0 1 0 100
0 0 0 10
0 0 1 20
2 0 0 0
0xff 0 0 0>; /*ending*/
power_off_step = <
2 0 0 50
0 0 0 10
0 1 1 100
0xff 0 0 0>; /*ending*/
backlight_index = <0>;
};
lcd_1{
model_name = "P070ACB_FT";
interface = "mipi";
basic_setting = <600 1024 /*h_active, v_active*/
770 1070 /*h_period, v_period*/
8 /*lcd_bits*/
3 5>; /*screen_widht, screen_height*/
lcd_timing = <10 80 0 /*hs_width,hs_bp,hs_pol*/
6 20 0>; /*vs_width,vs_bp,vs_pol*/
clk_attr = <0 /*fr_adj_type(0=clock,1=htotal,2=vtotal)*/
0 /*clk_ss_level*/
1 /*clk_auto_generate*/
49434000>; /*pixel_clk(unit in Hz)*/
mipi_attr = <4 /*lane_num*/
400 /*bit_rate_max(MHz)*/
0 /*factor(*100, default 0 for auto)*/
1 /*operation_mode_init(0=video, 1=command)*/
0 /*operation_mode_display(0=video, 1=command)*/
2 /*
*video_mode_type
*(0=sync_pulse,1=sync_event,2=burst)
*/
0 /*clk_always_hs(0=disable,1=enable)*/
0>; /*phy_switch(0=auto,1=standard,2=slow)*/
/* dsi_init: data_type, num, data... */
dsi_init_on = <
0xff 10
0xf0 3 0 1 30 /* reset high, delay 30ms */
0xf0 3 0 0 10 /* reset low, delay 10ms */
0xf0 3 0 1 30 /* reset high, delay 30ms */
0xfc 2 0x04 3 /* check_reg, check_cnt */
0xff 0>; /* ending flag */
dsi_init_off = <0xff 0>; /* ending flag */
/* extern_init: 0xff for invalid */
extern_init = <5>;
/* power step: type,index,value,delay(ms) */
power_on_step = <
0 1 0 200 /* panel power on */
2 0 0 0
0xff 0 0 0>;
power_off_step = <
2 0 0 0
0 0 0 20 /* reset low */
0 1 1 100 /* panel power off */
0xff 0 0 0>;
backlight_index = <0>;
};
};
lcd_extern{
compatible = "amlogic, lcd_extern";
status = "okay";
i2c_bus = "i2c_bus_0";
key_valid = <0>;
extern_0{
index = <0>;
extern_name = "mipi_default";/*default*/
status = "okay";
type = <2>; /* 0=i2c, 1=spi, 2=mipi */
cmd_size = <0xff>;
init_on = <
0xfd 1 10
0x05 1 0x11
0xfd 1 120 /* delay 120ms */
0x05 1 0x29
0xff 0>; /*ending*/
init_off = <
0x05 1 0x28 /* display off */
0xfd 1 10 /* delay 10ms */
0x05 1 0x10 /* sleep in */
0xfd 1 150 /* delay 150ms */
0xff 0>; /*ending*/
};
extern_1{
index = <1>;
extern_name = "mipi_default";/*P070ACB_FT*/
status = "okay";
type = <2>; /* 0=i2c, 1=spi, 2=mipi */
cmd_size = <0xff>;
init_on = <
0x23 2 0xE0 0x00 /* Page 0 */
0x23 2 0xE1 0x93 /* PASSWORD */
0x23 2 0xE2 0x65
0x23 2 0xE3 0xF8
0x23 2 0x80 0x03
0x23 2 0xE0 0x01 /* Page 01 */
0x23 2 0x0C 0x74 /* Set PWRIC */
0x23 2 0x17 0x00 /* Set Gamma Power */
0x23 2 0x18 0xEF /* VGMP=5.1V */
0x23 2 0x19 0x00
0x23 2 0x1A 0x00
0x23 2 0x1B 0xEF /* VGMN=-5.1V */
0x23 2 0x1C 0x00
0x23 2 0x1F 0x70 /* Set Gate Power */
0x23 2 0x20 0x2D
0x23 2 0x21 0x2D
0x23 2 0x22 0x7E
0x23 2 0x26 0xF3 /* VDDD from IOVCC */
0x23 2 0x37 0x09 /* SetPanel */
0x23 2 0x38 0x04 /* SET RGBCYC */
0x23 2 0x39 0x00
0x23 2 0x3A 0x01
0x23 2 0x3C 0x90
0x23 2 0x3D 0xFF
0x23 2 0x3E 0xFF
0x23 2 0x3F 0xFF
0x23 2 0x40 0x02 /* Set TCON */
0x23 2 0x41 0x80
0x23 2 0x42 0x99
0x23 2 0x43 0x14
0x23 2 0x44 0x19
0x23 2 0x45 0x5A
0x23 2 0x4B 0x04
0x23 2 0x55 0x02 /* power voltage */
0x23 2 0x56 0x01
0x23 2 0x57 0x69
0x23 2 0x58 0x0A
0x23 2 0x59 0x0A
0x23 2 0x5A 0x2E /* VGH = 16.2V */
0x23 2 0x5B 0x19 /* VGL = -12V */
0x23 2 0x5C 0x15
0x23 2 0x5D 0x77 /* Gamma */
0x23 2 0x5E 0x56
0x23 2 0x5F 0x45
0x23 2 0x60 0x38
0x23 2 0x61 0x35
0x23 2 0x62 0x27
0x23 2 0x63 0x2D
0x23 2 0x64 0x18
0x23 2 0x65 0x33
0x23 2 0x66 0x34
0x23 2 0x67 0x35
0x23 2 0x68 0x56
0x23 2 0x69 0x45
0x23 2 0x6A 0x4F
0x23 2 0x6B 0x42
0x23 2 0x6C 0x40
0x23 2 0x6D 0x34
0x23 2 0x6E 0x25
0x23 2 0x6F 0x02
0x23 2 0x70 0x77
0x23 2 0x71 0x56
0x23 2 0x72 0x45
0x23 2 0x73 0x38
0x23 2 0x74 0x35
0x23 2 0x75 0x27
0x23 2 0x76 0x2D
0x23 2 0x77 0x18
0x23 2 0x78 0x33
0x23 2 0x79 0x34
0x23 2 0x7A 0x35
0x23 2 0x7B 0x56
0x23 2 0x7C 0x45
0x23 2 0x7D 0x4F
0x23 2 0x7E 0x42
0x23 2 0x7F 0x40
0x23 2 0x80 0x34
0x23 2 0x81 0x25
0x23 2 0x82 0x02
0x23 2 0xE0 0x02 /* Page2 */
0x23 2 0x00 0x53
/* GIP_L Pin mapping RESET_EVEN */
0x23 2 0x01 0x55 /* VSSG_EVEN */
0x23 2 0x02 0x55 /* VSSA_EVEN */
0x23 2 0x03 0x51 /* STV2_EVEN */
0x23 2 0x04 0x77 /* VDD2_EVEN */
0x23 2 0x05 0x57 /* VDD1_EVEN */
0x23 2 0x06 0x1F
0x23 2 0x07 0x4F /* CK12 */
0x23 2 0x08 0x4D /* CK10 */
0x23 2 0x09 0x1F
0x23 2 0x0A 0x4B /* CK8 */
0x23 2 0x0B 0x49 /* CK6 */
0x23 2 0x0C 0x1F
0x23 2 0x0D 0x47 /* CK4 */
0x23 2 0x0E 0x45 /* CK2 */
0x23 2 0x0F 0x41 /* STV1_EVEN */
0x23 2 0x10 0x1F
0x23 2 0x11 0x1F
0x23 2 0x12 0x1F
0x23 2 0x13 0x55 /* VGG */
0x23 2 0x14 0x1F
0x23 2 0x15 0x1F
0x23 2 0x16 0x52
/* GIP_R Pin mapping RESET_ODD */
0x23 2 0x17 0x55 /* VSSG_ODD */
0x23 2 0x18 0x55 /* VSSA_ODD */
0x23 2 0x19 0x50 /* STV2_ODD */
0x23 2 0x1A 0x77 /* VDD2_ODD */
0x23 2 0x1B 0x57 /* VDD1_ODD */
0x23 2 0x1C 0x1F
0x23 2 0x1D 0x4E /* CK11 */
0x23 2 0x1E 0x4C /* CK9 */
0x23 2 0x1F 0x1F
0x23 2 0x20 0x4A /* CK7 */
0x23 2 0x21 0x48 /* CK5 */
0x23 2 0x22 0x1F
0x23 2 0x23 0x46 /* CK3 */
0x23 2 0x24 0x44 /* CK1 */
0x23 2 0x25 0x40 /* STV1_ODD */
0x23 2 0x26 0x1F
0x23 2 0x27 0x1F
0x23 2 0x28 0x1F
0x23 2 0x29 0x1F
0x23 2 0x2A 0x1F
0x23 2 0x2B 0x55 /* VGG */
0x23 2 0x2C 0x12 /* GIP_L_GS Pin mapping */
0x23 2 0x2D 0x15
0x23 2 0x2E 0x15
0x23 2 0x2F 0x00
0x23 2 0x30 0x37
0x23 2 0x31 0x17
0x23 2 0x32 0x1F
0x23 2 0x33 0x08
0x23 2 0x34 0x0A
0x23 2 0x35 0x1F
0x23 2 0x36 0x0C
0x23 2 0x37 0x0E
0x23 2 0x38 0x1F
0x23 2 0x39 0x04
0x23 2 0x3A 0x06
0x23 2 0x3B 0x10
0x23 2 0x3C 0x1F
0x23 2 0x3D 0x1F
0x23 2 0x3E 0x1F
0x23 2 0x3F 0x15
0x23 2 0x40 0x1F
0x23 2 0x41 0x1F
0x23 2 0x42 0x13 /* GIP_R_GS Pin mapping */
0x23 2 0x43 0x15
0x23 2 0x44 0x15
0x23 2 0x45 0x01
0x23 2 0x46 0x37
0x23 2 0x47 0x17
0x23 2 0x48 0x1F
0x23 2 0x49 0x09
0x23 2 0x4A 0x0B
0x23 2 0x4B 0x1F
0x23 2 0x4C 0x0D
0x23 2 0x4D 0x0F
0x23 2 0x4E 0x1F
0x23 2 0x4F 0x05
0x23 2 0x50 0x07
0x23 2 0x51 0x11
0x23 2 0x52 0x1F
0x23 2 0x53 0x1F
0x23 2 0x54 0x1F
0x23 2 0x55 0x1F
0x23 2 0x56 0x1F
0x23 2 0x57 0x15
0x23 2 0x58 0x40 /* GIP Timing */
0x23 2 0x59 0x00
0x23 2 0x5A 0x00
0x23 2 0x5B 0x10
0x23 2 0x5C 0x14
0x23 2 0x5D 0x40
0x23 2 0x5E 0x01
0x23 2 0x5F 0x02
0x23 2 0x60 0x40
0x23 2 0x61 0x03
0x23 2 0x62 0x04
0x23 2 0x63 0x7A
0x23 2 0x64 0x7A
0x23 2 0x65 0x74
0x23 2 0x66 0x16
0x23 2 0x67 0xB4
0x23 2 0x68 0x16
0x23 2 0x69 0x7A
0x23 2 0x6A 0x7A
0x23 2 0x6B 0x0C
0x23 2 0x6C 0x00
0x23 2 0x6D 0x04
0x23 2 0x6E 0x04
0x23 2 0x6F 0x88
0x23 2 0x70 0x00
0x23 2 0x71 0x00
0x23 2 0x72 0x06
0x23 2 0x73 0x7B
0x23 2 0x74 0x00
0x23 2 0x75 0xBC
0x23 2 0x76 0x00
0x23 2 0x77 0x04
0x23 2 0x78 0x2C
0x23 2 0x79 0x00
0x23 2 0x7A 0x00
0x23 2 0x7B 0x00
0x23 2 0x7C 0x00
0x23 2 0x7D 0x03
0x23 2 0x7E 0x7B
0x23 2 0xE0 0x04 /* Page4 */
0x23 2 0x09 0x11 /* Set RGBCYC2 */
0x23 2 0x0E 0x48
0x23 2 0x2B 0x2B /* ESD Protect */
0x23 2 0x2E 0x44
0x23 2 0xE0 0x00 /* Page0 */
0x23 2 0xE6 0x02 /* Watch dog */
0x23 2 0xE7 0x0C
0x05 1 0x11 /* sleep out */
0xfd 1 120
0x05 1 0x29 /* display on */
0x05 1 0x35
0xfd 1 20 /* delay(ms) */
0xFF 0>; /*ending*/
init_off = <
0x05 1 0x28 /* display off */
0xfd 1 10 /* delay 10ms */
0x05 1 0x10 /* sleep in */
0xfd 1 150 /* delay 150ms */
0xff 0>; /*ending*/
};
};
backlight{
compatible = "amlogic, backlight-sm1";
status = "okay";
key_valid = <0>;
pinctrl-names = "pwm_on","pwm_off";
pinctrl-0 = <&pwm_f_pins2>;
pinctrl-1 = <&bl_pwm_off_pins>;
pinctrl_version = <2>; /* for uboot */
bl_pwm_config = <&bl_pwm_conf>;
bl-gpios = <&gpio GPIOH_4 GPIO_ACTIVE_HIGH
&gpio GPIOH_5 GPIO_ACTIVE_HIGH>;
bl_gpio_names = "GPIOH_4","GPIOH_5";
/* pwm port: PWM_A, PWM_B, PWM_C, PWM_D, PWM_E, PWM_F, PWM_VS*/
/* power index:(point gpios_index, 0xff=invalid)
* power value:(0=output low, 1=output high, 2=input)
* power delay:(unit in ms)
*/
backlight_0{
index = <0>;
bl_name = "backlight_pwm";
bl_level_default_uboot_kernel = <100 100>;
bl_level_attr = <255 10 /*max, min*/
128 128>; /*mid, mid_mapping*/
bl_ctrl_method = <1>; /* 1=pwm, 2=pwm_combo, 4=extern */
bl_power_attr = <0 /*en_gpio_index*/
1 0 /*on_value, off_value*/
200 200>; /*on_delay(ms), off_delay(ms)*/
bl_pwm_port = "PWM_F";
bl_pwm_attr = <0 /*pwm_method*/
180 /*pwm_freq(pwm:Hz, pwm_vs:multiple of vs)*/
100 25>; /*duty_max(%), duty_min(%)*/
bl_pwm_power = <1 1 /*pwm_gpio_index, pwm_gpio_off*/
10 10>; /*pwm_on_delay(ms), pwm_off_delay(ms)*/
bl_pwm_en_sequence_reverse = <0>; /* 1 for reverse */
};
backlight_1{
index = <1>;
bl_name = "bl_extern";
bl_level_default_uboot_kernel = <100 100>;
bl_level_attr = <255 10 /*max, min*/
128 128>; /*mid, mid_mapping*/
bl_ctrl_method = <4>; /*1=pwm, 2=pwm_combo, 4=extern*/
bl_power_attr = <1 /*en_gpio_index*/
1 0 /*on_value, off_value*/
200 200>; /*on_delay(ms), off_delay(ms)*/
bl_extern_index = <0>;
};
};
bl_pwm_conf:bl_pwm_conf{
pwm_channel_0 {
pwm_port_index = <5>;
pwms = <&pwm_ef MESON_PWM_1 30040 0>;
};
};
bl_extern{
compatible = "amlogic, bl_extern";
status = "disabled";
i2c_bus = "i2c_bus_3";
extern_0{
index = <0>;
extern_name = "i2c_lp8556";
type = <0>; /*0=i2c, 1=spi, 2=mipi*/
i2c_address = <0x2c>; /*7bit i2c address*/
dim_max_min = <255 10>;
};
extern_1{
index = <1>;
extern_name = "mipi_lt070me05";
type = <2>; /*0=i2c, 1=spi, 2=mipi*/
dim_max_min = <255 10>;
};
};
};/* end of panel */

2
arch/arm64/boot/dts/amlogic/sm1_s905d3_ac200.dts
View File

@@ -19,7 +19,7 @@
#include "mesonsm1.dtsi"
#include "partition_mbox_normal.dtsi"
#include "mesong12a_skt-panel.dtsi"
#include "mesonsm1_skt-panel.dtsi"
/ {
model = "Amlogic";

2
arch/arm64/boot/dts/amlogic/sm1_s905d3_skt.dts
View File

@@ -19,7 +19,7 @@
#include "mesonsm1.dtsi"
#include "partition_mbox_normal.dtsi"
#include "mesong12a_skt-panel.dtsi"
#include "mesonsm1_skt-panel.dtsi"
/ {
model = "Amlogic";

10
drivers/amlogic/media/vout/backlight/aml_bl.c
View File

@@ -3231,6 +3231,12 @@ static struct bl_data_s bl_data_tl1 = {
.pwm_reg = pwm_reg_txlx,
};
static struct bl_data_s bl_data_sm1 = {
.chip_type = BL_CHIP_SM1,
.chip_name = "sm1",
.pwm_reg = pwm_reg_txlx,
};
static const struct of_device_id bl_dt_match_table[] = {
{
.compatible = "amlogic, backlight-gxl",
@@ -3264,6 +3270,10 @@ static const struct of_device_id bl_dt_match_table[] = {
.compatible = "amlogic, backlight-tl1",
.data = &bl_data_tl1,
},
{
.compatible = "amlogic, backlight-sm1",
.data = &bl_data_sm1,
},
{},
};
#endif

2
drivers/amlogic/media/vout/lcd/lcd_clk_config.c
View File

@@ -2666,6 +2666,7 @@ static void lcd_clk_config_chip_init(struct lcd_clk_config_s *cConf)
cConf->data = &lcd_clk_data_axg;
break;
case LCD_CHIP_G12A:
case LCD_CHIP_SM1:
if (lcd_drv->lcd_clk_path)
cConf->data = &lcd_clk_data_g12a_path1;
else
@@ -2709,6 +2710,7 @@ int lcd_clk_path_change(int sel)
switch (lcd_drv->data->chip_type) {
case LCD_CHIP_G12A:
case LCD_CHIP_G12B:
case LCD_CHIP_SM1:
if (sel)
cConf->data = &lcd_clk_data_g12a_path1;
else

1
drivers/amlogic/media/vout/lcd/lcd_debug.c
View File

@@ -4188,6 +4188,7 @@ int lcd_debug_probe(void)
break;
case LCD_CHIP_G12A:
case LCD_CHIP_G12B:
case LCD_CHIP_SM1:
if (lcd_drv->lcd_clk_path)
lcd_debug_info_reg = &lcd_debug_info_reg_g12a_clk_path1;
else

2
drivers/amlogic/media/vout/lcd/lcd_tablet/lcd_drv.c
View File

@@ -163,6 +163,7 @@ static void lcd_mipi_phy_set(struct lcd_config_s *pconf, int status)
switch (lcd_drv->data->chip_type) {
case LCD_CHIP_G12A:
case LCD_CHIP_G12B:
case LCD_CHIP_SM1:
/* HHI_MIPI_CNTL0 */
/* DIF_REF_CTL1:31-16bit, DIF_REF_CTL0:15-0bit */
lcd_hiu_write(HHI_MIPI_CNTL0,
@@ -223,6 +224,7 @@ static void lcd_mipi_phy_set(struct lcd_config_s *pconf, int status)
switch (lcd_drv->data->chip_type) {
case LCD_CHIP_G12A:
case LCD_CHIP_G12B:
case LCD_CHIP_SM1:
lcd_hiu_write(HHI_MIPI_CNTL0, 0);
lcd_hiu_write(HHI_MIPI_CNTL1, 0);
lcd_hiu_write(HHI_MIPI_CNTL2, 0);

10
drivers/amlogic/media/vout/lcd/lcd_vout.c
View File

@@ -1272,6 +1272,12 @@ static struct lcd_data_s lcd_data_tl1 = {
.reg_map_table = &lcd_reg_tl1[0],
};
static struct lcd_data_s lcd_data_sm1 = {
.chip_type = LCD_CHIP_SM1,
.chip_name = "sm1",
.reg_map_table = &lcd_reg_axg[0],
};
static const struct of_device_id lcd_dt_match_table[] = {
{
.compatible = "amlogic, lcd-gxl",
@@ -1305,6 +1311,10 @@ static const struct of_device_id lcd_dt_match_table[] = {
.compatible = "amlogic, lcd-tl1",
.data = &lcd_data_tl1,
},
{
.compatible = "amlogic, lcd-sm1",
.data = &lcd_data_sm1,
},
{},
};
#endif

1
include/linux/amlogic/media/vout/lcd/aml_bl.h
View File

@@ -50,6 +50,7 @@ enum bl_chip_type_e {
BL_CHIP_G12A,
BL_CHIP_G12B,
BL_CHIP_TL1,
BL_CHIP_SM1,
BL_CHIP_MAX,
};

1
include/linux/amlogic/media/vout/lcd/lcd_vout.h
View File

@@ -89,6 +89,7 @@ enum lcd_chip_e {
LCD_CHIP_G12A, /* 5 */
LCD_CHIP_G12B, /* 6 */
LCD_CHIP_TL1, /* 7 */
LCD_CHIP_SM1, /* 8 */
LCD_CHIP_MAX,
};