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Merge commit 'd866beb995c6a263d72f71c366148143324ff51f'

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* commit 'd866beb995c6a263d72f71c366148143324ff51f':
  drm/rockchip: vop2: NV12/NV21/NV15/NV51 format src_h must aligned as 2 line
  ARM: rk3506_defconfig: Enable CONFIG_NTFS3_FS and CONFIG_MSDOS_PARTITION
  ARM: dts: rockchip: rk3506: adapt dsmc_lb_slave device
  ARM: dts: rockchip: rk3506: adapt dsmc device
  arm64: dts: rockchip: rk3576: add mtr timing for dsmc
  ASoC: rockchip: i2s: Fix the max register
  phy: rockchip: inno-usb2: Recovery iddig ctrl regs in resume
  gpio: rockchip: Update debounce config function
  media: rockchip: isp: version v2.6.1
  ARM: dts: rockchip: rk3506: modify reserved memory
  arm64: dts: rockchip: rk3588-vehicle-evb: reboot adsp
  media: rockchip: vpss: online support reset

Change-Id: I9184e7a3b00bae756fd82f905a6fc478124306ff
This commit is contained in:
Tao Huang
2024-08-22 20:02:24 +08:00
parent 3cb22f62d5 d866beb995
commit 6ca960a55b
17 changed files with 167 additions and 29 deletions
Download Patch File Download Diff File Expand all files Collapse all files

24
arch/arm/boot/dts/rk3506-pinctrl.dtsi
View File

@@ -1307,6 +1307,30 @@
* This part is edited handly.
*/
&pinctrl {
dsmc {
/omit-if-no-ref/
dsmc_csn_pull_pins: dsmc-csn-pull-pins {
rockchip,pins =
/* dsmc_csn0 */
<1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_up>,
/* dsmc_csn1 */
<1 RK_PB1 RK_FUNC_GPIO &pcfg_pull_up>,
/* dsmc_csn2 */
<1 RK_PD2 RK_FUNC_GPIO &pcfg_pull_up>,
/* dsmc_csn3 */
<1 RK_PD3 RK_FUNC_GPIO &pcfg_pull_up>;
};
};
dsmc_slv {
/omit-if-no-ref/
dsmc_slv_csn0_pull_pins: dsmc-slv-csn0-pull-pins {
rockchip,pins =
/* dsmc_slv_csn0 */
<1 RK_PD2 RK_FUNC_GPIO &pcfg_pull_up>;
};
};
vo_lcdc {
/omit-if-no-ref/
bt1120_pins: bt1120-pins {

39
arch/arm/boot/dts/rk3506.dtsi
View File

@@ -320,8 +320,7 @@
ranges;
trust@0 {
reg = <0x00000 0xa1000>;
no-map;
reg = <0x0 0x62000>;
};
cma: linux,cma {
@@ -336,12 +335,12 @@
reg = <0x0 0x0>;
};
ramoops: ramoops@a1000 {
ramoops: ramoops@83000 {
compatible = "ramoops";
reg = <0xa1000 0x5f000>;
boot-log-size = <0xf000>; /* do not change */
reg = <0x83000 0x2d000>;
boot-log-size = <0xd000>; /* do not change */
boot-log-count = <0x1>; /* do not change */
console-size = <0x50000>;
console-size = <0x20000>;
pmsg-size = <0x0>;
ftrace-size = <0x0>;
record-size = <0x0>;
@@ -1423,6 +1422,10 @@
clocks = <&cru ACLK_DSMC_SLV>,
<&cru HCLK_DSMC_SLV>;
clock-names = "aclk_dsmc_slv", "hclk_dsmc_slv";
pinctrl-names = "default", "active";
pinctrl-0 = <&dsmc_slv_csn0_pull_pins
&dsmc_slv_bus8_pins>;
pinctrl-1 = <&dsmc_slv_csn0_pins>;
status = "disabled";
};
@@ -1431,7 +1434,7 @@
reg = <0xff8b0000 0x10000>;
#address-cells = <1>;
#size-cells = <1>;
rockchip,grf = <&ioc_grf>;
rockchip,grf = <&grf>;
interrupts = <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>;
resets = <&cru SRST_A_DSMC>, <&cru SRST_P_DSMC>;
reset-names = "dsmc", "apb";
@@ -1446,12 +1449,18 @@
// dmas = <&dmac0 8 0xff288078 0x80008000 0xff2880ac 0x00030000>,
// <&dmac0 10 0xff288078 0x40004000 0xff2880ac 0x00300000>;
dma-names = "req0", "req1";
pinctrl-names = "default", "active" ,"lb-slave";
pinctrl-0 = <&dsmc_csn_pull_pins
&dsmc_bus16_pins
&dsmc_clk_pins>;
pinctrl-1 = <&dsmc_csn_pins>;
pinctrl-2 = <&dsmc_int_pins>;
status = "disabled";
slave {
rockchip,dqs-dll = <0x40 0x40
0x40 0x40
0x40 0x40
0x40 0x40>;
rockchip,dqs-dll = <0x20 0x20
0x20 0x20
0x20 0x20
0x20 0x20>;
rockchip,ranges = <0x0 0xc0000000 0x0 0x2000000>;
rockchip,slave-dev = <&dsmc_slave>;
};
@@ -1478,6 +1487,8 @@
lb-slave {
dsmc_lb_slave0: lb-slave0 {
rockchip,mtr-timing = <1 0 0 0 0 0 2 2>;
rockchip,int-en = <0x0>;
status = "disabled";
dsmc_p0_region: region {
dsmc_p0_region0: region0 {
@@ -1515,6 +1526,8 @@
};
};
dsmc_lb_slave1: lb-slave1 {
rockchip,mtr-timing = <1 0 0 0 0 0 2 2>;
rockchip,int-en = <0x1>;
status = "disabled";
dsmc_p1_region: region {
dsmc_p1_region0: region0 {
@@ -1552,6 +1565,8 @@
};
};
dsmc_lb_slave2: lb-slave2 {
rockchip,mtr-timing = <1 0 0 0 0 0 2 2>;
rockchip,int-en = <0x2>;
status = "disabled";
dsmc_p2_region: region {
dsmc_p2_region0: region0 {
@@ -1589,6 +1604,8 @@
};
};
dsmc_lb_slave3: lb-slave3 {
rockchip,mtr-timing = <1 0 0 0 0 0 2 2>;
rockchip,int-en = <0x3>;
status = "disabled";
dsmc_p3_region: region {
dsmc_p3_region0: region0 {

2
arch/arm/configs/rk3506_defconfig
View File

@@ -53,7 +53,6 @@ CONFIG_JUMP_LABEL=y
CONFIG_MODULES=y
CONFIG_MODULE_UNLOAD=y
CONFIG_PARTITION_ADVANCED=y
# CONFIG_MSDOS_PARTITION is not set
CONFIG_CMDLINE_PARTITION=y
CONFIG_IOSCHED_BFQ=y
# CONFIG_SWAP is not set
@@ -315,6 +314,7 @@ CONFIG_PHY_ROCKCHIP_INNO_USB2=y
CONFIG_PHY_ROCKCHIP_INNO_DSIDPHY=y
CONFIG_NVMEM_ROCKCHIP_OTP=y
# CONFIG_DNOTIFY is not set
CONFIG_NTFS3_FS=y
CONFIG_TMPFS=y
CONFIG_UBIFS_FS=y
CONFIG_SQUASHFS=y

4
arch/arm64/boot/dts/rockchip/rk3576.dtsi
View File

@@ -4040,6 +4040,7 @@
lb-slave {
dsmc_lb_slave0: lb-slave0 {
rockchip,mtr-timing = <1 0 0 0 0 0 2 2>;
status = "disabled";
dsmc_p0_region: region {
dsmc_p0_region0: region0 {
@@ -4077,6 +4078,7 @@
};
};
dsmc_lb_slave1: lb-slave1 {
rockchip,mtr-timing = <1 0 0 0 0 0 2 2>;
status = "disabled";
dsmc_p1_region: region {
dsmc_p1_region0: region0 {
@@ -4114,6 +4116,7 @@
};
};
dsmc_lb_slave2: lb-slave2 {
rockchip,mtr-timing = <1 0 0 0 0 0 2 2>;
status = "disabled";
dsmc_p2_region: region {
dsmc_p2_region0: region0 {
@@ -4151,6 +4154,7 @@
};
};
dsmc_lb_slave3: lb-slave3 {
rockchip,mtr-timing = <1 0 0 0 0 0 2 2>;
status = "disabled";
dsmc_p3_region: region {
dsmc_p3_region0: region0 {

8
arch/arm64/boot/dts/rockchip/rk3588-vehicle-evb-v23-audio.dtsi
View File

@@ -11,6 +11,7 @@
compatible = "rockchip,dummy-codec";
#sound-dai-cells = <0>;
pinctrl-names = "default";
pinctrl-0 = <&adsp_reset_h>;
status = "okay";
};
@@ -117,4 +118,11 @@
<4 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
adsp {
adsp_reset_h: adsp-reset-h {
rockchip,pins = <4 RK_PA7 RK_FUNC_GPIO &pcfg_output_high_pull_up>;
};
};
};

14
arch/arm64/boot/dts/rockchip/rk3588-vehicle-evb-v23.dts
View File

@@ -472,7 +472,9 @@
pinctrl-names = "init";
pinctrl-0 = <&max96712_dphy3_pwdn
&max96712_dphy3_errb
&max96712_dphy3_lock>;
&max96712_dphy3_lock
&adsp_reset_l
&adsp_bootroom_l>;
gmac0 {
@@ -495,6 +497,16 @@
};
};
adsp {
adsp_bootroom_l: adsp-bootroom-l {
rockchip,pins = <2 RK_PB5 RK_FUNC_GPIO &pcfg_output_low_pull_down>;
};
adsp_reset_l: adsp-reset-l {
rockchip,pins = <4 RK_PA7 RK_FUNC_GPIO &pcfg_output_low_pull_down>;
};
};
s35390a {
s35390a_int: s35390a-int {
rockchip,pins = <0 RK_PC3 RK_FUNC_GPIO &pcfg_pull_up>;

16
drivers/gpio/gpio-rockchip.c
View File

@@ -262,6 +262,8 @@ static int rockchip_gpio_set_debounce(struct gpio_chip *gc,
clk_prepare_enable(bank->db_clk);
else
clk_disable_unprepare(bank->db_clk);
} else {
return -ENOTSUPP;
}
return 0;
@@ -294,19 +296,7 @@ static int rockchip_gpio_set_config(struct gpio_chip *gc, unsigned int offset,
switch (param) {
case PIN_CONFIG_INPUT_DEBOUNCE:
rockchip_gpio_set_debounce(gc, offset, debounce);
/*
* Rockchip's gpio could only support up to one period
* of the debounce clock(pclk), which is far away from
* satisftying the requirement, as pclk is usually near
* 100MHz shared by all peripherals. So the fact is it
* has crippled debounce capability could only be useful
* to prevent any spurious glitches from waking up the system
* if the gpio is conguired as wakeup interrupt source. Let's
* still return -ENOTSUPP as before, to make sure the caller
* of gpiod_set_debounce won't change its behaviour.
*/
return -ENOTSUPP;
return rockchip_gpio_set_debounce(gc, offset, debounce);
default:
return -ENOTSUPP;
}

22
drivers/gpu/drm/rockchip/rockchip_drm_vop2.c
View File

@@ -5290,7 +5290,7 @@ static int vop2_linear_yuv_format_check(struct drm_plane *plane, struct drm_plan
struct vop2_win *win = to_vop2_win(plane);
struct drm_framebuffer *fb = state->fb;
struct drm_rect *src = &vpstate->src;
u32 val = 0;
u32 val = 0, src_h = 0;
if (vpstate->afbc_en || vpstate->tiled_en || !fb->format->is_yuv)
return 0;
@@ -5308,6 +5308,16 @@ static int vop2_linear_yuv_format_check(struct drm_plane *plane, struct drm_plan
src->y1 = ALIGN(val, 2) << 16;
DRM_WARN("VP%d %s src y offset[%d] must aligned as 2 pixel at NV12 fmt, and adjust to: %d\n", vp->id, win->name, val, src->y1 >> 16);
}
if (vp->vop2->version == VOP_VERSION_RK3528 ||
vp->vop2->version == VOP_VERSION_RK3562 ||
vp->vop2->version == VOP_VERSION_RK3576) {
src_h = drm_rect_height(src) >> 16;
if (src_h % 2) {
src->y2 = src->y1 + (ALIGN_DOWN(src_h, 2) << 16);
DRM_WARN("VP%d %s src_h[%d] must aligned as 2 line at NV12/NV21 fmt, and adjust to: %d\n", vp->id, win->name, src_h, drm_rect_height(src) >> 16);
}
}
break;
case DRM_FORMAT_NV15:
val = src->y1 >> 16;
@@ -5331,6 +5341,16 @@ static int vop2_linear_yuv_format_check(struct drm_plane *plane, struct drm_plan
DRM_WARN("VP%d %s src x offset[%d] must aligned as 4 pixel at NV15 fmt, and adjust to: %d\n", vp->id, win->name, val, src->x1 >> 16);
}
}
if (vp->vop2->version == VOP_VERSION_RK3528 ||
vp->vop2->version == VOP_VERSION_RK3562 ||
vp->vop2->version == VOP_VERSION_RK3576) {
src_h = drm_rect_height(src) >> 16;
if (src_h % 2) {
src->y2 = src->y1 + (ALIGN_DOWN(src_h, 2) << 16);
DRM_WARN("VP%d %s src_h[%d] must aligned as 2 line at NV15/NV51 fmt, and adjust to: %d\n", vp->id, win->name, src_h, drm_rect_height(src) >> 16);
}
}
break;
case DRM_FORMAT_NV16:
case DRM_FORMAT_NV61:

8
drivers/media/platform/rockchip/isp/isp_sditf.c
View File

@@ -87,6 +87,14 @@ static int rkisp_sditf_s_power(struct v4l2_subdev *sd, int on)
return ret;
}
void rkisp_sditf_reset_notify_vpss(struct rkisp_device *dev)
{
struct rkisp_sditf_device *sditf = dev->sditf_dev;
v4l2_info(&dev->v4l2_dev, "%s\n", __func__);
v4l2_subdev_call(sditf->remote_sd, core, ioctl, RKISP_VPSS_RESET_NOTIFY_VPSS, NULL);
}
void rkisp_sditf_sof(struct rkisp_device *dev, u32 irq)
{
struct rkisp_sditf_device *sditf = dev->sditf_dev;

2
drivers/media/platform/rockchip/isp/isp_sditf.h
View File

@@ -21,8 +21,10 @@ struct rkisp_sditf_device {
#if IS_ENABLED(CONFIG_VIDEO_ROCKCHIP_ISP_VERSION_V39)
extern struct platform_driver rkisp_sditf_drv;
void rkisp_sditf_sof(struct rkisp_device *dev, u32 irq);
void rkisp_sditf_reset_notify_vpss(struct rkisp_device *dev);
#else
static inline void rkisp_sditf_sof(struct rkisp_device *dev, u32 irq) {}
static inline void rkisp_sditf_reset_notify_vpss(struct rkisp_device *dev) {}
#endif
#endif

3
drivers/media/platform/rockchip/isp/isp_vpss.h
View File

@@ -13,6 +13,9 @@
#define RKISP_VPSS_GET_UNITE_MODE \
_IOR('V', BASE_VIDIOC_PRIVATE + 2, unsigned int)
#define RKISP_VPSS_RESET_NOTIFY_VPSS \
_IO('V', BASE_VIDIOC_PRIVATE + 3)
struct rkisp_vpss_sof {
u32 irq;
u32 seq;

2
drivers/media/platform/rockchip/isp/rkisp.c
View File

@@ -1243,6 +1243,8 @@ static int rkisp_reset_handle(struct rkisp_device *dev)
u32 val;
dev_info(dev->dev, "%s enter\n", __func__);
if (dev->isp_ver == ISP_V39 && dev->sditf_dev && dev->sditf_dev->is_on)
rkisp_sditf_reset_notify_vpss(dev);
rkisp_hw_reg_save(dev->hw_dev);
rkisp_soft_reset(dev->hw_dev, true);

23
drivers/media/platform/rockchip/isp/version.h
View File

@@ -520,6 +520,29 @@
* 12.skip s_stream of sensor while connect to vicap sditf
* 13.fix isp39 unite mode
* 14.update gic and check params for isp39
*
* v2.6.1
* 1.fix dmarx deadlock
* 2.fix dmatx config
* 3.fix multi sensor for isp39
* 4.fix cac repeat enable
* 5.skip mbus if link to vicap
* 6.fix ldcv irq handle
* 7.fix cac for multi sensor
* 8.add stats log for isp21 and isp30
* 9.fix isp39 resume
* 10.fix aiisp config
* 11.enable bay3d FST_FRAME if change bypass
* 12.fix awb resume error
* 13.fix memory leak
* 14.config bls1 and bls2 black level
* 15.frame buf default to ddr for isp39 multi sensor
* 16.fix isp39 params
* 17.isp39 add api to get params
* 18.fix isp39 sensor mode config
* 19.clear isp force update bit
* 20.isp39 aiisp offline mode default
* 21.vpss: online support reset
*/
#define RKISP_DRIVER_VERSION RKISP_API_VERSION

15
drivers/media/platform/rockchip/vpss/vpss.c
View File

@@ -305,15 +305,30 @@ static int rkvpss_sof(struct rkvpss_subdev *sdev, struct rkisp_vpss_sof *info)
return 0;
}
static void rkvpss_reset_handle(struct rkvpss_device *vpss_dev)
{
dev_info(vpss_dev->dev, "%s enter\n", __func__);
rkvpss_hw_reg_save(vpss_dev->hw_dev);
rkvpss_soft_reset(vpss_dev->hw_dev);
rkvpss_hw_reg_restore(vpss_dev->hw_dev);
dev_info(vpss_dev->dev, "%s exit\n", __func__);
}
static long rkvpss_ioctl(struct v4l2_subdev *sd, unsigned int cmd, void *arg)
{
struct rkvpss_subdev *sdev = v4l2_get_subdevdata(sd);
struct rkvpss_device *vpss_dev = sdev->dev;
long ret = 0;
switch (cmd) {
case RKISP_VPSS_CMD_SOF:
ret = rkvpss_sof(sdev, arg);
break;
case RKISP_VPSS_RESET_NOTIFY_VPSS:
rkvpss_reset_handle(vpss_dev);
break;
default:
ret = -ENOIOCTLCMD;
}

10
drivers/phy/rockchip/phy-rockchip-inno-usb2.c
View File

@@ -3335,6 +3335,7 @@ static int rockchip_usb2phy_pm_resume(struct device *dev)
struct rockchip_usb2phy *rphy = dev_get_drvdata(dev);
const struct rockchip_usb2phy_cfg *phy_cfg = rphy->phy_cfg;
struct rockchip_usb2phy_port *rport;
struct regmap *base = get_reg_base(rphy);
unsigned int index;
bool iddig;
int ret = 0;
@@ -3378,6 +3379,15 @@ static int rockchip_usb2phy_pm_resume(struct device *dev)
mutex_lock(&rport->mutex);
iddig = property_enabled(rphy->grf,
&rport->port_cfg->utmi_iddig);
/* Recovery iddig control regs if otg force to host mode */
if (iddig != rport->prev_iddig && rport->prev_iddig == 0 &&
rport->port_id == USB2PHY_PORT_OTG &&
rport->mode == USB_DR_MODE_HOST) {
iddig = rport->prev_iddig;
property_enable(base, &rport->port_cfg->iddig_output, false);
property_enable(base, &rport->port_cfg->iddig_en, true);
}
ret = rockchip_usb2phy_enable_id_irq(rphy, rport,
true);
mutex_unlock(&rport->mutex);

2
include/uapi/linux/rk-isp2-config.h
View File

@@ -12,7 +12,7 @@
#include <linux/v4l2-controls.h>
#include <linux/rk-camera-module.h>
#define RKISP_API_VERSION KERNEL_VERSION(2, 6, 0)
#define RKISP_API_VERSION KERNEL_VERSION(2, 6, 1)
/****************ISP SUBDEV IOCTL*****************************/

2
sound/soc/rockchip/rockchip_i2s.c
View File

@@ -970,7 +970,7 @@ static const struct regmap_config rockchip_i2s_regmap_config = {
.reg_bits = 32,
.reg_stride = 4,
.val_bits = 32,
.max_register = I2S_RXDR,
.max_register = I2S_RXFIFOLR,
.reg_defaults = rockchip_i2s_reg_defaults,
.num_reg_defaults = ARRAY_SIZE(rockchip_i2s_reg_defaults),
.writeable_reg = rockchip_i2s_wr_reg,