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hdmitx: add enci clktree
PD#162219: hdmitx: add enci clktree Add enci clktree support for 480i and 576i. Change-Id: Id7bc3444bd634deb1a52c8faf7f3d2f017d33e73 Signed-off-by: Kaifu Hu <kaifu.hu@amlogic.com>
This commit is contained in:
@@ -1021,10 +1021,16 @@
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pinctrl-names="default", "hdmitx_i2c";
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pinctrl-0=<&hdmitx_hpd &hdmitx_ddc>;
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pinctrl-1=<&hdmitx_hpd_gpio &i2c3_master_pins1>;
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clocks = <&clkc CLKID_VAPB_MUX>,
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<&clkc CLKID_VPU_MUX>;
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clock-names = "hdmi_vapb_clk",
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"hdmi_vpu_clk";
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clocks = <&clkc CLKID_VCLK2_ENCI
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&clkc CLKID_VCLK2_VENCI0
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&clkc CLKID_VCLK2_VENCI1
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&clkc CLKID_VAPB_MUX
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&clkc CLKID_VPU_MUX>;
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clock-names = "venci_top_gate",
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"venci_0_gate",
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"venci_1_gate",
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"hdmi_vapb_clk",
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"hdmi_vpu_clk";
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/* HPD, 57 + 32 = 89; CEC, 151 + 32 = 183*/
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interrupts = <0 57 1>;
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interrupt-names = "hdmitx_hpd";
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@@ -58,6 +58,7 @@
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#include <linux/amlogic/media/vout/hdmi_tx/hdmi_config.h>
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#include "hw/tvenc_conf.h"
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#include "hw/common.h"
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#include "hw/hw_clk.h"
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#include "hdmi_tx_hdcp.h"
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#define DEVICE_NAME "amhdmitx"
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@@ -1547,7 +1548,7 @@ static ssize_t store_debug(struct device *dev,
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/* support format lists */
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const char *disp_mode_t[] = {
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#if 0
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#if 1
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"480i60hz",
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"576i50hz",
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#endif
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@@ -2702,6 +2703,8 @@ static int hdmitx_module_disable(enum vmode_e cur_vmod)
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hdev->HWOp.CntlConfig(hdev, CONF_CLR_AVI_PACKET, 0);
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hdev->HWOp.CntlConfig(hdev, CONF_CLR_VSDB_PACKET, 0);
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hdev->HWOp.CntlMisc(hdev, MISC_TMDS_PHY_OP, TMDS_PHY_DISABLE);
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if (hdev->para->hdmitx_vinfo.viu_mux == VIU_MUX_ENCI)
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hdmitx_disable_vclk2_enci(hdev);
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hdev->para = hdmi_get_fmt_name("invalid", hdev->fmt_attr);
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hdmitx_validate_vmode("null");
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@@ -3573,10 +3576,11 @@ static void amhdmitx_clktree_probe(struct device *hdmitx_dev)
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{
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struct clk *hdmi_clk_vapb, *hdmi_clk_vpu;
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struct clk *hdcp22_tx_skp, *hdcp22_tx_esm;
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struct clk *venci_top_gate, *venci_0_gate, *venci_1_gate;
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hdmi_clk_vapb = devm_clk_get(hdmitx_dev, "hdmi_vapb_clk");
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if (IS_ERR(hdmi_clk_vapb))
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pr_err(SYS "vapb_clk failed to probe\n");
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pr_warn(SYS "vapb_clk failed to probe\n");
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else {
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hdmitx_device.hdmitx_clk_tree.hdmi_clk_vapb = hdmi_clk_vapb;
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clk_prepare_enable(hdmitx_device.hdmitx_clk_tree.hdmi_clk_vapb);
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@@ -3584,7 +3588,7 @@ static void amhdmitx_clktree_probe(struct device *hdmitx_dev)
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hdmi_clk_vpu = devm_clk_get(hdmitx_dev, "hdmi_vpu_clk");
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if (IS_ERR(hdmi_clk_vpu))
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pr_err(SYS "vpu_clk failed to probe\n");
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pr_warn(SYS "vpu_clk failed to probe\n");
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else {
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hdmitx_device.hdmitx_clk_tree.hdmi_clk_vpu = hdmi_clk_vpu;
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clk_prepare_enable(hdmitx_device.hdmitx_clk_tree.hdmi_clk_vpu);
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@@ -3592,15 +3596,33 @@ static void amhdmitx_clktree_probe(struct device *hdmitx_dev)
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hdcp22_tx_skp = devm_clk_get(hdmitx_dev, "hdcp22_tx_skp");
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if (IS_ERR(hdcp22_tx_skp))
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pr_err(SYS "hdcp22_tx_skp failed to probe\n");
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pr_warn(SYS "hdcp22_tx_skp failed to probe\n");
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else
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hdmitx_device.hdmitx_clk_tree.hdcp22_tx_skp = hdcp22_tx_skp;
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hdcp22_tx_esm = devm_clk_get(hdmitx_dev, "hdcp22_tx_esm");
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if (IS_ERR(hdcp22_tx_esm))
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pr_err(SYS "hdcp22_tx_esm failed to probe\n");
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pr_warn(SYS "hdcp22_tx_esm failed to probe\n");
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else
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hdmitx_device.hdmitx_clk_tree.hdcp22_tx_esm = hdcp22_tx_esm;
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venci_top_gate = devm_clk_get(hdmitx_dev, "venci_top_gate");
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if (IS_ERR(venci_top_gate))
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pr_warn(SYS "venci_top_gate failed to probe\n");
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else
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hdmitx_device.hdmitx_clk_tree.venci_top_gate = venci_top_gate;
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venci_0_gate = devm_clk_get(hdmitx_dev, "venci_0_gate");
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if (IS_ERR(venci_0_gate))
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pr_warn(SYS "venci_0_gate failed to probe\n");
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else
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hdmitx_device.hdmitx_clk_tree.venci_0_gate = venci_0_gate;
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venci_1_gate = devm_clk_get(hdmitx_dev, "venci_1_gate");
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if (IS_ERR(venci_1_gate))
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pr_warn(SYS "venci_0_gate failed to probe\n");
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else
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hdmitx_device.hdmitx_clk_tree.venci_1_gate = venci_1_gate;
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}
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static int amhdmitx_probe(struct platform_device *pdev)
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@@ -1110,6 +1110,7 @@ static void hdmi_tvenc480i_set(struct hdmitx_vidpara *param)
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unsigned long vso_begin_evn = 0, vso_begin_odd = 0;
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hd_set_reg_bits(P_HHI_GCLK_OTHER, 1, 8, 1);
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switch (param->VIC) {
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case HDMI_480i60:
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case HDMI_480i60_16x9:
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@@ -1873,6 +1874,9 @@ static void hdmitx_set_scdc(struct hdmitx_dev *hdev)
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void hdmitx_set_enc_hw(struct hdmitx_dev *hdev)
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{
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if (hdev->para->hdmitx_vinfo.viu_mux == VIU_MUX_ENCI)
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hdmitx_set_vclk2_enci(hdev);
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set_vmode_enc_hw(hdev);
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if (hdev->flag_3dfp) {
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@@ -23,6 +23,9 @@
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#include "common.h"
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#include "mach_reg.h"
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#include "hw_clk.h"
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#ifdef CONFIG_AMLOGIC_VPU
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#include <linux/amlogic/media/vpu/vpu.h>
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#endif
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/*
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* HDMITX Clock configuration
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@@ -71,9 +74,40 @@ void hdmitx_set_vclk2_encp(struct hdmitx_dev *hdev)
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hd_read_reg(P_HHI_GCLK_OTHER)|(1<<17));
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}
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void hdmitx_disable_vclk2_enci(struct hdmitx_dev *hdev)
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{
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if (hdev->hdmitx_clk_tree.venci_top_gate)
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clk_disable_unprepare(hdev->hdmitx_clk_tree.venci_top_gate);
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if (hdev->hdmitx_clk_tree.venci_0_gate)
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clk_disable_unprepare(hdev->hdmitx_clk_tree.venci_0_gate);
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if (hdev->hdmitx_clk_tree.venci_1_gate)
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clk_disable_unprepare(hdev->hdmitx_clk_tree.venci_1_gate);
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#ifdef CONFIG_AMLOGIC_VPU
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switch_vpu_clk_gate_vmod(VPU_VENCI, VPU_CLK_GATE_OFF);
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switch_vpu_mem_pd_vmod(VPU_VENCI, VPU_MEM_POWER_DOWN);
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#endif
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}
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void hdmitx_set_vclk2_enci(struct hdmitx_dev *hdev)
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{
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hd_set_reg_bits(P_HHI_GCLK_OTHER, 1, 8, 1);
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if (hdev->hdmitx_clk_tree.venci_top_gate)
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clk_prepare_enable(hdev->hdmitx_clk_tree.venci_top_gate);
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if (hdev->hdmitx_clk_tree.venci_0_gate)
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clk_prepare_enable(hdev->hdmitx_clk_tree.venci_0_gate);
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if (hdev->hdmitx_clk_tree.venci_1_gate)
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clk_prepare_enable(hdev->hdmitx_clk_tree.venci_1_gate);
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#ifdef CONFIG_AMLOGIC_VPU
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switch_vpu_clk_gate_vmod(VPU_VENCI, VPU_CLK_GATE_ON);
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switch_vpu_mem_pd_vmod(VPU_VENCI, VPU_MEM_POWER_ON);
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#endif
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}
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void hdmitx_set_cts_sys_clk(struct hdmitx_dev *hdev)
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@@ -60,6 +60,7 @@ void hdmitx_set_hdcp_pclk(struct hdmitx_dev *hdev);
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void hdmitx_set_cts_hdcp22_clk(struct hdmitx_dev *hdev);
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void hdmitx_set_sys_clk(struct hdmitx_dev *hdev, unsigned char flag);
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void hdmitx_set_vclk2_encp(struct hdmitx_dev *hdev);
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void hdmitx_disable_vclk2_enci(struct hdmitx_dev *hdev);
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void hdmitx_set_vclk2_enci(struct hdmitx_dev *hdev);
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@@ -216,6 +216,9 @@ struct hdmitx_clk_tree_s {
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struct clk *hdmi_clk_vpu;
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struct clk *hdcp22_tx_skp;
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struct clk *hdcp22_tx_esm;
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struct clk *venci_top_gate;
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struct clk *venci_0_gate;
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struct clk *venci_1_gate;
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};
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#define EDID_MAX_BLOCK 4
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