shinys000114/linux
1
0
Fork 0
mirror of https://github.com/hardkernel/linux.git synced 2026-06-06 02:50:49 +09:00
Code Issues Packages Projects Releases Wiki Activity

ANDROID: KVM: arm64: s2mpu: Refactor DABT handler

Browse Source 
In preparation for adding more entries to the list of S2MPU registers
accessible to the host, refactor the code to use a switch instead of
a series of ifs. No functional change intended.

Bug: 190463801
Change-Id: I9075a7f080b3391c98fa10f26a943bce0b183394
Signed-off-by: David Brazdil <dbrazdil@google.com>
(cherry picked from commit 96767ad7be)
Signed-off-by: Mostafa Saleh <smostafa@google.com>
This commit is contained in:
David Brazdil
2022-04-21 11:00:33 +01:00
committed by Mostafa Saleh
parent 70f5046ab5
commit 6ea4fec26c
1 changed files with 7 additions and 6 deletions
Download Patch File Download Diff File Expand all files Collapse all files

13
arch/arm64/kvm/hyp/nvhe/iommu/s2mpu.c
View File

@@ -393,15 +393,16 @@ static u32 host_mmio_reg_access_mask(size_t off, bool is_write)
const u32 write_only = is_write ? read_write : no_access;
u32 masked_off;
/* IRQ handler can clear interrupts. */
if (off == REG_NS_INTERRUPT_CLEAR)
switch (off) {
/* Allow EL1 IRQ handler to clear interrupts. */
case REG_NS_INTERRUPT_CLEAR:
return write_only & ALL_VIDS_BITMAP;
/* IRQ handler can read bitmap of pending interrupts. */
if (off == REG_NS_FAULT_STATUS)
/* Allow EL1 IRQ handler to read bitmap of pending interrupts. */
case REG_NS_FAULT_STATUS:
return read_only & ALL_VIDS_BITMAP;
}
/* IRQ handler can read fault information. */
/* Allow EL1 IRQ handler to read fault information. */
masked_off = off & ~REG_NS_FAULT_VID_MASK;
if ((masked_off == REG_NS_FAULT_PA_LOW(0)) ||
(masked_off == REG_NS_FAULT_PA_HIGH(0)) ||