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UPSTREAM: usb: dwc3: Increase DWC3 controller halt timeout

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Since EP0 transactions need to be completed before the controller halt
sequence is finished, this may take some time depending on the host and the
enabled functions.  Increase the controller halt timeout, so that we give
the controller sufficient time to handle EP0 transfers.

Change-Id: Id933051520104a7037756fe5a92220c1bd4f4939
Signed-off-by: Wesley Cheng <quic_wcheng@quicinc.com>
Link: https://lore.kernel.org/r/20220901193625.8727-4-quic_wcheng@quicinc.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
(cherry picked from commit 461ee46750)
This commit is contained in:
Wesley Cheng
2022-09-01 12:36:23 -07:00
committed by Tao Huang
parent 00b2eeee67
commit 6f0af65133
1 changed files with 2 additions and 1 deletions
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3
drivers/usb/dwc3/gadget.c
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@@ -2586,7 +2586,7 @@ static void __dwc3_gadget_set_speed(struct dwc3 *dwc)
static int dwc3_gadget_run_stop(struct dwc3 *dwc, int is_on, int suspend)
{
u32 reg;
u32 timeout = 500;
u32 timeout = 2000;
if (pm_runtime_suspended(dwc->dev))
return 0;
@@ -2619,6 +2619,7 @@ static int dwc3_gadget_run_stop(struct dwc3 *dwc, int is_on, int suspend)
dwc3_gadget_dctl_write_safe(dwc, reg);
do {
usleep_range(1000, 2000);
reg = dwc3_readl(dwc->regs, DWC3_DSTS);
reg &= DWC3_DSTS_DEVCTRLHLT;
} while (--timeout && !(!is_on ^ !reg));