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ARM: dts: rk3288: support AP6335 wifi for rk3288-evb

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This patch add and enable AP6335 wifi node for rk3288-evb

Change-Id: I49e7f6a67130a105579627d30db55010967da57a
Signed-off-by: Nickey Yang <nickey.yang@rock-chips.com>
This commit is contained in:
Nickey Yang
2016-08-04 17:06:32 +08:00
committed by Gerrit Code Review
parent c79f369493
commit 6fee50956f
3 changed files with 69 additions and 1 deletions
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18
arch/arm/boot/dts/rk3288-evb-act8846.dts
View File

@@ -44,6 +44,22 @@
/ {
compatible = "rockchip,rk3288-evb-act8846", "rockchip,rk3288";
sdio_pwrseq: sdio-pwrseq {
compatible = "mmc-pwrseq-simple";
clocks = <&hym8563>;
clock-names = "ext_clock";
pinctrl-names = "default";
pinctrl-0 = <&wifi_enable_h>;
/*
* On the module itself this is one of these (depending
* on the actual card populated):
* - SDIO_RESET_L_WL_REG_ON
* - PDN (power down when low)
*/
reset-gpios = <&gpio4 28 GPIO_ACTIVE_LOW>;
};
vcc_lcd: vcc-lcd {
compatible = "regulator-fixed";
enable-active-high;
@@ -102,7 +118,7 @@
vin-supply = <&vcc_sys>;
};
hym8563@51 {
hym8563: hym8563@51 {
compatible = "haoyu,hym8563";
reg = <0x51>;

16
arch/arm/boot/dts/rk3288-evb-rk808.dts
View File

@@ -50,6 +50,22 @@
clock-output-names = "ext_gmac";
#clock-cells = <0>;
};
sdio_pwrseq: sdio-pwrseq {
compatible = "mmc-pwrseq-simple";
clocks = <&rk808 1>;
clock-names = "ext_clock";
pinctrl-names = "default";
pinctrl-0 = <&wifi_enable_h>;
/*
* On the module itself this is one of these (depending
* on the actual card populated):
* - SDIO_RESET_L_WL_REG_ON
* - PDN (power down when low)
*/
reset-gpios = <&gpio4 28 GPIO_ACTIVE_LOW>;
};
};
&cpu0 {

36
arch/arm/boot/dts/rk3288-evb.dtsi
View File

@@ -240,6 +240,16 @@
compatible = "rockchip,rk3288-io-voltage-domain";
rockchip,grf = <&grf>;
sdcard-supply = <&vccio_sd>;
wifi-supply = <&vcc_18>;
};
wireless-wlan {
compatible = "wlan-platdata";
rockchip,grf = <&grf>;
wifi_chip_type = "ap6335";
sdio_vref = <1800>;
WIFI,host_wake_irq = <&gpio4 30 GPIO_ACTIVE_HIGH>;
status = "okay";
};
};
@@ -353,6 +363,26 @@
status = "okay";
};
&sdio0 {
status = "okay";
clock-frequency = <50000000>;
clock-freq-min-max = <200000 50000000>;
bus-width = <4>;
cap-sd-highspeed;
cap-sdio-irq;
disable-wp;
keep-power-in-suspend;
mmc-pwrseq = <&sdio_pwrseq>;
non-removable;
num-slots = <1>;
pinctrl-names = "default";
pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk &sdio0_int>;
sd-uhs-sdr104;
supports-sdio;
};
&uart0 {
status = "okay";
};
@@ -411,6 +441,12 @@
};
};
sdio-pwrseq {
wifi_enable_h: wifi-enable-h {
rockchip,pins = <4 28 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
sdmmc {
/*
* Default drive strength isn't enough to achieve even