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common: lcd: support yeke panel [1/1]
PD#SWPL-8219 Problem: not support lcd panel in ac202 Solution: support lcd panel. Verify: verify by ac202. Change-Id: Ib462a3536c21f0a55c0e0ff947f01c8f52ef3f13 Signed-off-by: Luan Yuan <luan.yuan@amlogic.com>
This commit is contained in:
@@ -17,7 +17,7 @@
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/ {
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lcd{
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compatible = "amlogic, sm1";
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compatible = "amlogic, lcd-sm1";
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dev_name = "lcd";
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mode = "tablet";
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status = "okay";
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@@ -48,9 +48,9 @@
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* power value:(0=output low, 1=output high, 2=input)
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* power delay:(unit in ms)
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*/
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lcd_cpu-gpios = <&gpio GPIOZ_9 GPIO_ACTIVE_HIGH
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&gpio GPIOZ_8 GPIO_ACTIVE_HIGH>;
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lcd_cpu_gpio_names = "GPIOZ_9","GPIOZ_8";
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lcd_cpu-gpios = <&gpio GPIOH_4 GPIO_ACTIVE_HIGH
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&gpio GPIOH_7 GPIO_ACTIVE_HIGH>;
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lcd_cpu_gpio_names = "GPIOH_4","GPIOH_7";
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lcd_0{
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model_name = "B080XAN01";
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@@ -152,6 +152,50 @@
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0xff 0 0 0>;
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backlight_index = <0>;
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};
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lcd_7{
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model_name = "EK79007";
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interface = "mipi";
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basic_setting = <1024 600 /*h_active, v_active*/
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1354 636 /*h_period, v_period*/
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8 /*lcd_bits*/
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119 80>; /*screen_widht, screen_height*/
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lcd_timing = <10 160 0 /*hs_width,hs_bp,hs_pol*/
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1 23 0>; /*vs_width,vs_bp,vs_pol*/
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clk_attr = <0 /*fr_adj_type(0=clock,1=htotal,2=vtotal)*/
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0 /*clk_ss_level*/
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1 /*clk_auto_generate*/
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51668640>; /*pixel_clk(unit in Hz)*/
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mipi_attr = <4 /*lane_num*/
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1000 /*bit_rate_max(MHz)*/
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0 /*factor(*100, default 0 for auto)*/
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1 /*operation_mode_init(0=video, 1=command)*/
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0 /*operation_mode_display(0=video, 1=command)*/
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2 /*
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*video_mode_type
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*(0=sync_pulse,1=sync_event,2=burst)
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*/
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1 /*clk_always_hs(0=disable,1=enable)*/
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0>; /*phy_switch(0=auto,1=standard,2=slow)*/
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/* dsi_init: data_type, num, data... */
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dsi_init_on = <0xff 0xff>; /* ending flag */
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dsi_init_off = <0xff 0xff>; /* ending flag */
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/* extern_init: 0xff for invalid */
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extern_init = <6>;
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/* power step: type,index,value,delay(ms) */
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power_on_step = <
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0 0 1 10
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0 1 0 100
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0 0 0 200
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0 1 1 100
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2 0 0 100
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0xff 0 0 0>;
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power_off_step = <
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2 0 0 0
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0 1 0 100
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0 0 1 100
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0xff 0 0 0>;
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backlight_index = <0>;
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};
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};
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lcd_extern{
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@@ -418,6 +462,26 @@
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0xff 150 /* delay 150ms */
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0xff 0xff>; /*ending*/
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};
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extern_6{
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index = <6>;
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extern_name = "mipi_default"; /* LD055LF1 */
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status = "okay";
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type = <2>; /* 0=i2c, 1=spi, 2=mipi */
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cmd_size = <0xff>;
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init_on = <
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0x15 2 0x80 0xAC
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0x15 2 0x81 0xB8
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0x15 2 0x82 0x09
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0x15 2 0x83 0x78
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0x15 2 0x84 0x7F
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0x15 2 0x85 0xBB
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0x15 2 0x86 0x70
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0xff 40
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0xff 0xff>; /*ending*/
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init_off = <
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0xff 200 /* delay 50ms */
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0xff 0xff>; /*ending*/
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};
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};
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backlight{
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@@ -425,14 +489,12 @@
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dev_name = "backlight";
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status = "okay";
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key_valid = <0>;
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pinctrl-names = "pwm_on","pwm_off";
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pinctrl-names = "pwm_on";
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pinctrl-0 = <&pwm_f_pins2>;
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pinctrl-1 = <&bl_pwm_off_pins>;
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pinctrl_version = <2>; /* for uboot */
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bl_pwm_config = <&bl_pwm_conf>;
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bl-gpios = <&gpio GPIOH_4 GPIO_ACTIVE_HIGH
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&gpio GPIOH_5 GPIO_ACTIVE_HIGH>;
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bl_gpio_names = "GPIOH_4","GPIOH_5";
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bl-gpios = <&gpio GPIOH_5 GPIO_ACTIVE_HIGH>;
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bl_gpio_names = "GPIOH_5";
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/* pwm port: PWM_A, PWM_B, PWM_C, PWM_D, PWM_E, PWM_F, PWM_VS*/
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/* power index:(point gpios_index, 0xff=invalid)
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@@ -447,14 +509,15 @@
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bl_level_attr = <255 10 /*max, min*/
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128 128>; /*mid, mid_mapping*/
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bl_ctrl_method = <1>; /* 1=pwm, 2=pwm_combo, 4=extern */
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bl_power_attr = <0 /*en_gpio_index*/
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1 0 /*on_value, off_value*/
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200 200>; /*on_delay(ms), off_delay(ms)*/
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//bl_power_attr = <0 /*en_gpio_index*/
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// 1 0 /*on_value, off_value*/
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// 200 200>; /*on_delay(ms), off_delay(ms)*/
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bl_pwm_port = "PWM_F";
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bl_pwm_attr = <0 /*pwm_method*/
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180 /*pwm_freq(pwm:Hz, pwm_vs:multiple of vs)*/
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bl_pwm_attr = <1 /*pwm_method*/
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/*pwm_freq(pwm:Hz, pwm_vs:multiple of vs)*/
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25000
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100 25>; /*duty_max(%), duty_min(%)*/
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bl_pwm_power = <1 1 /*pwm_gpio_index, pwm_gpio_off*/
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bl_pwm_power = <0 0 /*pwm_gpio_index, pwm_gpio_off*/
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10 10>; /*pwm_on_delay(ms), pwm_off_delay(ms)*/
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bl_pwm_en_sequence_reverse = <0>; /* 1 for reverse */
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};
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@@ -1241,7 +1241,7 @@
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interrupt-names = "irq_spdifin";
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pinctrl-names = "spdif_pins";
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pinctrl-0 = <&spdifout &spdifin>;
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pinctrl-0 = <&spdifout>; /* bob remove &spdifin*/
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status = "okay";
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};
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@@ -1551,12 +1551,15 @@
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};
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};
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spdifin: spdifin {
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mux {/* GPIOH_5 */
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groups = "spdif_in_h";
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function = "spdif_in";
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};
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};
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/* GPIOH_5 */
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/* bob remove spdifin
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*spdifin: spdifin {
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* mux {/* GPIOH_5
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* groups = "spdif_in_h";
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* function = "spdif_in";
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* };
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*};
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*/
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pdmin: pdmin {
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mux { /* GPIOA_5, GPIOA_6, GPIOA_8, GPIOA_9, GPIOA_7 */
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@@ -1569,13 +1572,15 @@
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};
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};
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bl_pwm_off_pins:bl_pwm_off_pin {
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mux {
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pins = "GPIOH_5";
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function = "gpio_periphs";
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output-high;
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};
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};
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/*
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*bl_pwm_off_pins:bl_pwm_off_pin {
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* mux {
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* pins = "GPIOH_5";
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* function = "gpio_periphs";
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* output-high;
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* };
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*};
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*/
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clk12_24_z_pins:clk12_24_z_pins {
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mux {
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@@ -1241,7 +1241,7 @@
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interrupt-names = "irq_spdifin";
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pinctrl-names = "spdif_pins";
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pinctrl-0 = <&spdifout &spdifin>;
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pinctrl-0 = <&spdifout>;/* bob remove &spdifin*/
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status = "okay";
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};
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@@ -1551,12 +1551,15 @@
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};
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};
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spdifin: spdifin {
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mux {/* GPIOH_5 */
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groups = "spdif_in_h";
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function = "spdif_in";
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};
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};
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/*GPIOH_5 */
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/*bob remove spdifin
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*spdifin: spdifin {
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* mux {/* GPIOH_5
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* groups = "spdif_in_h";
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* function = "spdif_in";
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* };
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*};
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*/
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pdmin: pdmin {
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mux { /* GPIOA_5, GPIOA_6, GPIOA_8, GPIOA_9, GPIOA_7 */
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@@ -1569,13 +1572,15 @@
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};
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};
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bl_pwm_off_pins:bl_pwm_off_pin {
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mux {
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pins = "GPIOH_5";
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function = "gpio_periphs";
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output-high;
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};
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};
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/*
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*bl_pwm_off_pins:bl_pwm_off_pin {
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* mux {
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* pins = "GPIOH_5";
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* function = "gpio_periphs";
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* output-high;
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* };
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*};
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*/
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clk12_24_z_pins:clk12_24_z_pins {
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mux {
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@@ -1,6 +1,17 @@
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/*
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* arch/arm64/boot/dts/amlogic/mesonsm1_skt-panel.dtsi
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*
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* Copyright (C) 2019 Amlogic, Inc. All rights reserved.
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* Copyright (C) 2016 Amlogic, Inc. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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*/
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@@ -36,9 +47,9 @@
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* power value:(0=output low, 1=output high, 2=input)
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* power delay:(unit in ms)
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*/
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lcd_cpu-gpios = <&gpio GPIOZ_9 GPIO_ACTIVE_HIGH
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&gpio GPIOZ_8 GPIO_ACTIVE_HIGH>;
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lcd_cpu_gpio_names = "GPIOZ_9","GPIOZ_8";
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lcd_cpu-gpios = <&gpio GPIOH_4 GPIO_ACTIVE_HIGH
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&gpio GPIOH_7 GPIO_ACTIVE_HIGH>;
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lcd_cpu_gpio_names = "GPIOH_4","GPIOH_7";
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lcd_0{
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model_name = "B080XAN01";
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@@ -140,6 +151,50 @@
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0xff 0 0 0>;
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backlight_index = <0>;
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};
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lcd_7{
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model_name = "EK79007";
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interface = "mipi";
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basic_setting = <1024 600 /*h_active, v_active*/
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1354 636 /*h_period, v_period*/
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8 /*lcd_bits*/
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119 80>; /*screen_widht, screen_height*/
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lcd_timing = <10 160 0 /*hs_width,hs_bp,hs_pol*/
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1 23 0>; /*vs_width,vs_bp,vs_pol*/
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clk_attr = <0 /*fr_adj_type(0=clock,1=htotal,2=vtotal)*/
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0 /*clk_ss_level*/
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1 /*clk_auto_generate*/
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51668640>; /*pixel_clk(unit in Hz)*/
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mipi_attr = <4 /*lane_num*/
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1000 /*bit_rate_max(MHz)*/
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0 /*factor(*100, default 0 for auto)*/
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1 /*operation_mode_init(0=video, 1=command)*/
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0 /*operation_mode_display(0=video, 1=command)*/
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2 /*
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*video_mode_type
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*(0=sync_pulse,1=sync_event,2=burst)
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*/
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1 /*clk_always_hs(0=disable,1=enable)*/
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0>; /*phy_switch(0=auto,1=standard,2=slow)*/
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/* dsi_init: data_type, num, data... */
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dsi_init_on = <0xff 0xff>; /* ending flag */
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dsi_init_off = <0xff 0xff>; /* ending flag */
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/* extern_init: 0xff for invalid */
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extern_init = <6>;
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/* power step: type,index,value,delay(ms) */
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power_on_step = <
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0 0 1 10
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0 1 0 100
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0 0 0 200
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0 1 1 100
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2 0 0 100
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0xff 0 0 0>;
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power_off_step = <
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2 0 0 0
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0 1 0 100
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0 0 1 100
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0xff 0 0 0>;
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backlight_index = <0>;
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};
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};
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lcd_extern{
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@@ -405,20 +460,38 @@
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0xfd 1 150 /* delay 150ms */
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0xff 0>; /*ending*/
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};
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extern_6{
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index = <6>;
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extern_name = "mipi_default"; /* LD055LF1 */
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status = "okay";
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type = <2>; /* 0=i2c, 1=spi, 2=mipi */
|
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cmd_size = <0xff>;
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init_on = <
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0x15 2 0x80 0xAC
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0x15 2 0x81 0xB8
|
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0x15 2 0x82 0x09
|
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0x15 2 0x83 0x78
|
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0x15 2 0x84 0x7F
|
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0x15 2 0x85 0xBB
|
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0x15 2 0x86 0x70
|
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0xff 40
|
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0xff 0xff>; /*ending*/
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init_off = <
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0xff 200 /* delay 50ms */
|
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0xff 0xff>; /*ending*/
|
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};
|
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};
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backlight{
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compatible = "amlogic, backlight-sm1";
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status = "okay";
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key_valid = <0>;
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pinctrl-names = "pwm_on","pwm_off";
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pinctrl-names = "pwm_on";
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pinctrl-0 = <&pwm_f_pins2>;
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pinctrl-1 = <&bl_pwm_off_pins>;
|
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pinctrl_version = <2>; /* for uboot */
|
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bl_pwm_config = <&bl_pwm_conf>;
|
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bl-gpios = <&gpio GPIOH_4 GPIO_ACTIVE_HIGH
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&gpio GPIOH_5 GPIO_ACTIVE_HIGH>;
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bl_gpio_names = "GPIOH_4","GPIOH_5";
|
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bl-gpios = <&gpio GPIOH_5 GPIO_ACTIVE_HIGH>;
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bl_gpio_names = "GPIOH_5";
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|
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/* pwm port: PWM_A, PWM_B, PWM_C, PWM_D, PWM_E, PWM_F, PWM_VS*/
|
||||
/* power index:(point gpios_index, 0xff=invalid)
|
||||
@@ -433,14 +506,15 @@
|
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bl_level_attr = <255 10 /*max, min*/
|
||||
128 128>; /*mid, mid_mapping*/
|
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bl_ctrl_method = <1>; /* 1=pwm, 2=pwm_combo, 4=extern */
|
||||
bl_power_attr = <0 /*en_gpio_index*/
|
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1 0 /*on_value, off_value*/
|
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200 200>; /*on_delay(ms), off_delay(ms)*/
|
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//bl_power_attr = <0 /*en_gpio_index*/
|
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// 1 0 /*on_value, off_value*/
|
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// 200 200>; /*on_delay(ms), off_delay(ms)*/
|
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bl_pwm_port = "PWM_F";
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bl_pwm_attr = <0 /*pwm_method*/
|
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180 /*pwm_freq(pwm:Hz, pwm_vs:multiple of vs)*/
|
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bl_pwm_attr = <1 /*pwm_method*/
|
||||
/*180pwm_freq(pwm:Hz, pwm_vs:multiple of vs)*/
|
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25000
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||||
100 25>; /*duty_max(%), duty_min(%)*/
|
||||
bl_pwm_power = <1 1 /*pwm_gpio_index, pwm_gpio_off*/
|
||||
bl_pwm_power = <0 0 /*pwm_gpio_index, pwm_gpio_off*/
|
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10 10>; /*pwm_on_delay(ms), pwm_off_delay(ms)*/
|
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bl_pwm_en_sequence_reverse = <0>; /* 1 for reverse */
|
||||
};
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||||
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||||
@@ -1538,12 +1538,15 @@
|
||||
};
|
||||
};
|
||||
|
||||
spdifin: spdifin {
|
||||
mux {/* GPIOH_5 */
|
||||
groups = "spdif_in_h";
|
||||
function = "spdif_in";
|
||||
};
|
||||
};
|
||||
/*GPIOH_5 */
|
||||
/*bob remove spdifin
|
||||
*spdifin: spdifin {
|
||||
* mux {/* GPIOH_5
|
||||
* groups = "spdif_in_h";
|
||||
* function = "spdif_in";
|
||||
* };
|
||||
*};
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||||
*/
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||||
|
||||
pdmin: pdmin {
|
||||
mux { /* GPIOA_5, GPIOA_6, GPIOA_8, GPIOA_9, GPIOA_7 */
|
||||
@@ -1556,13 +1559,15 @@
|
||||
};
|
||||
};
|
||||
|
||||
bl_pwm_off_pins:bl_pwm_off_pin {
|
||||
mux {
|
||||
pins = "GPIOH_5";
|
||||
function = "gpio_periphs";
|
||||
output-high;
|
||||
};
|
||||
};
|
||||
/*
|
||||
*bl_pwm_off_pins:bl_pwm_off_pin {
|
||||
* mux {
|
||||
* pins = "GPIOH_5";
|
||||
* function = "gpio_periphs";
|
||||
* output-high;
|
||||
* };
|
||||
*};
|
||||
*/
|
||||
|
||||
clk12_24_z_pins:clk12_24_z_pins {
|
||||
mux {
|
||||
|
||||
@@ -1538,12 +1538,15 @@
|
||||
};
|
||||
};
|
||||
|
||||
spdifin: spdifin {
|
||||
mux {/* GPIOH_5 */
|
||||
groups = "spdif_in_h";
|
||||
function = "spdif_in";
|
||||
};
|
||||
};
|
||||
/*GPIOH_5 */
|
||||
/*bob remove spdifin
|
||||
*spdifin: spdifin {
|
||||
* mux {/* GPIOH_5
|
||||
* groups = "spdif_in_h";
|
||||
* function = "spdif_in";
|
||||
* };
|
||||
*};
|
||||
*/
|
||||
|
||||
pdmin: pdmin {
|
||||
mux { /* GPIOA_5, GPIOA_6, GPIOA_8, GPIOA_9, GPIOA_7 */
|
||||
@@ -1556,13 +1559,15 @@
|
||||
};
|
||||
};
|
||||
|
||||
bl_pwm_off_pins:bl_pwm_off_pin {
|
||||
mux {
|
||||
pins = "GPIOH_5";
|
||||
function = "gpio_periphs";
|
||||
output-high;
|
||||
};
|
||||
};
|
||||
/*
|
||||
*bl_pwm_off_pins:bl_pwm_off_pin {
|
||||
* mux {
|
||||
* pins = "GPIOH_5";
|
||||
* function = "gpio_periphs";
|
||||
* output-high;
|
||||
* };
|
||||
*};
|
||||
*/
|
||||
|
||||
clk12_24_z_pins:clk12_24_z_pins {
|
||||
mux {
|
||||
|
||||
Reference in New Issue
Block a user