common: lcd: support yeke panel [1/1]

PD#SWPL-8219

Problem:
not support lcd panel in ac202

Solution:
support lcd panel.

Verify:
verify by ac202.

Change-Id: Ib462a3536c21f0a55c0e0ff947f01c8f52ef3f13
Signed-off-by: Luan Yuan <luan.yuan@amlogic.com>
This commit is contained in:
Luan Yuan
2019-05-08 16:07:14 +08:00
parent 434535069b
commit 701ea0f9e7
6 changed files with 241 additions and 84 deletions

View File

@@ -17,7 +17,7 @@
/ {
lcd{
compatible = "amlogic, sm1";
compatible = "amlogic, lcd-sm1";
dev_name = "lcd";
mode = "tablet";
status = "okay";
@@ -48,9 +48,9 @@
* power value:(0=output low, 1=output high, 2=input)
* power delay:(unit in ms)
*/
lcd_cpu-gpios = <&gpio GPIOZ_9 GPIO_ACTIVE_HIGH
&gpio GPIOZ_8 GPIO_ACTIVE_HIGH>;
lcd_cpu_gpio_names = "GPIOZ_9","GPIOZ_8";
lcd_cpu-gpios = <&gpio GPIOH_4 GPIO_ACTIVE_HIGH
&gpio GPIOH_7 GPIO_ACTIVE_HIGH>;
lcd_cpu_gpio_names = "GPIOH_4","GPIOH_7";
lcd_0{
model_name = "B080XAN01";
@@ -152,6 +152,50 @@
0xff 0 0 0>;
backlight_index = <0>;
};
lcd_7{
model_name = "EK79007";
interface = "mipi";
basic_setting = <1024 600 /*h_active, v_active*/
1354 636 /*h_period, v_period*/
8 /*lcd_bits*/
119 80>; /*screen_widht, screen_height*/
lcd_timing = <10 160 0 /*hs_width,hs_bp,hs_pol*/
1 23 0>; /*vs_width,vs_bp,vs_pol*/
clk_attr = <0 /*fr_adj_type(0=clock,1=htotal,2=vtotal)*/
0 /*clk_ss_level*/
1 /*clk_auto_generate*/
51668640>; /*pixel_clk(unit in Hz)*/
mipi_attr = <4 /*lane_num*/
1000 /*bit_rate_max(MHz)*/
0 /*factor(*100, default 0 for auto)*/
1 /*operation_mode_init(0=video, 1=command)*/
0 /*operation_mode_display(0=video, 1=command)*/
2 /*
*video_mode_type
*(0=sync_pulse,1=sync_event,2=burst)
*/
1 /*clk_always_hs(0=disable,1=enable)*/
0>; /*phy_switch(0=auto,1=standard,2=slow)*/
/* dsi_init: data_type, num, data... */
dsi_init_on = <0xff 0xff>; /* ending flag */
dsi_init_off = <0xff 0xff>; /* ending flag */
/* extern_init: 0xff for invalid */
extern_init = <6>;
/* power step: type,index,value,delay(ms) */
power_on_step = <
0 0 1 10
0 1 0 100
0 0 0 200
0 1 1 100
2 0 0 100
0xff 0 0 0>;
power_off_step = <
2 0 0 0
0 1 0 100
0 0 1 100
0xff 0 0 0>;
backlight_index = <0>;
};
};
lcd_extern{
@@ -418,6 +462,26 @@
0xff 150 /* delay 150ms */
0xff 0xff>; /*ending*/
};
extern_6{
index = <6>;
extern_name = "mipi_default"; /* LD055LF1 */
status = "okay";
type = <2>; /* 0=i2c, 1=spi, 2=mipi */
cmd_size = <0xff>;
init_on = <
0x15 2 0x80 0xAC
0x15 2 0x81 0xB8
0x15 2 0x82 0x09
0x15 2 0x83 0x78
0x15 2 0x84 0x7F
0x15 2 0x85 0xBB
0x15 2 0x86 0x70
0xff 40
0xff 0xff>; /*ending*/
init_off = <
0xff 200 /* delay 50ms */
0xff 0xff>; /*ending*/
};
};
backlight{
@@ -425,14 +489,12 @@
dev_name = "backlight";
status = "okay";
key_valid = <0>;
pinctrl-names = "pwm_on","pwm_off";
pinctrl-names = "pwm_on";
pinctrl-0 = <&pwm_f_pins2>;
pinctrl-1 = <&bl_pwm_off_pins>;
pinctrl_version = <2>; /* for uboot */
bl_pwm_config = <&bl_pwm_conf>;
bl-gpios = <&gpio GPIOH_4 GPIO_ACTIVE_HIGH
&gpio GPIOH_5 GPIO_ACTIVE_HIGH>;
bl_gpio_names = "GPIOH_4","GPIOH_5";
bl-gpios = <&gpio GPIOH_5 GPIO_ACTIVE_HIGH>;
bl_gpio_names = "GPIOH_5";
/* pwm port: PWM_A, PWM_B, PWM_C, PWM_D, PWM_E, PWM_F, PWM_VS*/
/* power index:(point gpios_index, 0xff=invalid)
@@ -447,14 +509,15 @@
bl_level_attr = <255 10 /*max, min*/
128 128>; /*mid, mid_mapping*/
bl_ctrl_method = <1>; /* 1=pwm, 2=pwm_combo, 4=extern */
bl_power_attr = <0 /*en_gpio_index*/
1 0 /*on_value, off_value*/
200 200>; /*on_delay(ms), off_delay(ms)*/
//bl_power_attr = <0 /*en_gpio_index*/
// 1 0 /*on_value, off_value*/
// 200 200>; /*on_delay(ms), off_delay(ms)*/
bl_pwm_port = "PWM_F";
bl_pwm_attr = <0 /*pwm_method*/
180 /*pwm_freq(pwm:Hz, pwm_vs:multiple of vs)*/
bl_pwm_attr = <1 /*pwm_method*/
/*pwm_freq(pwm:Hz, pwm_vs:multiple of vs)*/
25000
100 25>; /*duty_max(%), duty_min(%)*/
bl_pwm_power = <1 1 /*pwm_gpio_index, pwm_gpio_off*/
bl_pwm_power = <0 0 /*pwm_gpio_index, pwm_gpio_off*/
10 10>; /*pwm_on_delay(ms), pwm_off_delay(ms)*/
bl_pwm_en_sequence_reverse = <0>; /* 1 for reverse */
};

View File

@@ -1241,7 +1241,7 @@
interrupt-names = "irq_spdifin";
pinctrl-names = "spdif_pins";
pinctrl-0 = <&spdifout &spdifin>;
pinctrl-0 = <&spdifout>; /* bob remove &spdifin*/
status = "okay";
};
@@ -1551,12 +1551,15 @@
};
};
spdifin: spdifin {
mux {/* GPIOH_5 */
groups = "spdif_in_h";
function = "spdif_in";
};
};
/* GPIOH_5 */
/* bob remove spdifin
*spdifin: spdifin {
* mux {/* GPIOH_5
* groups = "spdif_in_h";
* function = "spdif_in";
* };
*};
*/
pdmin: pdmin {
mux { /* GPIOA_5, GPIOA_6, GPIOA_8, GPIOA_9, GPIOA_7 */
@@ -1569,13 +1572,15 @@
};
};
bl_pwm_off_pins:bl_pwm_off_pin {
mux {
pins = "GPIOH_5";
function = "gpio_periphs";
output-high;
};
};
/*
*bl_pwm_off_pins:bl_pwm_off_pin {
* mux {
* pins = "GPIOH_5";
* function = "gpio_periphs";
* output-high;
* };
*};
*/
clk12_24_z_pins:clk12_24_z_pins {
mux {

View File

@@ -1241,7 +1241,7 @@
interrupt-names = "irq_spdifin";
pinctrl-names = "spdif_pins";
pinctrl-0 = <&spdifout &spdifin>;
pinctrl-0 = <&spdifout>;/* bob remove &spdifin*/
status = "okay";
};
@@ -1551,12 +1551,15 @@
};
};
spdifin: spdifin {
mux {/* GPIOH_5 */
groups = "spdif_in_h";
function = "spdif_in";
};
};
/*GPIOH_5 */
/*bob remove spdifin
*spdifin: spdifin {
* mux {/* GPIOH_5
* groups = "spdif_in_h";
* function = "spdif_in";
* };
*};
*/
pdmin: pdmin {
mux { /* GPIOA_5, GPIOA_6, GPIOA_8, GPIOA_9, GPIOA_7 */
@@ -1569,13 +1572,15 @@
};
};
bl_pwm_off_pins:bl_pwm_off_pin {
mux {
pins = "GPIOH_5";
function = "gpio_periphs";
output-high;
};
};
/*
*bl_pwm_off_pins:bl_pwm_off_pin {
* mux {
* pins = "GPIOH_5";
* function = "gpio_periphs";
* output-high;
* };
*};
*/
clk12_24_z_pins:clk12_24_z_pins {
mux {

View File

@@ -1,6 +1,17 @@
/*
* arch/arm64/boot/dts/amlogic/mesonsm1_skt-panel.dtsi
*
* Copyright (C) 2019 Amlogic, Inc. All rights reserved.
* Copyright (C) 2016 Amlogic, Inc. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
*/
@@ -36,9 +47,9 @@
* power value:(0=output low, 1=output high, 2=input)
* power delay:(unit in ms)
*/
lcd_cpu-gpios = <&gpio GPIOZ_9 GPIO_ACTIVE_HIGH
&gpio GPIOZ_8 GPIO_ACTIVE_HIGH>;
lcd_cpu_gpio_names = "GPIOZ_9","GPIOZ_8";
lcd_cpu-gpios = <&gpio GPIOH_4 GPIO_ACTIVE_HIGH
&gpio GPIOH_7 GPIO_ACTIVE_HIGH>;
lcd_cpu_gpio_names = "GPIOH_4","GPIOH_7";
lcd_0{
model_name = "B080XAN01";
@@ -140,6 +151,50 @@
0xff 0 0 0>;
backlight_index = <0>;
};
lcd_7{
model_name = "EK79007";
interface = "mipi";
basic_setting = <1024 600 /*h_active, v_active*/
1354 636 /*h_period, v_period*/
8 /*lcd_bits*/
119 80>; /*screen_widht, screen_height*/
lcd_timing = <10 160 0 /*hs_width,hs_bp,hs_pol*/
1 23 0>; /*vs_width,vs_bp,vs_pol*/
clk_attr = <0 /*fr_adj_type(0=clock,1=htotal,2=vtotal)*/
0 /*clk_ss_level*/
1 /*clk_auto_generate*/
51668640>; /*pixel_clk(unit in Hz)*/
mipi_attr = <4 /*lane_num*/
1000 /*bit_rate_max(MHz)*/
0 /*factor(*100, default 0 for auto)*/
1 /*operation_mode_init(0=video, 1=command)*/
0 /*operation_mode_display(0=video, 1=command)*/
2 /*
*video_mode_type
*(0=sync_pulse,1=sync_event,2=burst)
*/
1 /*clk_always_hs(0=disable,1=enable)*/
0>; /*phy_switch(0=auto,1=standard,2=slow)*/
/* dsi_init: data_type, num, data... */
dsi_init_on = <0xff 0xff>; /* ending flag */
dsi_init_off = <0xff 0xff>; /* ending flag */
/* extern_init: 0xff for invalid */
extern_init = <6>;
/* power step: type,index,value,delay(ms) */
power_on_step = <
0 0 1 10
0 1 0 100
0 0 0 200
0 1 1 100
2 0 0 100
0xff 0 0 0>;
power_off_step = <
2 0 0 0
0 1 0 100
0 0 1 100
0xff 0 0 0>;
backlight_index = <0>;
};
};
lcd_extern{
@@ -405,20 +460,38 @@
0xfd 1 150 /* delay 150ms */
0xff 0>; /*ending*/
};
extern_6{
index = <6>;
extern_name = "mipi_default"; /* LD055LF1 */
status = "okay";
type = <2>; /* 0=i2c, 1=spi, 2=mipi */
cmd_size = <0xff>;
init_on = <
0x15 2 0x80 0xAC
0x15 2 0x81 0xB8
0x15 2 0x82 0x09
0x15 2 0x83 0x78
0x15 2 0x84 0x7F
0x15 2 0x85 0xBB
0x15 2 0x86 0x70
0xff 40
0xff 0xff>; /*ending*/
init_off = <
0xff 200 /* delay 50ms */
0xff 0xff>; /*ending*/
};
};
backlight{
compatible = "amlogic, backlight-sm1";
status = "okay";
key_valid = <0>;
pinctrl-names = "pwm_on","pwm_off";
pinctrl-names = "pwm_on";
pinctrl-0 = <&pwm_f_pins2>;
pinctrl-1 = <&bl_pwm_off_pins>;
pinctrl_version = <2>; /* for uboot */
bl_pwm_config = <&bl_pwm_conf>;
bl-gpios = <&gpio GPIOH_4 GPIO_ACTIVE_HIGH
&gpio GPIOH_5 GPIO_ACTIVE_HIGH>;
bl_gpio_names = "GPIOH_4","GPIOH_5";
bl-gpios = <&gpio GPIOH_5 GPIO_ACTIVE_HIGH>;
bl_gpio_names = "GPIOH_5";
/* pwm port: PWM_A, PWM_B, PWM_C, PWM_D, PWM_E, PWM_F, PWM_VS*/
/* power index:(point gpios_index, 0xff=invalid)
@@ -433,14 +506,15 @@
bl_level_attr = <255 10 /*max, min*/
128 128>; /*mid, mid_mapping*/
bl_ctrl_method = <1>; /* 1=pwm, 2=pwm_combo, 4=extern */
bl_power_attr = <0 /*en_gpio_index*/
1 0 /*on_value, off_value*/
200 200>; /*on_delay(ms), off_delay(ms)*/
//bl_power_attr = <0 /*en_gpio_index*/
// 1 0 /*on_value, off_value*/
// 200 200>; /*on_delay(ms), off_delay(ms)*/
bl_pwm_port = "PWM_F";
bl_pwm_attr = <0 /*pwm_method*/
180 /*pwm_freq(pwm:Hz, pwm_vs:multiple of vs)*/
bl_pwm_attr = <1 /*pwm_method*/
/*180pwm_freq(pwm:Hz, pwm_vs:multiple of vs)*/
25000
100 25>; /*duty_max(%), duty_min(%)*/
bl_pwm_power = <1 1 /*pwm_gpio_index, pwm_gpio_off*/
bl_pwm_power = <0 0 /*pwm_gpio_index, pwm_gpio_off*/
10 10>; /*pwm_on_delay(ms), pwm_off_delay(ms)*/
bl_pwm_en_sequence_reverse = <0>; /* 1 for reverse */
};

View File

@@ -1538,12 +1538,15 @@
};
};
spdifin: spdifin {
mux {/* GPIOH_5 */
groups = "spdif_in_h";
function = "spdif_in";
};
};
/*GPIOH_5 */
/*bob remove spdifin
*spdifin: spdifin {
* mux {/* GPIOH_5
* groups = "spdif_in_h";
* function = "spdif_in";
* };
*};
*/
pdmin: pdmin {
mux { /* GPIOA_5, GPIOA_6, GPIOA_8, GPIOA_9, GPIOA_7 */
@@ -1556,13 +1559,15 @@
};
};
bl_pwm_off_pins:bl_pwm_off_pin {
mux {
pins = "GPIOH_5";
function = "gpio_periphs";
output-high;
};
};
/*
*bl_pwm_off_pins:bl_pwm_off_pin {
* mux {
* pins = "GPIOH_5";
* function = "gpio_periphs";
* output-high;
* };
*};
*/
clk12_24_z_pins:clk12_24_z_pins {
mux {

View File

@@ -1538,12 +1538,15 @@
};
};
spdifin: spdifin {
mux {/* GPIOH_5 */
groups = "spdif_in_h";
function = "spdif_in";
};
};
/*GPIOH_5 */
/*bob remove spdifin
*spdifin: spdifin {
* mux {/* GPIOH_5
* groups = "spdif_in_h";
* function = "spdif_in";
* };
*};
*/
pdmin: pdmin {
mux { /* GPIOA_5, GPIOA_6, GPIOA_8, GPIOA_9, GPIOA_7 */
@@ -1556,13 +1559,15 @@
};
};
bl_pwm_off_pins:bl_pwm_off_pin {
mux {
pins = "GPIOH_5";
function = "gpio_periphs";
output-high;
};
};
/*
*bl_pwm_off_pins:bl_pwm_off_pin {
* mux {
* pins = "GPIOH_5";
* function = "gpio_periphs";
* output-high;
* };
*};
*/
clk12_24_z_pins:clk12_24_z_pins {
mux {