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drm/amdgpu/smu10: fix smu10_get_clock_by_type_with_latency

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[ Upstream commit 4d0a72b660 ]

Only send non-0 clocks to DC for validation.  This mirrors
what the windows driver does.

Bug: https://gitlab.freedesktop.org/drm/amd/issues/963
Reviewed-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>
This commit is contained in:
Alex Deucher
2020-01-28 13:19:51 -05:00
committed by Greg Kroah-Hartman
parent 8ed1f476e7
commit 70e1e52915
1 changed files with 9 additions and 6 deletions
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15
drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.c
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@@ -994,12 +994,15 @@ static int smu10_get_clock_by_type_with_latency(struct pp_hwmgr *hwmgr,
clocks->num_levels = 0;
for (i = 0; i < pclk_vol_table->count; i++) {
clocks->data[i].clocks_in_khz = pclk_vol_table->entries[i].clk * 10;
clocks->data[i].latency_in_us = latency_required ?
smu10_get_mem_latency(hwmgr,
pclk_vol_table->entries[i].clk) :
0;
clocks->num_levels++;
if (pclk_vol_table->entries[i].clk) {
clocks->data[clocks->num_levels].clocks_in_khz =
pclk_vol_table->entries[i].clk * 10;
clocks->data[clocks->num_levels].latency_in_us = latency_required ?
smu10_get_mem_latency(hwmgr,
pclk_vol_table->entries[i].clk) :
0;
clocks->num_levels++;
}
}
return 0;