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net/mlx5e: Fix error handling when refreshing TIRs

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[ Upstream commit bc87a00368 ]

Previously, a false positive would be caught if the TIRs list is
empty, since the err value was initialized to -ENOMEM, and was only
updated if a TIR is refreshed. This is resolved by initializing the
err value to zero.

Fixes: b676f65389 ("net/mlx5e: Refactor refresh TIRs")
Signed-off-by: Gavi Teitz <gavi@mellanox.com>
Reviewed-by: Roi Dayan <roid@mellanox.com>
Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
Gavi Teitz
2019-03-11 11:56:34 +02:00
committed by Greg Kroah-Hartman
parent 16b7142372
commit 7143c8997a
1 changed files with 4 additions and 2 deletions
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6
drivers/net/ethernet/mellanox/mlx5/core/en_common.c
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@@ -140,15 +140,17 @@ int mlx5e_refresh_tirs(struct mlx5e_priv *priv, bool enable_uc_lb)
{
struct mlx5_core_dev *mdev = priv->mdev;
struct mlx5e_tir *tir;
int err = -ENOMEM;
int err = 0;
u32 tirn = 0;
int inlen;
void *in;
inlen = MLX5_ST_SZ_BYTES(modify_tir_in);
in = kvzalloc(inlen, GFP_KERNEL);
if (!in)
if (!in) {
err = -ENOMEM;
goto out;
}
if (enable_uc_lb)
MLX5_SET(modify_tir_in, in, ctx.self_lb_block,