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pwm: rockchip: Make pwm pinctrl setting after pwm enabled

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If the PWM pinctrl uses default state, the iomux setting will
be done at probe, the PWM may not be enabled at this moment.
It will make PWM into an intermediate state, destroy the default
hardware state, the PWM is not ready for work yet. So it is better
for doing PWM pinctrl setting after PWM enabled.

Change-Id: Iea34a7baf6a4d7df0c631f7f4fdab5b9d61bbd5f
Signed-off-by: David Wu <david.wu@rock-chips.com>
This commit is contained in:
David Wu
2018-02-25 16:58:56 +08:00
parent 69f5bbb436
commit 718c02ce18
11 changed files with 72 additions and 55 deletions
Download Patch File Download Diff File Expand all files Collapse all files

8
arch/arm/boot/dts/rk3036.dtsi
View File

@@ -365,7 +365,7 @@
#pwm-cells = <3>;
clocks = <&cru PCLK_PWM>;
clock-names = "pwm";
pinctrl-names = "default";
pinctrl-names = "active";
pinctrl-0 = <&pwm0_pin>;
status = "disabled";
};
@@ -376,7 +376,7 @@
#pwm-cells = <3>;
clocks = <&cru PCLK_PWM>;
clock-names = "pwm";
pinctrl-names = "default";
pinctrl-names = "active";
pinctrl-0 = <&pwm1_pin>;
status = "disabled";
};
@@ -387,7 +387,7 @@
#pwm-cells = <3>;
clocks = <&cru PCLK_PWM>;
clock-names = "pwm";
pinctrl-names = "default";
pinctrl-names = "active";
pinctrl-0 = <&pwm2_pin>;
status = "disabled";
};
@@ -398,7 +398,7 @@
#pwm-cells = <2>;
clocks = <&cru PCLK_PWM>;
clock-names = "pwm";
pinctrl-names = "default";
pinctrl-names = "active";
pinctrl-0 = <&pwm3_pin>;
status = "disabled";
};

8
arch/arm/boot/dts/rk3066a.dtsi
View File

@@ -800,22 +800,22 @@
};
&pwm0 {
pinctrl-names = "default";
pinctrl-names = "active";
pinctrl-0 = <&pwm0_out>;
};
&pwm1 {
pinctrl-names = "default";
pinctrl-names = "active";
pinctrl-0 = <&pwm1_out>;
};
&pwm2 {
pinctrl-names = "default";
pinctrl-names = "active";
pinctrl-0 = <&pwm2_out>;
};
&pwm3 {
pinctrl-names = "default";
pinctrl-names = "active";
pinctrl-0 = <&pwm3_out>;
};

8
arch/arm/boot/dts/rk3188.dtsi
View File

@@ -739,22 +739,22 @@
};
&pwm0 {
pinctrl-names = "default";
pinctrl-names = "active";
pinctrl-0 = <&pwm0_out>;
};
&pwm1 {
pinctrl-names = "default";
pinctrl-names = "active";
pinctrl-0 = <&pwm1_out>;
};
&pwm2 {
pinctrl-names = "default";
pinctrl-names = "active";
pinctrl-0 = <&pwm2_out>;
};
&pwm3 {
pinctrl-names = "default";
pinctrl-names = "active";
pinctrl-0 = <&pwm3_out>;
};

8
arch/arm/boot/dts/rk322x.dtsi
View File

@@ -399,7 +399,7 @@
#pwm-cells = <3>;
clocks = <&cru PCLK_PWM>;
clock-names = "pwm";
pinctrl-names = "default";
pinctrl-names = "active";
pinctrl-0 = <&pwm0_pin>;
status = "disabled";
};
@@ -410,7 +410,7 @@
#pwm-cells = <3>;
clocks = <&cru PCLK_PWM>;
clock-names = "pwm";
pinctrl-names = "default";
pinctrl-names = "active";
pinctrl-0 = <&pwm1_pin>;
status = "disabled";
};
@@ -421,7 +421,7 @@
#pwm-cells = <3>;
clocks = <&cru PCLK_PWM>;
clock-names = "pwm";
pinctrl-names = "default";
pinctrl-names = "active";
pinctrl-0 = <&pwm2_pin>;
status = "disabled";
};
@@ -432,7 +432,7 @@
#pwm-cells = <2>;
clocks = <&cru PCLK_PWM>;
clock-names = "pwm";
pinctrl-names = "default";
pinctrl-names = "active";
pinctrl-0 = <&pwm3_pin>;
status = "disabled";
};

8
arch/arm/boot/dts/rk3288.dtsi
View File

@@ -694,7 +694,7 @@
compatible = "rockchip,rk3288-pwm";
reg = <0x0 0xff680000 0x0 0x10>;
#pwm-cells = <3>;
pinctrl-names = "default";
pinctrl-names = "active";
pinctrl-0 = <&pwm0_pin>;
clocks = <&cru PCLK_RKPWM>;
clock-names = "pwm";
@@ -705,7 +705,7 @@
compatible = "rockchip,rk3288-pwm";
reg = <0x0 0xff680010 0x0 0x10>;
#pwm-cells = <3>;
pinctrl-names = "default";
pinctrl-names = "active";
pinctrl-0 = <&pwm1_pin>;
clocks = <&cru PCLK_RKPWM>;
clock-names = "pwm";
@@ -716,7 +716,7 @@
compatible = "rockchip,rk3288-pwm";
reg = <0x0 0xff680020 0x0 0x10>;
#pwm-cells = <3>;
pinctrl-names = "default";
pinctrl-names = "active";
pinctrl-0 = <&pwm2_pin>;
clocks = <&cru PCLK_RKPWM>;
clock-names = "pwm";
@@ -727,7 +727,7 @@
compatible = "rockchip,rk3288-pwm";
reg = <0x0 0xff680030 0x0 0x10>;
#pwm-cells = <3>;
pinctrl-names = "default";
pinctrl-names = "active";
pinctrl-0 = <&pwm3_pin>;
clocks = <&cru PCLK_RKPWM>;
clock-names = "pwm";

16
arch/arm/boot/dts/rv1108.dtsi
View File

@@ -217,7 +217,7 @@
interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru SCLK_PWM>, <&cru PCLK_PWM>;
clock-names = "pwm", "pclk";
pinctrl-names = "default";
pinctrl-names = "active";
pinctrl-0 = <&pwm4_pin>;
#pwm-cells = <3>;
status = "disabled";
@@ -229,7 +229,7 @@
interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru SCLK_PWM>, <&cru PCLK_PWM>;
clock-names = "pwm", "pclk";
pinctrl-names = "default";
pinctrl-names = "active";
pinctrl-0 = <&pwm5_pin>;
#pwm-cells = <3>;
status = "disabled";
@@ -241,7 +241,7 @@
interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru SCLK_PWM>, <&cru PCLK_PWM>;
clock-names = "pwm", "pclk";
pinctrl-names = "default";
pinctrl-names = "active";
pinctrl-0 = <&pwm6_pin>;
#pwm-cells = <3>;
status = "disabled";
@@ -253,7 +253,7 @@
interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru SCLK_PWM>, <&cru PCLK_PWM>;
clock-names = "pwm", "pclk";
pinctrl-names = "default";
pinctrl-names = "active";
pinctrl-0 = <&pwm7_pin>;
#pwm-cells = <3>;
status = "disabled";
@@ -392,7 +392,7 @@
interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru SCLK_PWM0_PMU>, <&cru PCLK_PWM0_PMU>;
clock-names = "pwm", "pclk";
pinctrl-names = "default";
pinctrl-names = "active";
pinctrl-0 = <&pwm0_pin>;
#pwm-cells = <3>;
status = "disabled";
@@ -404,7 +404,7 @@
interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru SCLK_PWM0_PMU>, <&cru PCLK_PWM0_PMU>;
clock-names = "pwm", "pclk";
pinctrl-names = "default";
pinctrl-names = "active";
pinctrl-0 = <&pwm1_pin>;
#pwm-cells = <3>;
status = "disabled";
@@ -416,7 +416,7 @@
interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru SCLK_PWM0_PMU>, <&cru PCLK_PWM0_PMU>;
clock-names = "pwm", "pclk";
pinctrl-names = "default";
pinctrl-names = "active";
pinctrl-0 = <&pwm2_pin>;
#pwm-cells = <3>;
status = "disabled";
@@ -428,7 +428,7 @@
interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru SCLK_PWM0_PMU>, <&cru PCLK_PWM0_PMU>;
clock-names = "pwm", "pclk";
pinctrl-names = "default";
pinctrl-names = "active";
pinctrl-0 = <&pwm3_pin>;
#pwm-cells = <3>;
status = "disabled";

16
arch/arm64/boot/dts/rockchip/px30.dtsi
View File

@@ -615,7 +615,7 @@
reg = <0x0 0xff200000 0x0 0x10>;
clocks = <&cru SCLK_PWM0>, <&cru PCLK_PWM0>;
clock-names = "pwm", "pclk";
pinctrl-names = "default";
pinctrl-names = "active";
pinctrl-0 = <&pwm0_pin>;
#pwm-cells = <3>;
status = "disabled";
@@ -626,7 +626,7 @@
reg = <0x0 0xff200010 0x0 0x10>;
clocks = <&cru SCLK_PWM0>, <&cru PCLK_PWM0>;
clock-names = "pwm", "pclk";
pinctrl-names = "default";
pinctrl-names = "active";
pinctrl-0 = <&pwm1_pin>;
#pwm-cells = <3>;
status = "disabled";
@@ -637,7 +637,7 @@
reg = <0x0 0xff200020 0x0 0x10>;
clocks = <&cru SCLK_PWM0>, <&cru PCLK_PWM0>;
clock-names = "pwm", "pclk";
pinctrl-names = "default";
pinctrl-names = "active";
pinctrl-0 = <&pwm2_pin>;
#pwm-cells = <3>;
status = "disabled";
@@ -648,7 +648,7 @@
reg = <0x0 0xff200030 0x0 0x10>;
clocks = <&cru SCLK_PWM0>, <&cru PCLK_PWM0>;
clock-names = "pwm", "pclk";
pinctrl-names = "default";
pinctrl-names = "active";
pinctrl-0 = <&pwm3_pin>;
#pwm-cells = <3>;
status = "disabled";
@@ -659,7 +659,7 @@
reg = <0x0 0xff208000 0x0 0x10>;
clocks = <&cru SCLK_PWM1>, <&cru PCLK_PWM1>;
clock-names = "pwm", "pclk";
pinctrl-names = "default";
pinctrl-names = "active";
pinctrl-0 = <&pwm4_pin>;
#pwm-cells = <3>;
status = "disabled";
@@ -670,7 +670,7 @@
reg = <0x0 0xff208010 0x0 0x10>;
clocks = <&cru SCLK_PWM1>, <&cru PCLK_PWM1>;
clock-names = "pwm", "pclk";
pinctrl-names = "default";
pinctrl-names = "active";
pinctrl-0 = <&pwm5_pin>;
#pwm-cells = <3>;
status = "disabled";
@@ -681,7 +681,7 @@
reg = <0x0 0xff208020 0x0 0x10>;
clocks = <&cru SCLK_PWM1>, <&cru PCLK_PWM1>;
clock-names = "pwm", "pclk";
pinctrl-names = "default";
pinctrl-names = "active";
pinctrl-0 = <&pwm6_pin>;
#pwm-cells = <3>;
status = "disabled";
@@ -692,7 +692,7 @@
reg = <0x0 0xff208030 0x0 0x10>;
clocks = <&cru SCLK_PWM1>, <&cru PCLK_PWM1>;
clock-names = "pwm", "pclk";
pinctrl-names = "default";
pinctrl-names = "active";
pinctrl-0 = <&pwm7_pin>;
#pwm-cells = <3>;
status = "disabled";

24
arch/arm64/boot/dts/rockchip/rk3308.dtsi
View File

@@ -382,7 +382,7 @@
reg = <0x0 0xff160000 0x0 0x10>;
clocks = <&cru SCLK_PWM2>, <&cru PCLK_PWM2>;
clock-names = "pwm", "pclk";
pinctrl-names = "default";
pinctrl-names = "active";
pinctrl-0 = <&pwm8_pin>;
#pwm-cells = <3>;
status = "disabled";
@@ -393,7 +393,7 @@
reg = <0x0 0xff160010 0x0 0x10>;
clocks = <&cru SCLK_PWM2>, <&cru PCLK_PWM2>;
clock-names = "pwm", "pclk";
pinctrl-names = "default";
pinctrl-names = "active";
pinctrl-0 = <&pwm9_pin>;
#pwm-cells = <3>;
status = "disabled";
@@ -404,7 +404,7 @@
reg = <0x0 0xff160020 0x0 0x10>;
clocks = <&cru SCLK_PWM2>, <&cru PCLK_PWM2>;
clock-names = "pwm", "pclk";
pinctrl-names = "default";
pinctrl-names = "active";
pinctrl-0 = <&pwm10_pin>;
#pwm-cells = <3>;
status = "disabled";
@@ -415,7 +415,7 @@
reg = <0x0 0xff160030 0x0 0x10>;
clocks = <&cru SCLK_PWM2>, <&cru PCLK_PWM2>;
clock-names = "pwm", "pclk";
pinctrl-names = "default";
pinctrl-names = "active";
pinctrl-0 = <&pwm11_pin>;
#pwm-cells = <3>;
status = "disabled";
@@ -426,7 +426,7 @@
reg = <0x0 0xff170000 0x0 0x10>;
clocks = <&cru SCLK_PWM1>, <&cru PCLK_PWM1>;
clock-names = "pwm", "pclk";
pinctrl-names = "default";
pinctrl-names = "active";
pinctrl-0 = <&pwm4_pin>;
#pwm-cells = <3>;
status = "disabled";
@@ -437,7 +437,7 @@
reg = <0x0 0xff170010 0x0 0x10>;
clocks = <&cru SCLK_PWM1>, <&cru PCLK_PWM1>;
clock-names = "pwm", "pclk";
pinctrl-names = "default";
pinctrl-names = "active";
pinctrl-0 = <&pwm5_pin>;
#pwm-cells = <3>;
status = "disabled";
@@ -448,7 +448,7 @@
reg = <0x0 0xff170020 0x0 0x10>;
clocks = <&cru SCLK_PWM1>, <&cru PCLK_PWM1>;
clock-names = "pwm", "pclk";
pinctrl-names = "default";
pinctrl-names = "active";
pinctrl-0 = <&pwm6_pin>;
#pwm-cells = <3>;
status = "disabled";
@@ -459,7 +459,7 @@
reg = <0x0 0xff170030 0x0 0x10>;
clocks = <&cru SCLK_PWM1>, <&cru PCLK_PWM1>;
clock-names = "pwm", "pclk";
pinctrl-names = "default";
pinctrl-names = "active";
pinctrl-0 = <&pwm7_pin>;
#pwm-cells = <3>;
status = "disabled";
@@ -470,7 +470,7 @@
reg = <0x0 0xff180000 0x0 0x10>;
clocks = <&cru SCLK_PWM0>, <&cru PCLK_PWM0>;
clock-names = "pwm", "pclk";
pinctrl-names = "default";
pinctrl-names = "active";
pinctrl-0 = <&pwm0_pin>;
#pwm-cells = <3>;
status = "disabled";
@@ -481,7 +481,7 @@
reg = <0x0 0xff180010 0x0 0x10>;
clocks = <&cru SCLK_PWM0>, <&cru PCLK_PWM0>;
clock-names = "pwm", "pclk";
pinctrl-names = "default";
pinctrl-names = "active";
pinctrl-0 = <&pwm1_pin>;
#pwm-cells = <3>;
status = "disabled";
@@ -492,7 +492,7 @@
reg = <0x0 0xff180020 0x0 0x10>;
clocks = <&cru SCLK_PWM0>, <&cru PCLK_PWM0>;
clock-names = "pwm", "pclk";
pinctrl-names = "default";
pinctrl-names = "active";
pinctrl-0 = <&pwm2_pin>;
#pwm-cells = <3>;
status = "disabled";
@@ -503,7 +503,7 @@
reg = <0x0 0xff180030 0x0 0x10>;
clocks = <&cru SCLK_PWM0>, <&cru PCLK_PWM0>;
clock-names = "pwm", "pclk";
pinctrl-names = "default";
pinctrl-names = "active";
pinctrl-0 = <&pwm3_pin>;
#pwm-cells = <3>;
status = "disabled";

8
arch/arm64/boot/dts/rockchip/rk3328.dtsi
View File

@@ -464,7 +464,7 @@
reg = <0x0 0xff1b0000 0x0 0x10>;
clocks = <&cru SCLK_PWM>, <&cru PCLK_PWM>;
clock-names = "pwm", "pclk";
pinctrl-names = "default";
pinctrl-names = "active";
pinctrl-0 = <&pwm0_pin>;
#pwm-cells = <3>;
status = "disabled";
@@ -475,7 +475,7 @@
reg = <0x0 0xff1b0010 0x0 0x10>;
clocks = <&cru SCLK_PWM>, <&cru PCLK_PWM>;
clock-names = "pwm", "pclk";
pinctrl-names = "default";
pinctrl-names = "active";
pinctrl-0 = <&pwm1_pin>;
#pwm-cells = <3>;
status = "disabled";
@@ -486,7 +486,7 @@
reg = <0x0 0xff1b0020 0x0 0x10>;
clocks = <&cru SCLK_PWM>, <&cru PCLK_PWM>;
clock-names = "pwm", "pclk";
pinctrl-names = "default";
pinctrl-names = "active";
pinctrl-0 = <&pwm2_pin>;
#pwm-cells = <3>;
status = "disabled";
@@ -498,7 +498,7 @@
interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru SCLK_PWM>, <&cru PCLK_PWM>;
clock-names = "pwm", "pclk";
pinctrl-names = "default";
pinctrl-names = "active";
pinctrl-0 = <&pwmir_pin>;
#pwm-cells = <3>;
status = "disabled";

6
arch/arm64/boot/dts/rockchip/rk3368.dtsi
View File

@@ -562,7 +562,7 @@
compatible = "rockchip,rk3368-pwm", "rockchip,rk3288-pwm";
reg = <0x0 0xff680000 0x0 0x10>;
#pwm-cells = <3>;
pinctrl-names = "default";
pinctrl-names = "active";
pinctrl-0 = <&pwm0_pin>;
clocks = <&cru PCLK_PWM1>;
clock-names = "pwm";
@@ -573,7 +573,7 @@
compatible = "rockchip,rk3368-pwm", "rockchip,rk3288-pwm";
reg = <0x0 0xff680010 0x0 0x10>;
#pwm-cells = <3>;
pinctrl-names = "default";
pinctrl-names = "active";
pinctrl-0 = <&pwm1_pin>;
clocks = <&cru PCLK_PWM1>;
clock-names = "pwm";
@@ -593,7 +593,7 @@
compatible = "rockchip,rk3368-pwm", "rockchip,rk3288-pwm";
reg = <0x0 0xff680030 0x0 0x10>;
#pwm-cells = <3>;
pinctrl-names = "default";
pinctrl-names = "active";
pinctrl-0 = <&pwm3_pin>;
clocks = <&cru PCLK_PWM1>;
clock-names = "pwm";

17
drivers/pwm/pwm-rockchip.c
View File

@@ -11,6 +11,7 @@
#include <linux/module.h>
#include <linux/of.h>
#include <linux/of_device.h>
#include <linux/pinctrl/consumer.h>
#include <linux/platform_device.h>
#include <linux/pwm.h>
#include <linux/time.h>
@@ -37,6 +38,8 @@ struct rockchip_pwm_chip {
struct pwm_chip chip;
struct clk *clk;
struct clk *pclk;
struct pinctrl *pinctrl;
struct pinctrl_state *active_state;
const struct rockchip_pwm_data *data;
void __iomem *base;
unsigned long clk_rate;
@@ -246,6 +249,8 @@ static int rockchip_pwm_apply(struct pwm_chip *chip, struct pwm_device *pwm,
goto out;
}
if (state->enabled)
ret = pinctrl_select_state(pc->pinctrl, pc->active_state);
out:
clk_disable(pc->pclk);
@@ -387,6 +392,18 @@ static int rockchip_pwm_probe(struct platform_device *pdev)
goto err_clk;
}
pc->pinctrl = devm_pinctrl_get(&pdev->dev);
if (IS_ERR(pc->pinctrl)) {
dev_err(&pdev->dev, "Get pinctrl failed!\n");
return PTR_ERR(pc->pinctrl);
}
pc->active_state = pinctrl_lookup_state(pc->pinctrl, "active");
if (IS_ERR(pc->active_state)) {
dev_err(&pdev->dev, "No active pinctrl state\n");
return PTR_ERR(pc->active_state);
}
platform_set_drvdata(pdev, pc);
pc->data = id->data;