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fpga config && gsensor for infosdk && spi touch screen for infosdk

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This commit is contained in:
lyx
2010-08-17 05:23:56 -07:00
parent 742cf30784
commit 71c32e86bf
11 changed files with 90 additions and 100 deletions
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7
arch/arm/configs/rk2818_raho_defconfig Normal file → Executable file
View File

@@ -831,12 +831,13 @@ CONFIG_SPIM_RK2818=y
CONFIG_SPI_FPGA=y
CONFIG_SPI_FPGA_INIT=y
# CONFIG_SPI_FPGA_INIT_DEBUG is not set
CONFIG_SPI_UART=y
CONFIG_SPI_FPGA_UART=y
# CONFIG_SPI_UART_DEBUG is not set
CONFIG_SPI_FPGA_GPIO=y
# CONFIG_SPI_GPIO_DEBUG is not set
CONFIG_SPI_I2C=y
CONFIG_SPI_FPGA_I2C=y
# CONFIG_SPI_I2C_DEBUG is not set
CONFIG_SPI_DPRAM=y
CONFIG_SPI_FPGA_DPRAM=y
# CONFIG_SPI_DPRAM_DEBUG is not set
#

37
arch/arm/mach-rk2818/board-infosdk.c
View File

@@ -243,7 +243,7 @@ struct rk2818_gpio_expander_info extern_gpio_settinginfo[] = {
};
struct pca9554_platform_data rk2818_pca9554_data={
.gpio_base=GPIOS_EXPANDER_BASE,
.gpio_base=GPIO_EXPANDER_BASE,
.gpio_pin_num=CONFIG_EXPANDED_GPIO_NUM,
.gpio_irq_start=NR_AIC_IRQS + 2*NUM_GROUP,
.irq_pin_num=CONFIG_EXPANDED_GPIO_IRQ_NUM,
@@ -321,7 +321,14 @@ struct tca6424_platform_data rk2818_tca6424_data={
};
#endif
/*****************************************************************************************
* gsensor devices
*****************************************************************************************/
#define GS_IRQ_PIN RK2818_PIN_PE0
struct rk2818_gs_platform_data rk2818_gs_platdata = {
.gsensor_irq_pin = GS_IRQ_PIN,
};
/*****************************************************************************************
* i2c devices
@@ -584,7 +591,7 @@ struct rk2818_i2s_platform_data rk2818_i2s_platdata = {
* spi devices
* author: lhhrock-chips.com
*****************************************************************************************/
#define SPI_CHIPSELECT_NUM 3
#define SPI_CHIPSELECT_NUM 2
static int spi_io_init(void)
{
//cs0
@@ -593,8 +600,6 @@ static int spi_io_init(void)
rk2818_mux_api_set(GPIOB0_SPI0CSN1_MMC1PCA_NAME, IOMUXA_GPIO0_B0);
//clk
rk2818_mux_api_set(GPIOB_SPI0_MMC0_NAME, IOMUXA_SPI0);
//cs2
rk2818_mux_api_set(GPIOF5_APWM3_DPWM3_NAME,IOMUXB_GPIO1_B5);
return 0;
}
@@ -603,7 +608,6 @@ static int spi_io_deinit(void)
rk2818_mux_api_mode_resume(GPIOB4_SPI0CS0_MMC0D4_NAME);
rk2818_mux_api_mode_resume(GPIOB0_SPI0CSN1_MMC1PCA_NAME);
rk2818_mux_api_mode_resume(GPIOB_SPI0_MMC0_NAME);
rk2818_mux_api_mode_resume(GPIOF5_APWM3_DPWM3_NAME);
return 0;
}
@@ -615,11 +619,8 @@ struct spi_cs_gpio rk2818_spi_cs_gpios[SPI_CHIPSELECT_NUM] = {
{
.name = "spi cs1",
.cs_gpio = RK2818_PIN_PB0,
},
{
.name = "spi cs2",
.cs_gpio = RK2818_PIN_PF5,
}
};
struct rk2818_spi_platform_data rk2818_spi_platdata = {
@@ -632,7 +633,7 @@ struct rk2818_spi_platform_data rk2818_spi_platdata = {
* xpt2046 touch panel
* author: dxjrock-chips.com
*****************************************************************************************/
#define XPT2046_GPIO_INT RK2818_PIN_PE1
#define XPT2046_GPIO_INT RK2818_PIN_PE3
#define DEBOUNCE_REPTIME 3
#if defined(CONFIG_TOUCHSCREEN_XPT2046_320X480_SPI)
@@ -677,11 +678,8 @@ static struct xpt2046_platform_data xpt2046_info = {
.debounce_max = 7,
.debounce_rep = DEBOUNCE_REPTIME,
.debounce_tol = 20,
#if defined(CONFIG_MACH_RAHO)
.gpio_pendown = RK2818_PIN_PE1,
#else
.gpio_pendown = RK2818_PIN_PE3,
#endif
.gpio_pendown = XPT2046_GPIO_INT,
.penirq_recheck_delay_usecs = 1,
};
#elif defined(CONFIG_TOUCHSCREEN_XPT2046_CBN_SPI)
@@ -696,11 +694,8 @@ static struct xpt2046_platform_data xpt2046_info = {
.debounce_max = 7,
.debounce_rep = DEBOUNCE_REPTIME,
.debounce_tol = 20,
#if defined(CONFIG_MACH_RAHO)
.gpio_pendown = RK2818_PIN_PE1,
#else
.gpio_pendown = RK2818_PIN_PE3,
#endif
.gpio_pendown = XPT2046_GPIO_INT,
.penirq_recheck_delay_usecs = 1,
};
#endif
@@ -1146,7 +1141,7 @@ static void __init machine_rk2818_board_init(void)
i2c_register_board_info(default_i2c1_data.bus_num, board_i2c1_devices,
ARRAY_SIZE(board_i2c1_devices));
#endif
#ifdef CONFIG_SPI_I2C
#ifdef CONFIG_SPI_FPGA_I2C
i2c_register_board_info(default_i2c2_data.bus_num, board_i2c2_devices,
ARRAY_SIZE(board_i2c2_devices));
i2c_register_board_info(default_i2c3_data.bus_num, board_i2c3_devices,

4
arch/arm/mach-rk2818/board-midsdk.c
View File

@@ -243,7 +243,7 @@ struct rk2818_gpio_expander_info extern_gpio_settinginfo[] = {
};
struct pca9554_platform_data rk2818_pca9554_data={
.gpio_base=GPIOS_EXPANDER_BASE,
.gpio_base=GPIO_EXPANDER_BASE,
.gpio_pin_num=CONFIG_EXPANDED_GPIO_NUM,
.gpio_irq_start=NR_AIC_IRQS + 2*NUM_GROUP,
.irq_pin_num=CONFIG_EXPANDED_GPIO_IRQ_NUM,
@@ -721,7 +721,7 @@ static void __init machine_rk2818_board_init(void)
i2c_register_board_info(default_i2c1_data.bus_num, board_i2c1_devices,
ARRAY_SIZE(board_i2c1_devices));
#endif
#ifdef CONFIG_SPI_I2C
#ifdef CONFIG_SPI_FPGA_I2C
i2c_register_board_info(default_i2c2_data.bus_num, board_i2c2_devices,
ARRAY_SIZE(board_i2c2_devices));
i2c_register_board_info(default_i2c3_data.bus_num, board_i2c3_devices,

4
arch/arm/mach-rk2818/board-phonesdk.c
View File

@@ -243,7 +243,7 @@ struct rk2818_gpio_expander_info extern_gpio_settinginfo[] = {
};
struct pca9554_platform_data rk2818_pca9554_data={
.gpio_base=GPIOS_EXPANDER_BASE,
.gpio_base=GPIO_EXPANDER_BASE,
.gpio_pin_num=CONFIG_EXPANDED_GPIO_NUM,
.gpio_irq_start=NR_AIC_IRQS + 2*NUM_GROUP,
.irq_pin_num=CONFIG_EXPANDED_GPIO_IRQ_NUM,
@@ -727,7 +727,7 @@ static void __init machine_rk2818_board_init(void)
i2c_register_board_info(default_i2c1_data.bus_num, board_i2c1_devices,
ARRAY_SIZE(board_i2c1_devices));
#endif
#ifdef CONFIG_SPI_I2C
#ifdef CONFIG_SPI_FPGA_I2C
i2c_register_board_info(default_i2c2_data.bus_num, board_i2c2_devices,
ARRAY_SIZE(board_i2c2_devices));
i2c_register_board_info(default_i2c3_data.bus_num, board_i2c3_devices,

18
arch/arm/mach-rk2818/board-raho.c
View File

@@ -252,7 +252,7 @@ struct rk2818_gpio_expander_info extern_gpio_settinginfo[] = {
};
struct pca9554_platform_data rk2818_pca9554_data={
.gpio_base=GPIOS_EXPANDER_BASE,
.gpio_base=GPIO_EXPANDER_BASE,
.gpio_pin_num=CONFIG_EXPANDED_GPIO_NUM,
.gpio_irq_start=NR_AIC_IRQS + 2*NUM_GROUP,
.irq_pin_num=CONFIG_EXPANDED_GPIO_IRQ_NUM,
@@ -1006,11 +1006,8 @@ static struct xpt2046_platform_data xpt2046_info = {
.debounce_max = 7,
.debounce_rep = DEBOUNCE_REPTIME,
.debounce_tol = 20,
#if defined(CONFIG_MACH_RAHO)
.gpio_pendown = RK2818_PIN_PE1,
#else
.gpio_pendown = RK2818_PIN_PE3,
#endif
.gpio_pendown = XPT2046_GPIO_INT,
.penirq_recheck_delay_usecs = 1,
};
#elif defined(CONFIG_TOUCHSCREEN_XPT2046_CBN_SPI)
@@ -1025,11 +1022,8 @@ static struct xpt2046_platform_data xpt2046_info = {
.debounce_max = 7,
.debounce_rep = DEBOUNCE_REPTIME,
.debounce_tol = 20,
#if defined(CONFIG_MACH_RAHO)
.gpio_pendown = RK2818_PIN_PE1,
#else
.gpio_pendown = RK2818_PIN_PE3,
#endif
.gpio_pendown = XPT2046_GPIO_INT,
.penirq_recheck_delay_usecs = 1,
};
#endif
@@ -1504,7 +1498,7 @@ static void __init machine_rk2818_board_init(void)
i2c_register_board_info(default_i2c1_data.bus_num, board_i2c1_devices,
ARRAY_SIZE(board_i2c1_devices));
#endif
#ifdef CONFIG_SPI_I2C
#ifdef CONFIG_SPI_FPGA_I2C
i2c_register_board_info(default_i2c2_data.bus_num, board_i2c2_devices,
ARRAY_SIZE(board_i2c2_devices));
i2c_register_board_info(default_i2c3_data.bus_num, board_i2c3_devices,

6
arch/arm/mach-rk2818/include/mach/gpio.h Normal file → Executable file
View File

@@ -25,7 +25,7 @@
#define MAX_GPIO_BANKS 8//<2F><><EFBFBD><EFBFBD>RK2818<31>ڲ<EFBFBD>GPIO<49>ܹ<EFBFBD><DCB9>м<EFBFBD><D0BC>飬<EFBFBD><E9A3AC><EFBFBD>ڶ<EFBFBD>Ϊ8<CEAA>飬<EFBFBD><E9A3AC>GPIO0_A~ GPIO0_D<5F><44>GPIO1_A~ GPIO1_D<5F><44>
#define SPI_FPGA_EXPANDER_BASE (PIN_BASE+NUM_GROUP*MAX_GPIO_BANKS)
#if defined (CONFIG_SPI_GPIO)
#if defined (CONFIG_SPI_FPGA_GPIO)
#define GPIO_EXPANDER_BASE (PIN_BASE+NUM_GROUP*MAX_GPIO_BANKS+CONFIG_SPI_FPGA_GPIO_NUM)
#else
#define GPIO_EXPANDER_BASE (PIN_BASE+NUM_GROUP*MAX_GPIO_BANKS)
@@ -176,7 +176,7 @@ struct rk2818_gpio_bank {
#define RK2818_PIN_PH7 (PIN_BASE + 7*NUM_GROUP + 7)
/***********************define extern gpio pin num******************************/
#if defined(CONFIG_SPI_GPIO)
#if defined(CONFIG_SPI_FPGA_GPIO)
#define FPGA_PIO0_00 (SPI_FPGA_EXPANDER_BASE + 0*NUM_GROUP + 0)
#define FPGA_PIO0_01 (SPI_FPGA_EXPANDER_BASE + 0*NUM_GROUP + 1)
#define FPGA_PIO0_02 (SPI_FPGA_EXPANDER_BASE + 0*NUM_GROUP + 2)
@@ -353,7 +353,7 @@ static inline int irq_to_gpio(unsigned irq)
{
return (RK2818_PIN_PE0 + (irq - __gpio_to_irq(RK2818_PIN_PE0)));
}
#if defined(CONFIG_SPI_GPIO)
#if defined(CONFIG_SPI_FPGA_GPIO)
else if((irq - __gpio_to_irq(FPGA_PIO0_00)) <2*NUM_GROUP)
{
return (FPGA_PIO0_00 + (irq - __gpio_to_irq(FPGA_PIO0_00)));

16
arch/arm/mach-rk2818/include/mach/spi_fpga.h
View File

@@ -128,19 +128,19 @@ struct spi_fpga_port {
struct work_struct fpga_irq_work;
struct timer_list fpga_timer;
/*spi2uart*/
#ifdef CONFIG_SPI_UART
#ifdef CONFIG_SPI_FPGA_UART
struct spi_uart uart;
#endif
/*spi2gpio*/
#ifdef CONFIG_SPI_GPIO
#ifdef CONFIG_SPI_FPGA_GPIO
struct spi_gpio gpio;
#endif
/*spi2i2c*/
#ifdef CONFIG_SPI_I2C
#ifdef CONFIG_SPI_FPGA_I2C
struct spi_i2c i2c;
#endif
/*spi2dpram*/
#ifdef CONFIG_SPI_DPRAM
#ifdef CONFIG_SPI_FPGA_DPRAM
struct spi_dpram dpram;
#endif
@@ -490,12 +490,12 @@ extern struct spi_fpga_port *pFpgaPort;
extern unsigned int spi_in(struct spi_fpga_port *port, int reg, int type);
extern void spi_out(struct spi_fpga_port *port, int reg, int value, int type);
#if defined(CONFIG_SPI_UART)
#if defined(CONFIG_SPI_FPGA_UART)
extern void spi_uart_handle_irq(struct spi_device *spi);
extern int spi_uart_register(struct spi_fpga_port *port);
extern int spi_uart_unregister(struct spi_fpga_port *port);
#endif
#if defined(CONFIG_SPI_GPIO)
#if defined(CONFIG_SPI_FPGA_GPIO)
extern int spi_gpio_int_sel(eSpiGpioPinNum_t PinNum,eSpiGpioTypeSel_t type);
extern int spi_gpio_set_pindirection(eSpiGpioPinNum_t PinNum,eSpiGpioPinDirection_t direction);
extern int spi_gpio_set_pinlevel(eSpiGpioPinNum_t PinNum, eSpiGpioPinLevel_t PinLevel);
@@ -512,12 +512,12 @@ extern void spi_gpio_irq_setup(void);
extern int spi_gpio_register(struct spi_fpga_port *port);
extern int spi_gpio_unregister(struct spi_fpga_port *port);
#endif
#if defined(CONFIG_SPI_I2C)
#if defined(CONFIG_SPI_FPGA_I2C)
extern int spi_i2c_handle_irq(struct spi_fpga_port *port,unsigned char channel);
extern int spi_i2c_register(struct spi_fpga_port *port,int num);
extern int spi_i2c_unregister(struct spi_fpga_port *port);
#endif
#if defined(CONFIG_SPI_DPRAM)
#if defined(CONFIG_SPI_FPGA_DPRAM)
extern int spi_dpram_handle_irq(struct spi_device *spi);
extern int spi_dpram_register(struct spi_fpga_port *port);
extern int spi_dpram_unregister(struct spi_fpga_port *port);

16
drivers/fpga/Kconfig Normal file → Executable file
View File

@@ -27,13 +27,13 @@ if SPI_FPGA_INIT
endif
if SPI_FPGA_INIT
config SPI_UART
config SPI_FPGA_UART
tristate "spi to uart support"
depends on SPI && SPIM_RK2818
help
fpga driver for spi to uart.
if SPI_UART
if SPI_FPGA_UART
config SPI_UART_DEBUG
boolean "Debug support for spi to uart drivers"
depends on DEBUG_KERNEL
@@ -41,13 +41,13 @@ if SPI_UART
Say "yes" to enable debug messaging in spi to uart drivers.
endif
config SPI_GPIO
config SPI_FPGA_GPIO
tristate "spi to gpio support"
depends on SPI && SPIM_RK2818
help
fpga driver for spi to gpio.
if SPI_GPIO
if SPI_FPGA_GPIO
config SPI_GPIO_DEBUG
boolean "Debug support for spi to gpio drivers"
depends on DEBUG_KERNEL
@@ -55,13 +55,13 @@ if SPI_GPIO
Say "yes" to enable debug messaging in spi to gpio drivers.
endif
config SPI_I2C
config SPI_FPGA_I2C
tristate "spi to i2c support"
depends on SPI && SPIM_RK2818
help
fpga driver for spi to i2c.
if SPI_I2C
if SPI_FPGA_I2C
config SPI_I2C_DEBUG
boolean "Debug support for spi to i2c drivers"
depends on DEBUG_KERNEL
@@ -69,13 +69,13 @@ if SPI_I2C
Say "yes" to enable debug messaging in spi to i2c drivers.
endif
config SPI_DPRAM
config SPI_FPGA_DPRAM
tristate "spi to dpram support"
depends on SPI && SPIM_RK2818
help
fpga driver for spi to dpram.
if SPI_DPRAM
if SPI_FPGA_DPRAM
config SPI_DPRAM_DEBUG
boolean "Debug support for spi to dpram drivers"
depends on DEBUG_KERNEL

8
drivers/fpga/Makefile Normal file → Executable file
View File

@@ -4,7 +4,7 @@
# fpga drivers
obj-$(CONFIG_SPI_FPGA_INIT) += spi_fpga_init.o
obj-$(CONFIG_SPI_UART) += spi_uart.o
obj-$(CONFIG_SPI_GPIO) += spi_gpio.o
obj-$(CONFIG_SPI_I2C) += spi_i2c.o
obj-$(CONFIG_SPI_DPRAM) += spi_dpram.o
obj-$(CONFIG_SPI_FPGA_UART) += spi_uart.o
obj-$(CONFIG_SPI_FPGA_GPIO) += spi_gpio.o
obj-$(CONFIG_SPI_FPGA_I2C) += spi_i2c.o
obj-$(CONFIG_SPI_FPGA_DPRAM) += spi_dpram.o

36
drivers/fpga/spi_fpga_init.c
View File

@@ -64,7 +64,7 @@ unsigned int spi_in(struct spi_fpga_port *port, int reg, int type)
switch(type)
{
#if defined(CONFIG_SPI_UART)
#if defined(CONFIG_SPI_FPGA_UART)
case SEL_UART:
index = port->uart.index;
reg = (((reg) | ICE_SEL_UART) | ICE_SEL_READ | ICE_SEL_UART_CH(index));
@@ -78,7 +78,7 @@ unsigned int spi_in(struct spi_fpga_port *port, int reg, int type)
break;
#endif
#if defined(CONFIG_SPI_GPIO)
#if defined(CONFIG_SPI_FPGA_GPIO)
case SEL_GPIO:
reg = (((reg) | ICE_SEL_GPIO) | ICE_SEL_READ );
tx_buf[0] = reg & 0xff;
@@ -91,7 +91,7 @@ unsigned int spi_in(struct spi_fpga_port *port, int reg, int type)
break;
#endif
#if defined(CONFIG_SPI_I2C)
#if defined(CONFIG_SPI_FPGA_I2C)
case SEL_I2C:
reg = (((reg) | ICE_SEL_I2C) | ICE_SEL_READ );
tx_buf[0] = reg & 0xff;
@@ -104,7 +104,7 @@ unsigned int spi_in(struct spi_fpga_port *port, int reg, int type)
break;
#endif
#if defined(CONFIG_SPI_DPRAM)
#if defined(CONFIG_SPI_FPGA_DPRAM)
case SEL_DPRAM:
reg = (((reg) | ICE_SEL_DPRAM) & ICE_SEL_DPRAM_READ );
tx_buf[0] = reg & 0xff;
@@ -141,7 +141,7 @@ void spi_out(struct spi_fpga_port *port, int reg, int value, int type)
//printk("index2=%d,",index);
switch(type)
{
#if defined(CONFIG_SPI_UART)
#if defined(CONFIG_SPI_FPGA_UART)
case SEL_UART:
index = port->uart.index;
reg = ((((reg) | ICE_SEL_UART) & ICE_SEL_WRITE) | ICE_SEL_UART_CH(index));
@@ -153,7 +153,7 @@ void spi_out(struct spi_fpga_port *port, int reg, int value, int type)
break;
#endif
#if defined(CONFIG_SPI_GPIO)
#if defined(CONFIG_SPI_FPGA_GPIO)
case SEL_GPIO:
reg = (((reg) | ICE_SEL_GPIO) & ICE_SEL_WRITE );
tx_buf[0] = reg & 0xff;
@@ -164,7 +164,7 @@ void spi_out(struct spi_fpga_port *port, int reg, int value, int type)
break;
#endif
#if defined(CONFIG_SPI_I2C)
#if defined(CONFIG_SPI_FPGA_I2C)
case SEL_I2C:
reg = (((reg) | ICE_SEL_I2C) & ICE_SEL_WRITE);
tx_buf[0] = reg & 0xff;
@@ -175,7 +175,7 @@ void spi_out(struct spi_fpga_port *port, int reg, int value, int type)
break;
#endif
#if defined(CONFIG_SPI_DPRAM)
#if defined(CONFIG_SPI_FPGA_DPRAM)
case SEL_DPRAM:
reg = (((reg) | ICE_SEL_DPRAM) | ICE_SEL_DPRAM_WRITE );
tx_buf[0] = reg & 0xff;
@@ -231,7 +231,7 @@ static void spi_fpga_irq_work_handler(struct work_struct *work)
ret = spi_in(port, ICE_SEL_READ_INT_TYPE, READ_TOP_INT);
if((ret | ICE_INT_TYPE_UART0) == ICE_INT_TYPE_UART0)
{
#if defined(CONFIG_SPI_UART)
#if defined(CONFIG_SPI_FPGA_UART)
DBG("%s:ICE_INT_TYPE_UART0 ret=0x%x\n",__FUNCTION__,ret);
port->uart.index = uart_ch;
spi_uart_handle_irq(spi);
@@ -239,28 +239,28 @@ static void spi_fpga_irq_work_handler(struct work_struct *work)
}
else if((ret | ICE_INT_TYPE_GPIO) == ICE_INT_TYPE_GPIO)
{
#if defined(CONFIG_SPI_GPIO)
#if defined(CONFIG_SPI_FPGA_GPIO)
DBG("%s:ICE_INT_TYPE_GPIO ret=0x%x\n",__FUNCTION__,ret);
spi_gpio_handle_irq(spi);
#endif
}
else if((ret | ICE_INT_TYPE_I2C2) == ICE_INT_TYPE_I2C2)
{
#if defined(CONFIG_SPI_I2C)
#if defined(CONFIG_SPI_FPGA_I2C)
DBG("%s:ICE_INT_TYPE_I2C2 ret=0x%x\n",__FUNCTION__,ret);
spi_i2c_handle_irq(port,I2C_CH2);
#endif
}
else if((ret | ICE_INT_TYPE_I2C3) == ICE_INT_TYPE_I2C3)
{
#if defined(CONFIG_SPI_I2C)
#if defined(CONFIG_SPI_FPGA_I2C)
DBG("%s:ICE_INT_TYPE_I2C3 ret=0x%x\n",__FUNCTION__,ret);
spi_i2c_handle_irq(port,I2C_CH3);
#endif
}
else if((ret | ICE_INT_TYPE_DPRAM) == ICE_INT_TYPE_DPRAM)
{
#if defined(CONFIG_SPI_DPRAM)
#if defined(CONFIG_SPI_FPGA_DPRAM)
DBG("%s:ICE_INT_TYPE_DPRAM ret=0x%x\n",__FUNCTION__,ret);
spi_dpram_handle_irq(spi);
#endif
@@ -341,7 +341,7 @@ static int __devinit spi_fpga_probe(struct spi_device * spi)
}
INIT_WORK(&port->fpga_irq_work, spi_fpga_irq_work_handler);
#if defined(CONFIG_SPI_UART)
#if defined(CONFIG_SPI_FPGA_UART)
ret = spi_uart_register(port);
if(ret)
{
@@ -350,7 +350,7 @@ static int __devinit spi_fpga_probe(struct spi_device * spi)
return ret;
}
#endif
#if defined(CONFIG_SPI_GPIO)
#if defined(CONFIG_SPI_FPGA_GPIO)
ret = spi_gpio_register(port);
if(ret)
{
@@ -359,7 +359,7 @@ static int __devinit spi_fpga_probe(struct spi_device * spi)
return ret;
}
#endif
#if defined(CONFIG_SPI_I2C)
#if defined(CONFIG_SPI_FPGA_I2C)
DBG("%s:line=%d,port=0x%x\n",__FUNCTION__,__LINE__,(int)port);
spin_lock_init(&port->i2c.i2c_lock);
@@ -376,7 +376,7 @@ static int __devinit spi_fpga_probe(struct spi_device * spi)
}
#endif
#if defined(CONFIG_SPI_DPRAM)
#if defined(CONFIG_SPI_FPGA_DPRAM)
ret = spi_dpram_register(port);
if(ret)
{
@@ -404,7 +404,7 @@ static int __devinit spi_fpga_probe(struct spi_device * spi)
DBG("%s:line=%d,port=0x%x\n",__FUNCTION__,__LINE__,(int)port);
pFpgaPort = port;
#if defined(CONFIG_SPI_GPIO)
#if defined(CONFIG_SPI_FPGA_GPIO)
spi_gpio_init();
#endif

38
drivers/fpga/spi_gpio.c
View File

@@ -474,7 +474,7 @@ int spi_gpio_handle_irq(struct spi_device *spi)
{
if(((gpio_iir & (1 << i)) == 0) && ((state & (1 << i)) != 0))
{
irq = i + GPIOS_EXPANDER_BASE;
irq = i + SPI_FPGA_EXPANDER_BASE;
desc = irq_to_desc(irq);
if(desc->action->handler)
desc->action->handler(irq,desc->action->dev_id);
@@ -539,13 +539,13 @@ void spi_gpio_work_handler(struct work_struct *work)
#elif (FPGA_TYPE == ICE_CC196)
for(i=4;i<81;i++)
{
gpio_direction_output(GPIOS_EXPANDER_BASE+i,TestGpioPinLevel);
gpio_direction_output(SPI_FPGA_EXPANDER_BASE+i,TestGpioPinLevel);
//ret = gpio_direction_input(GPIOS_EXPANDER_BASE+i);
//if (ret) {
// printk("%s:failed to set GPIO[%d] input\n",__FUNCTION__,GPIOS_EXPANDER_BASE+i);
//}
udelay(1);
ret = gpio_get_value (GPIOS_EXPANDER_BASE+i);
ret = gpio_get_value (SPI_FPGA_EXPANDER_BASE+i);
if(ret != TestGpioPinLevel)
{
#if SPI_FPGA_TEST_DEBUG
@@ -725,7 +725,7 @@ int spi_gpio_unregister(struct spi_fpga_port *port)
/************<2A><><EFBFBD><EFBFBD>GPIO<49>ӿں<D3BF><DABA><EFBFBD>ʵ<EFBFBD>ֲ<EFBFBD><D6B2><EFBFBD>************************/
static int spi_gpiolib_direction_input(struct gpio_chip *chip, unsigned offset)
{
int pinnum = offset + chip->base -GPIOS_EXPANDER_BASE;
int pinnum = offset + chip->base -SPI_FPGA_EXPANDER_BASE;
DBG("%s:pinnum=%d\n",__FUNCTION__,pinnum);
if(pinnum < 16)
spi_gpio_int_sel(pinnum,SPI_GPIO0_IS_GPIO);
@@ -734,7 +734,7 @@ static int spi_gpiolib_direction_input(struct gpio_chip *chip, unsigned offset)
static int spi_gpiolib_direction_output(struct gpio_chip *chip, unsigned offset, int val)
{
int pinnum = offset + chip->base -GPIOS_EXPANDER_BASE;
int pinnum = offset + chip->base -SPI_FPGA_EXPANDER_BASE;
if(pinnum < 16)
spi_gpio_int_sel(pinnum,SPI_GPIO0_IS_GPIO);
DBG("%s:pinnum=%d\n",__FUNCTION__,pinnum);
@@ -747,14 +747,14 @@ static int spi_gpiolib_direction_output(struct gpio_chip *chip, unsigned offset,
static int spi_gpiolib_get_pinlevel(struct gpio_chip *chip, unsigned int offset)
{
int pinnum = offset + chip->base -GPIOS_EXPANDER_BASE;
int pinnum = offset + chip->base -SPI_FPGA_EXPANDER_BASE;
DBG("%s:pinnum=%d\n",__FUNCTION__,pinnum);
return spi_gpio_get_pinlevel(pinnum);
}
static void spi_gpiolib_set_pinlevel(struct gpio_chip *chip, unsigned int offset, int val)
{
int pinnum = offset + chip->base -GPIOS_EXPANDER_BASE;
int pinnum = offset + chip->base -SPI_FPGA_EXPANDER_BASE;
DBG("%s:pinnum=%d\n",__FUNCTION__,pinnum);
if(GPIO_HIGH == val)
spi_gpio_set_pinlevel(pinnum,SPI_GPIO_HIGH);
@@ -810,12 +810,12 @@ struct fpga_gpio_chip {
}
static struct fpga_gpio_chip spi_gpio_chip[] = {
SPI_GPIO_CHIP_DEF("PIO0", GPIOS_EXPANDER_BASE+0*NUM_GROUP*2, NUM_GROUP<<1),
SPI_GPIO_CHIP_DEF("PIO1", GPIOS_EXPANDER_BASE+1*NUM_GROUP*2, NUM_GROUP<<1),
SPI_GPIO_CHIP_DEF("PIO2", GPIOS_EXPANDER_BASE+2*NUM_GROUP*2, NUM_GROUP<<1),
SPI_GPIO_CHIP_DEF("PIO3", GPIOS_EXPANDER_BASE+3*NUM_GROUP*2, NUM_GROUP<<1),
SPI_GPIO_CHIP_DEF("PIO4", GPIOS_EXPANDER_BASE+4*NUM_GROUP*2, NUM_GROUP<<1),
SPI_GPIO_CHIP_DEF("PIO5", GPIOS_EXPANDER_BASE+5*NUM_GROUP*2, NUM_GROUP<<1),
SPI_GPIO_CHIP_DEF("PIO0", SPI_FPGA_EXPANDER_BASE+0*NUM_GROUP*2, NUM_GROUP<<1),
SPI_GPIO_CHIP_DEF("PIO1", SPI_FPGA_EXPANDER_BASE+1*NUM_GROUP*2, NUM_GROUP<<1),
SPI_GPIO_CHIP_DEF("PIO2", SPI_FPGA_EXPANDER_BASE+2*NUM_GROUP*2, NUM_GROUP<<1),
SPI_GPIO_CHIP_DEF("PIO3", SPI_FPGA_EXPANDER_BASE+3*NUM_GROUP*2, NUM_GROUP<<1),
SPI_GPIO_CHIP_DEF("PIO4", SPI_FPGA_EXPANDER_BASE+4*NUM_GROUP*2, NUM_GROUP<<1),
SPI_GPIO_CHIP_DEF("PIO5", SPI_FPGA_EXPANDER_BASE+5*NUM_GROUP*2, NUM_GROUP<<1),
};
@@ -835,7 +835,7 @@ struct spi_gpio_irq_transfer
static void _spi_gpio_irq_enable(unsigned irq)
{
int gpio = irq_to_gpio(irq) - GPIOS_EXPANDER_BASE;
int gpio = irq_to_gpio(irq) - SPI_FPGA_EXPANDER_BASE;
DBG("%s:line=%d,irq=%d,gpio=%d\n",__FUNCTION__,__LINE__,irq,gpio);
if(gpio < 16)
spi_gpio_int_sel(gpio,SPI_GPIO0_IS_INT);
@@ -849,7 +849,7 @@ static void _spi_gpio_irq_enable(unsigned irq)
static void _spi_gpio_irq_disable(unsigned irq)
{
int gpio = irq_to_gpio(irq) - GPIOS_EXPANDER_BASE;
int gpio = irq_to_gpio(irq) - SPI_FPGA_EXPANDER_BASE;
DBG("%s:line=%d,irq=%d,gpio=%d\n",__FUNCTION__,__LINE__,irq,gpio);
if(gpio < 16)
spi_gpio_int_sel(gpio,SPI_GPIO0_IS_INT);
@@ -864,7 +864,7 @@ static void _spi_gpio_irq_disable(unsigned irq)
static int _spi_gpio_irq_set_type(unsigned int irq, unsigned int type)
{
int gpio = irq_to_gpio(irq) - GPIOS_EXPANDER_BASE;
int gpio = irq_to_gpio(irq) - SPI_FPGA_EXPANDER_BASE;
int int_type = 0;
DBG("%s:line=%d,irq=%d,type=%d,gpio=%d\n",__FUNCTION__,__LINE__,irq,type,gpio);
if(gpio < 16)
@@ -1058,7 +1058,7 @@ void spi_gpio_test_gpio_irq_init(void)
for(i=0;i<81;i++)
{
gpio = GPIOS_EXPANDER_BASE+i;
gpio = SPI_FPGA_EXPANDER_BASE+i;
ret = gpio_request(gpio, NULL);
if (ret) {
printk("%s:failed to request GPIO[%d]\n",__FUNCTION__,gpio);
@@ -1067,7 +1067,7 @@ void spi_gpio_test_gpio_irq_init(void)
for(i=0;i<4;i++)
{
gpio = GPIOS_EXPANDER_BASE+i;
gpio = SPI_FPGA_EXPANDER_BASE+i;
irq = gpio_to_irq(gpio);
printk("%s:line=%d,irq=%d,gpio=%d\n",__FUNCTION__,__LINE__,irq,gpio);
switch(i)
@@ -1144,7 +1144,7 @@ void spi_gpio_irq_setup(void)
set_irq_flags(pin+j, IRQF_VALID);
}
printk("%s: %d gpio irqs in %d banks\n", __FUNCTION__, pin+j-GPIOS_EXPANDER_BASE, spi_gpio_banks);
printk("%s: %d gpio irqs in %d banks\n", __FUNCTION__, pin+j-SPI_FPGA_EXPANDER_BASE, spi_gpio_banks);
spi_gpio_test_gpio_irq_init();