pinctrl: rockchip: Disable GPIO_INTEN bit while gpio irq type setting

If the gpio IRQ type changes, it is possible to accidentally trigger
an interrupt, such as when the input is high, changed from level to
rise edge. For now, the best way to do this is to disable the INTEN
bit first, then configure the type to stagger this period of time.

Change-Id: I71351b9ed6f7920958c7451c2e51ab5f699875d1
Signed-off-by: David Wu <david.wu@rock-chips.com>
This commit is contained in:
David Wu
2018-08-10 09:53:33 +08:00
parent c063b854bd
commit 74b11898ca

View File

@@ -3550,6 +3550,7 @@ static int rockchip_irq_set_type(struct irq_data *d, unsigned int type)
u32 polarity;
u32 level;
u32 data;
u32 inten;
unsigned long flags;
int ret;
@@ -3620,8 +3621,19 @@ static int rockchip_irq_set_type(struct irq_data *d, unsigned int type)
return -EINVAL;
}
/*
* Accroding to the steps of gpio interrupt, write GPIO_INTEN[x] as
* 1 to enable GPIOs interrupt should be done after the level and
* polarity configured.
*/
inten = readl_relaxed(gc->reg_base + GPIO_INTEN);
inten &= ~mask;
writel_relaxed(inten, gc->reg_base + GPIO_INTEN);
writel_relaxed(level, gc->reg_base + GPIO_INTTYPE_LEVEL);
writel_relaxed(polarity, gc->reg_base + GPIO_INT_POLARITY);
inten |= mask;
writel_relaxed(inten, gc->reg_base + GPIO_INTEN);
irq_gc_unlock(gc);
raw_spin_unlock_irqrestore(&bank->slock, flags);